Datasheet ICS552G-02, ICS552G-02T Datasheet (ICST)

ICS552-02

LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK BUFFER

Description

The ICS552-02 is a low skew, single-input to eight-

output clock buffer. It is part of ICS’ Clock Blocks
family. See the ICS553 for a 1 to 4 low skew buffer. For
more than 8 outputs see the MK74CBxxx Buffalo
series of clock drivers.

ICS makes many non-PLL and PLL based low skew
output devices as well as Z ero Delay Buffers to
synchronize clocks. Contact us for all of your clocking
needs.

TM

TM

Block Diagram

Features

• Extremely low skew outputs (50ps maximum)

• Packaged in 16 pin TSSOP

• Low power CMOS technology

• Operating Voltages of 2.5 V to 5 V

• Output Enable pin tri-states outputs

• 5 V tolerant input clocks

• Input/Output clock frequency up to 200 MHz

• Input clock multiplexer simplifies clock selection

Q0

IN A

IN B

1

0

SELA

Q1

Q2

Q3

Q4

Q5

Q6

Q7

OE

MDS 552-02 B 1 Revision 050401
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95 126 ● tel [phone] ● www.icst.com

PRELIMINARY INFORMATION

LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK

Pin Assignment Input Source Select

ICS552-02

OE

VDD

Q0
Q1
Q2
Q3

GND GND

INB

1
2
3
4
5
6
7
8

16 Pin TSSOP

Pin Descriptions

Pin

Number

1 OE Input Output Enable. Tri-states outputs when low. Internal pull-up resistor.
2 VDD Power Connect to +2.5V, +3.3V or +5.0V. Must be the same as pin 15.
3 Q0 Output Clock Output 0
4 Q1 Output Clock Output 1
5 Q2 Output Clock Output 2
6 Q3 Output Clock Output 3
7 GND Power Connect to ground.
8 INB Input Clock Input B. 5V tolerant input.
9 INA Input Clock Input A. 5V tolerant input.
10 GND Power Connect to ground.
11 Q4 Output Clock Output 4
12 Q5 Output Clock Output 5
13 Q6 Output Clock Output 6
14 Q7 Output Clock Output 7
15 VDD Power Connect to + 2.5V, +3.3V or +5.0V. Must be the same as pin 2.
16 SELA Input Selects either INA or INB. Internal pull-up resistor.

Pin

Name

16
15
14
13
12
11
10

9

Type

Pin

SELA
VDD
Q7
Q6
Q5
Q4

INA

SELA Input

0INB
1INA

Pin Description

External Components

A minimum number of external components are required for proper operation. Decoupling capacitors of

0.01 µF should be connected between VDD on pin 2 and GND on pin 7, and between VDD on pin 15 and
GND on pin 10, as close to the device as possible. A 33 Ω series terminating resistor should be used on
each clock output if the trace is longer than 1 inch.

To achieve the low output skews that the ICS552-02 is capable of, careful attention must be paid to board
layout. Essentially, all 8 outputs must have identical terminations, identical loads, and identical trace
geometries. If they do not, the output skew will be degraded. For example, using a 30Ω series termination
on one output (with 33Ω on the others) will cause at least 15ps of skew.

MDS 552-02 B 2 Revision 050401
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel [phone] ● www.icst.com

PRELIMINARY INFORMATION

Absolute Maximum Ratings

Stresses above the ratings listed below can cause permanent damage to the ICS552-02. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only . Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.

Item Rating

Supply Voltage, VDD 7 V
All Inputs and Outputs -0.5 V to VDD+0.5 V
Ambient Operating Temperature 0 to +70 °C
Storage Temperature -65 to +150 °C
Junction Temperature 175 °C
Soldering Temperature 260 °C

ICS552-02

LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK

Recommended Operation Conditions

Parameter Min. Typ. Max. Units

Ambient Operating Temperature 0 –+70°C
Power Supply Voltage (measured in respect to GND) +2.375 +5.25 V

DC Electrical Characteristics

VDD=2.5 V ±5%, Ambient temperature 0 to +70

Parameter Symbol Conditions Min. Typ. Max. Units

Operating Voltage VDD 2.375 2.625 V
Input High Voltage, INA, INB V
Input Low Voltage, INA, INB V
Input High Voltage, OE, SELA V
Input Low Voltage, OE, SELA V
Output High Voltage V
Output Low Voltage V
Operating Supply Current IDD No load, 135 MHz 35 mA
Short Circuit Current I

OH

OL

OS

IH
IL
IH
IL

I

OH

IOL = 16 mA 0.5 V

Each output 60 mA

C, unless stated otherwise

°

Note 1 VDD/2+0.5 5.5 V
Note 1 VDD/2-0.5 V

2VDDV

0.4 V

= -16 mA 2 V

MDS 552-02 B 3 Revision 050401
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel [phone] ● www.icst.com

PRELIMINARY INFORMATION

DC Electrical Characteristics (continued)

ICS552-02

LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK

VDD=3.3 V ±5%, Ambient temperature 0 to +70

C, unless stated otherwise

°

Parameter Symbol Conditions Min. Typ. Max. Units

Operating Voltage VDD 3.135 3.465 V
Input High Voltage, INA, INB V
Input Low Voltage, INA, INB V
Input High Voltage, OE, SELA V
Input Low Voltage, OE, SELA V
Output High Voltage V
Output Low Voltage V
Output High Voltage (CMOS

V

IH

IL

IH

IL

OH

OL

OH

Note 1 VDD/2+0 .7 5.5 V
Note 1 VDD/2-0.7 V

2VDDV

0.4 V

I

= -25 mA 2.4 V

OH

I

= 25 mA 0.8 V

OH

I

= -12 mA VDD-0.4 V

OH

Level)
Operating Supply Current IDD No load, 135 MHz 50 mA
Short Circuit Current I

OS

VDD=5 V ±5%, Ambient temperature 0 to +70

Each output 80 mA

C, unless stated otherwise

°

Parameter Symbol Conditions Min. Typ. Max. Uni ts

Operating Voltage VDD 4.75 5.25 V
Input High Voltage, INA, INB V
Input Low Voltage, INA, INB V
Input High Voltage, OE, SELA V
Input Low Voltage, OE, SELA V
Output High Voltage V
Output Low Voltage V
Output High Voltage (CMOS

IH
IL
IH

IL
OH
OL

V

OH

Level)
Operating Supply Current IDD No load, 135 MHz 85 mA
Short Circuit Current I

OS

Note 1 VDD/2+1 5.5 V
Note 1 VDD/2-1 V

2VDDV

0.4 V

I

= -45 mA 2.4 V

OH

IOL = 45 mA 0.8 V
I

= -12 mA VDD-0.4 V

OH

Each output 100 mA

Note: 1. Nominal switching threshold is VDD/2

MDS 552-02 B 4 Revision 050401
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel [phone] ● www.icst.com

PRELIMINARY INFORMATION

AC Electrical Characteristics

ICS552-02

LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK

VDD = 2.5V ±5%, Ambient Temperature 0 to +70

C, unless stated otherwise

°

Parameter Symbol Conditions Min. Typ. Max. Units

Input Frequency 0 200 MHz
Output Rise Time t
Output Fall Time t
Propagation Delay Note 1 3.5 ns
Output to output skew Note 2 Rising edges at VDD/2 0 50 ps
Input A to Input B skew Note 3 0 50 ps

OR

OF

VDD = 3.3V ±5%, Ambient Temperature 0 to +70

0.8 to 2.0 V, CL=15 pF 1.5 ns

2.0 to 0.8 V, CL=15 pF 1.5 ns

C, unless stated otherwise

°

Parameter Symbol Conditions Min. Typ. Max. Units

Input Frequency 0 200 MHz
Output Rise Time t
Output Fall Time t
Propagation Delay Note 1 3.0 ns
Output to output skew Note 2 Rising edges at VDD/2 0 50 ps
Input A to Input B skew Note 3 0 50 ps

OR

OF

0.8 to 2.0 V, CL=15 pF 1.0 ns

2.0 to 0.8 V, CL=15 pF 1.0 ns

VDD = 5.0V ±5%, Ambient Temperature 0 to +70

C, unless stated otherwise

°

Parameter Symbol Conditions Min. Typ. Max. Units

Input Frequency 0 200 MHz
Output Rise Time t
Output Fall Time t
Propagation Delay Note 1 2.8 ns
Output to output skew Note 2 Rising edges at VDD/2 0 50 ps
Input A to Input B skew Note 3 0 50 ps

Notes: 1. With rail-to-rail input clock.

2. Between any two outputs with equal loading.

3. Propagation delay matching through the part.

4. Duty cycle on outputs will match incoming clock duty cycle. Consult ICS for tight duty cycle clock
generators.

MDS 552-02 B 5 Revision 050401
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel [phone] ● www.icst.com

OR

OF

0.8 to 2.0 V, CL=15 pF 0.7 ns

2.0 to 0.8 V, CL=15 pF 0.7 ns

PRELIMINARY INFORMATION

LOW SKEW 2 INPUT MUX AND 1 TO 8 CLOCK

ICS552-02

Package Outline and Package Dimensions (16 pin TSSOP, 173 Mil. Narrow Body)

Package dimensions are kept current with JEDEC Publication No. 95

Millimeters Inches

Symbol MinMaxMinMax

A -- 1.20 -- 0.047

a 0.05 0.15 0.002 0.006
b 0.19 0.30 0.007 0.012

Index

Area

E

H

c 0.09 0.20 0.0035 0.008
D 4.90 5.10 0.193 0.201
E 4.30 4.50 0.169 0.177

e 0.65 Basic 0.0256 Basic
H 6.40 Basic 0.252 Basic

L 0.45 0.75 0.018 0.030

Pin 1

D

a

be

c

L

A

Ordering Information

Part / Order Number Marking(both) Shipping

packaging

ICS552G-02 ICS (top line) Tubes 16 pin TSSOP 0 to +70° C

ICS552G-02T 552G-02 (2nd line) Tape and Reel 16 pin TSSOP 0 to +70° C

While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patent s or other rights of t hird parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any oth er ap pl ic ations such as those req uiri ng extended tempera ture ran ge, high reliabilit y, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or

Package Temperature

MDS 552-02 B 6 Revision 050401
Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel [phone] ● www.icst.com