The ICS502 LOCO™ is the most cost effective
way to generate a high quality, high frequency
clock output and a reference from a low frequency
crystal or clock input. The name LOCO stands for
LOw Cost Oscillator, as it is designed to replace
crystal oscillators in most electronic systems. Using
Phase-Locked-Loop (PLL) techniques, the device
uses a standard fundamental mode, inexpensive
crystal to produce output clocks up to 160 MHz.
Stored in the chip’s ROM is the ability to generate
6 different multiplication factors, allowing one
chip to output many common frequencies (see
page 2).
Features
• Packaged as 8 pin SOIC or die
• ICS’ lowest cost PLL clock plus reference
• Zero ppm multiplication error
• Easy to cascade with other 5xx series
• Input crystal frequency of 5 - 27 MHz
• Input clock frequency of 2 - 50 MHz
• Output clock frequencies up to 160 MHz
• Low jitter - 50 ps one sigma
• Compatible with all popular CPUs
• Duty cycle of 45/55 up to 160 MHz
• Operating voltages of 3.0 to 5.5V
• Industrial temperature version available
• 25mA drive capability at TTL levels
• Advanced, low power CMOS process
Block Diagram
S1, S0
crystal
or clock
X1/ICLK
X2
VDDGND
2
Crystal
Oscillator
PLL
Clock
Synthesis
and Control
Circuitry
Output
Buffer
Output
Buffer
CLK
REF
MDS 502 D1 Revision 111000
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
Page 2
ICS502
LOCO™ PLL Clock Multiplier
Pin Assignment
X1/ICLK
VDD
GND
REF
18
2
3
4
X2
7
S1
6
S0
5
CLK
Clock Decoding Table (MHz)
S1S0CLK
00x2
01x5
M0x3
M1x3.33
10x4
11x2.5
Minimum input frequency for all
selections is per table on page 3.
0 = connect directly to ground.
1 = connect directly to VDD.
M = leave unconnected (floating).
Note that all of the above outputs are achieved by using an inexpensive 10MHz to 27MHz crystal.
Consult MicroClock/ICS on how to achieve other output frequencies.
Pin Descriptions
NumberName TypeDescription
1X1/ICLKICrystal connection or clock input.
2VDDPConnect to +3.3V or +5V.
3GNDPConnect to ground.
4REFOBuffered crystal oscillator output clock.
5CLKOClock output per Table above.
6S0ISelect 0 for output clock. Connect to GND or VDD.
7S1TISelect 1 for output clock. Connect to GND or VDD or float.
8X2OCrystal connection. Leave unconnected for clock input.
Key: I = Input, TI = Tri-Level Input, O = output, P = power supply connection
MDS 502 D2 Revision 111000
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
Page 3
ICS502
ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device)
DC CHARACTERISTICS (VDD = 5.0V unless otherwise noted)
AC CHARACTERISTICS (VDD = 5.0V unless otherwise noted)
LOCO™ PLL Clock Multiplier
Electrical Specifications
ParameterConditionsMinimumTypicalMaximumUnits
Supply Voltage, VDDReferenced to GND7V
InputsReferenced to GND-0.5VDD+0.5V
Clock OutputReferenced to GND-0.5VDD+0.5V
Ambient Operating Temperature070C
ICS502MI only-4085C
Soldering TemperatureMax of 10 seconds260C
Storage temperature-65150C
Input Frequency, crystal input527MHz
Input Frequency, clock input250MHz
Output Frequency, VDD = 4.5 to 5.5V0 C to +70 C14160MHz
-40 C to +85 C14140MHz
Output Frequency, VDD = 3.0 to 3.6V0 C to +70 C14100MHz
-40 C to +85 C1490MHz
Output Clock Rise Time0.8 to 2.0V1ns
Output Clock Fall Time2.0 to 0.8V1ns
Output Clock Duty Cycleat VDD/24549 to 5155%
Absolute Clock Period JitterDeviation from mean±120ps
One Sigma Clock Period Jitter50ps
MDS 502 D3 Revision 111000
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
Page 4
ICS502
Inches
Millimeters
LOCO™ PLL Clock Multiplier
External Components / Crystal Selection
The ICS502 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be
connected close to the ICS502 to minimize lead inductance. No external power supply filtering is required
for this device. A 33Ω terminating resistor can be used next to the CLK pin. The total on-chip capacitance
is approximately 13 pF, so a parallel resonant, fundamental mode crystal should be used. For crystals with
a specified load capacitance greater than 13 pF, crystal capacitors should be connected from each of the
pins X1 and X2 to Ground as shown in the Block Diagram on page 1. The value (in pF) of these crystal
caps should be = (CL-13)*2, where CL is the crystal load capacitance in pF. These external capacitors are
only required for applications where the exact frequency is critical. For a clock input, connect to X1 and
leave X2 unconnected (no capacitors on either).
Package Outline and Package Dimensions
8 pin SOIC
EH
Q
Pin 1
e
D
h x 45°
A
c
b
SymbolMinMaxMinMax
A0.0550.0681.3971.7272
b0.0130.0190.3300.483
D0.1850.2004.6995.080
E0.1500.1603.8104.064
H0.2250.2455.7156.223
e
h0.0150.381
Q0.0040.010.1020.254
Ordering Information
Part/Order NumberMarkingPackageTemperature
ICS502MICS502M8 pin SOIC0 to 70 C
ICS502MTICS502M8 pin SOIC on tape and reel0 to 70 C
ICS502MIICS502I8 pin SOIC-40 to +85 C
ICS502MITICS502I8 pin SOIC on tape and reel-40 to +85 C
While the information presented herein has been checked for both accuracy and reliability, ICS/MicroClock assumes no responsibility for either its use or for the infringement of
any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal
commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by ICS/MicroClock. ICS/MicroClock reserves the right to change any circuitry or specifications without notice. ICS/MicroClock
does not authorize or warrant any ICS/MicroClock product for use in life support devices or critical medical instruments.
MDS 502 D4 Revision 111000
LOCO is a trademark of ICS
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
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