Datasheet ICM7216A, ICM7216B, ICM7216D Datasheet (Intersil Corporation)

August 1997

ICM7216A, ICM7216B,

ICM7216D

8-Digit, Multi-Function,

Frequency Counters/Timers

Features All Versions

• Functions as a Frequency Counter (DC to 10MHz)

• Four Internal Gate Times: 0.01s, 0.1s, 1s, 10s in
Frequency Counter Mode

• Directly Drives Digits and Segments of Large Multi­plexed LED Displays (Common Anode and Common
Cathode Versions)

• Single Nominal 5V Supply Required

• Highly Stable Oscillator, Uses 1MHz or 10MHz Crystal

• Internally Generated Decimal Points, Interdigit Blanking,
Leading Zero Blanking and Overflow Indication

• Display Off Mode Turns Off Display and Puts Chip Into
Low Power Mode

• Hold and Reset Inputs for Additional Flexibility

Features ICM7216A and ICM7216B

• Functions Also as a Period Counter, Unit Counter,
Frequency Ratio Counter or Time Interval Counter

• 1 Cycle, 10 Cycles, 100 Cycles, 1000 Cycles in Period,
Frequency Ratio and Time Interval Modes

• Measures Period From 0.5µs to 10s

Description

The ICM7216A and ICM7216B are fully integrated Timer
Counters with LED display drivers. They combine a high
frequency oscillator, a decade timebase counter, an
8-decade data counter and latches, a 7-segment decoder,
digit multiplexers and 8-segment and 8-digit drivers which
directly drive large multiplexed LED displays. The counter
inputs have a maximum frequency of 10MHz in frequency
and unit counter modes and 2MHz in the other modes. Both
inputs are digital inputs. In many applications, amplification
and level shifting will be required to obtain proper digital
signals for these inputs.

The ICM7216A and ICM7216B can function as a frequency
counter, period counter, frequency ratio (f
interval counter or as a totalizing counter. The counter uses
either a 10MHz or 1MHz quartz crystal timebase. For period
and time interval, the 10MHz timebase gives a 0.1µs
resolution. In period average and time interval average, the
resolution can be in the nanosecond range. In the frequency
mode, the user can select accumulation times of 0.01s, 0.1s,
1s and 10s. With a 10s accumulation time, the frequency
can be displayed to a resolution of 0.1Hz in the least
significant digit. There is 0.2s between measurements in all
ranges.

The ICM7216D functions as a frequency counter only, as
described above.

) counter, time

A/fB

Features ICM7216D

• Decimal Point and Leading Zero Banking May Be
Externally Selected.

Ordering Information

TEMP.

PART NUMBER

ICM7216AlJl -25 to 85 28 Ld CERDIP F28.6
ICM7216BlPl -25 to 85 28 Ld PDIP E28.6
ICM7216DlPl -25 to 85 28 Ld PDIP E28.6

RANGE (oC) PACKAGE

PKG.

NO.

All versions of the ICM7216 incorporate leading zero
blanking. Frequency is displayed in kHz. In the ICM7216A
and ICM7216B, time is displayed in µs. The display is
multiplexed at 500Hz with a 12.2% duty cycle for each digit.
The ICM7216A is designed for common anode displays with
typical peak segment currents of 25mA. The ICM7216B and
ICM7216D are designed for common cathode displays with
typical peak segment currents of 12mA. In the display off
mode, both digit and segment drivers are turned off,
enabling the display to be used for other functions.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

9-10

File Number 3166.1

Pinouts

ICM7216A

COMMON ANODE

(CERDIP)

TOP VIEW

ICM7216A, ICM7216B, ICM7216D

ICM7216B

COMMON CATHODE

(PDIP)

TOP VIEW

CONTROL INPUT

INPUT B

FUNCTION INPUT

DECIMAL POINT

OUTPUT

SEG

e OUTPUT
g OUTPUT

SEG
SEG a OUTPUT

V

SEG d OUTPUT

b OUTPUT

SEG
SEG

c OUTPUT

f OUTPUT

SEG

RESET INPUT

RANGE INPUT

SS

28

1
2
3
4
5
6
7
8

9
10
11
12
13
14

INPUT A
HOLD INPUT

27
26

OSC OUTPUT

25

OSC INPUT

24

EXT OSC INPUT

23

DIGIT 1 OUTPUT
DIGIT 2 OUTPUT

22
21

DIGIT 3 OUTPUT

20

DIGIT 4 OUTPUT
DIGIT 5 OUTPUT

19
18

V

DD

17

DIGIT 6 OUTPUT

16

DIGIT 7 OUTPUT
DIGIT 8 OUTPUT

15

CONTROL INPUT

INPUT B

FUNCTION INPUT

DIGIT 1 OUTPUT
DIGIT 3 OUTPUT
DIGIT 2 OUTPUT
DIGIT 4 OUTPUT

V

SS

DIGIT 5 OUTPUT
DIGIT 6 OUTPUT
DIGIT 7 OUTPUT
DIGIT 8 OUTPUT

RESET INPUT

RANGE INPUT

1
2
3
4
5
6
7
8

9
10
11
12
13
14

28

INPUT A
HOLD INPUT

27
26

OSC OUTPUT

25

OSC INPUT

24

EXT OSC INPUT
DECIMAL POINT

23

OUTPUT
SEG

g OUTPUT

22

e OUTPUT

21

SEG

20

a OUTPUT

SEG
SEG

d OUTPUT

19
18

V

DD

17

SEG b OUTPUT

16

c OUTPUT

SEG
SEG

f OUTPUT

15

ICM7216D

COMMON CATHODE

(PDIP)

TOP VIEW

CONTROL INPUT

MEASUREMENT IN PROGRESS

DIGIT 1 OUTPUT
DIGIT 3 OUTPUT
DIGIT 2 OUTPUT
DIGIT 4 OUTPUT

V

SS

DIGIT 5 OUTPUT
DIGIT 6 OUTPUT
DIGIT 7 OUTPUT
DIGIT 8 OUTPUT

RESET INPUT

EX. DECIMAL POINT INPUT

RANGE INPUT

28

1
2
3
4
5
6
7
8

9
10
11
12
13
14

INPUT A
HOLD INPUT

27
26

OSC OUTPUT

25

OSC INPUT

24

EXT OSC INPUT

23

DECIMAL POINT OUTPUT
SEG

g OUTPUT

22

e OUTPUT

21

SEG

20

a OUTPUT

SEG
SEG

d OUTPUT

19
18

V

DD

17

SEG b OUTPUT

16

c OUTPUT

SEG
SEG

f OUTPUT

15

9-11

Functional Block Diagram

F

T

L

EXT

OSC

INPUT

OSC

INPUT

OSC

OUTPUT

OSC

SELECT

ICM7216A, ICM7216B, ICM7216D

38 8

REFERENCE

COUNTER

3

10

÷

DECODER

DIGIT

DRIVERS

DIGIT
OUTPUTS
(8)

RESET

INPUT

INPUT A
INPUT B

(NOTE 1)

INPUT

CONTROL

LOGIC

INPUT

CONTROL

LOGIC

100Hz

104 OR÷10

÷

Q
D

CL

5

EN
CL

44444444

DATA LATCHES AND

MAIN

FF

MAIN

103 COUNTER

÷

OUTPUT MUX

RANGE SELECT

LOGIC

STORE AND

RESET LOGIC

OVERFLOW

STORE

RANGE

CONTROL

LOGIC

5

CONTROL

LOGIC

6

DP

LOGIC

DECODER

LOGIC

47 8

SEGMENT

DRIVER

RANGE
INPUT

CONTRO
INPUT

EXT
DP
INPUT
(NOTE 2)

SEGMEN
OUTPUTS
(8)

MEASUREMENT
IN PROGRESS
OUTPUT
(NOTE 2)

UNCTION

INPUT

(NOTE 1)

HOLD

INPUT

FN

CONTROL

LOGIC

6

NOTES:

1. Function input and input B available on ICM7216A/B only.

2. Ext DP input and MEASUREMENT IN PROGRESS output available on ICM7216D only.

9-12

ICM7216A, ICM7216B, ICM7216D

Absolute Maximum Ratings Thermal Information

Maximum Supply Voltage (VDD - VSS). . . . . . . . . . . . . . . . . . . .6.5V

Maximum Digit Output Current. . . . . . . . . . . . . . . . . . . . . . . .400mA

Maximum Segment Output Current . . . . . . . . . . . . . . . . . . . . .60mA

Voltage On Any Input or

Output Terminal (Note 1) . . . . . . . . . . . .(VDD +0.3V) to (VSS -0.3V)

Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. The ICM7216 may be triggered into a destructive latchup mode if either input signals are applied before the po wer supply is applied or if
input or outputs are forced to voltages exceeding VDDto VSSby more than 0.3V.

2. θJA is measured with the component mounted on an evaluation PC board in free air.

Thermal Resistance (Typical, Note 2) θJA (oC/W) θJC (oC/W)

CERDIP Package . . . . . . . . . . . . . . . . 50 10

PDIP Package. . . . . . . . . . . . . . . . . . . 55 N/A

Maximum Junction Temperature

CERDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC

Electrical Specifications V

= 5.0V, VSS = 0V, TA = 25oC, Unless Otherwise Specified

DD

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

ICM7216A/B

Operating Supply Current, I
Supply Voltage Range (VDD -VSS), V

DD

SUPPLY

Maximum Frequency INPUT A, Pin 28, f

A(MAX)

Display Off, Unused Inputs to V
INPUT A, INPUT B Frequency at f

SS

MAX

Figure 9, Function = Frequency, Ratio,

-25mA

4.75 - 6.0 V
10 - - MHz

Unit Counter
Function = Period, Time Interval 2.5 - - MHz

Maximum Frequency INPUT B, Pin 2, f

B(MAX)

Minimum Separation INPUT A to INPUT B Time

Figure 10 2.5 - - MHz
Figure 1 250 - - ns

Interval Function
Maximum Oscillator Frequency and External Oscillator

Frequency, f
Minimum External Oscillator Frequency, f
Oscillator Transconductance, g
Multiplex Frequency, f

OSC

OSC

M

MUX

Time Between Measurements f

VDD = 4.75V, TA = 85oC 2000 - - µS
f

= 10MHz - 500 - Hz

OSC

= 10MHz - 200 - ms

OSC

10 - - MHz

- - 100 kHz

Input Voltages: Pins 2, 13, 25, 27, 28

Input Low Voltage, V
Input High Voltage, V

INL

lNH

Input Resistance to VDD Pins 13, 24, R
Input Leakage Pins 27, 28, 2, I

ILK

IN

VIN = VDD -1.0V 100 400 - kΩ

- - 1.0 V

3.5 - - V

--20µA

Input Range of Change, dVlN/dt Supplies Well Bypassed - 15 - mV/µs

ICM7216A

Digit Driver: Pins 15, 16, 17, 19, 20, 21, 22, 23

High Output Current, I
Low Output Current, I

OH

OL

V

= VDD -2.0V -140 -180 - mA

OUT

V

= VSS +1.0V - 0.3 - mA

OUT

Segment Driver: Pins 4, 5, 6, 7, 9,10, 11, 12

Low Output Current, I
High Output Current, I

OL

OH

V

= VSS +1.5V 20 35 - mA

OUT

V

= VDD -2.5V - -100 - µA

OUT

Multiplex Inputs: Pins 1, 3, 14

Input Low Voltage, V
Input High Voltage, V

INL

INH

Input Resistance to VSS,R

IN

VIN = VSS +1.0V 50 100 - kΩ

- - 0.8 V

2.0 - - V

9-13

ICM7216A, ICM7216B, ICM7216D

Electrical Specifications V

= 5.0V, VSS = 0V, TA = 25oC, Unless Otherwise Specified (Continued)

DD

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

ICM7216B

Digit Driver: Pins 4, 5, 6, 7, 9, 10, 11, 12

Low Output Current, I
High Output Current, I

OL

OH

V

= VSS +1.3V 50 75 - mA

OUT

V

= VDD -2.5V - -100 - µA

OUT

Segment Driver: Pins 15, 16, 17, 19, 20, 21, 22, 23

High Output Current, I
Leakage Current, I

SLK

OH

V

= VDD -2.0V -10 - - mA

OUT

V

= VDD -2.5V - - 10 µA

OUT

Multiplex Inputs: Pins 1, 3, 14

Input Low Voltage, V
Input High Voltage, V

INL

lNH

Input Resistance to VDD,R

IN

VlN = VDD -2.5V 100 360 - kΩ

--V

-2.0 V

DD

VDD -0.8 - - V

ICM7216D

Operating Supply Current, I
Supply Voltage Range (VDD -VSS), V
Maximum Frequency INPUT A, Pin 28, f

DD

SUPPLY

A(MAX)

Maximum Oscillator Frequency and External Oscillator
Frequency, f

Minimum External Oscillator Frequency, f
Oscillator Transconductance, g
Multiplex Frequency, f

OSC

OSC

M

MUX

Time Between Measurements f

Display Off, Unused Inputs to V
INPUT A Frequency at f

MAX

SS

-25mA

4.75 - 6.0 V

Figure 9 10 - - MHz

10 - - MHz

- - 100 kHz
VDD = 4.75V, TA = 85oC 2000 - - µS
f

= 10MHz - 500 - Hz

OSC

= 10MHz - 200 - ms

OSC

Input Voltages: Pins 12, 27, 28

Input Low Voltage, V
Input High Voltage, V

Input Resistance to V

INL

INH

Pins 12, 24, R

DD,

Input Leakage, Pins 27, 28, I
Output Current, Pin 2, I
Output Current, Pin 2, I

OL
OH

ILK

IN

VIN = VDD -1.0V 100 400 - kΩ

VOL = +0.4V 0.36 - - mA
VOH = VDD -0.8V 265 - - µA

- - 1.0 V

3.5 - - V

--20µA

Input Rate of Change, dVlN/dt Supplies Well Bypassed - 15 - mV/µs
Digit Driver: Pins 3, 4, 5, 6, 8, 9, 10, 11

Low Output Current, I
High Output Current, I

OL

OH

V

= +1.3V 50 75 - mA

OUT

V

= VDD -2.5V - 100 - µA

OUT

Segment Driver: Pins 15, 16, 17, 19, 20, 21, 22, 23

High Output Current, I
Leakage Current, I

SLK

OH

V

= VDD -2.0V 10 15 mA

OUT

V

= VDD -2.5V - - 10 µA

OUT

Multiplex Inputs: Pins 1, 13, 14

Input Low Voltage, V
Input High Voltage, V

lNL

INH

Input Resistance to VDD,R

lN

VIN = VDD -1.0V 100 360 - kΩ

--V

-2.0 V

DD

VDD -0.8 - - V

9-14

Timing Diagram

ICM7216A, ICM7216B, ICM7216D

INTERNAL

STORE

30ms TO 40ms

INTERNAL

RESET

MEASUREMENT

IN PROGRESS

(INTERNAL ON

7216A/B)

INPUT A

INPUT B

NOTE:

40ms

UPDATE

190ms TO 200ms

60ms

40ms

FUNCTION:
TIME INTERVAL

PRIMING

PRIMING EDGES

MEASUREMENT INTERVAL

250ns MIN

MEASURED

INTERVAL

(FIRST)

MEASURED

INTERVAL

(LAST)

1. If range is set to 1 event, first and last measured interval will coincide.

FIGURE 1. WAVEFORMS FOR TIME INTERVAL MEASUREMENT (OTHERS ARE SIMILAR, BUT WITHOUT PRIMING PHASE)

UPDATE

Typical Performance Curves

20

15

10

FREQUENCY (MHz)

5

0

345 6

fA (MAX) FREQUENCY UNIT COUNTER,

FREQUENCY RATIO MODES

fA (MAX) fB (MAX) PERIOD,

TIME INTERVAL MODES

TA = 25oC

VDD-VSS (V)

FIGURE 2. fA(MAX), fB(MAX) AS A FUNCTION OF SUPPLY FIGURE 3. ICM7216A TYPICAL I

(mA)

DIG

I

300

200

100

4.5 ≤ VDD≤ 6.0V

0

0

85oC

123

V

DD-VOUT

-20oC

(V)

DIG

25oC

vs VDD-V

OUT

9-15

ICM7216A, ICM7216B, ICM7216D

Typical Performance Curves

30

4.5 ≤ VDD≤ 6V

20

(mA)

SEG

I

10

0

0 123

V

DD-VOUT

(Continued)

25oC

(V)

FIGURE 4. ICM7216B AND ICM7216D TYPICAL I

200

VDD = 5V

150

-20oC

SEG

-20oC

85oC

vs VDD-V

25oC

OUT

80

TA = 25oC

VDD = 5.5V

60

(mA)

40

SEG

I

20

0

01 23

FIGURE 5. ICM7216A TYPICAL I

80

VDD = 5V

60

VDD = 5V

V

OUT

(V)

SEG

-20oC

VDD = 4.5V

vs V

OUT

25oC

(mA)

100

DIGIT

I

50

0

0 123

V

(V)

OUT

FIGURE 6. ICM7216B AND ICM7216D TYPICAL I

200

TA = 25oC

50

(mA)

100

DIGIT

I

50

DIGIT

85oC

vs V

OUT

VDD = 5V

85oC

(mA)

40

SEG

I

20

0

0 123

(V)

V

OUT

FIGURE 7. ICM7216A TYPICAL I

VDD = 5.5V

VDD = 4.5V

SEG

vs V

OUT

0

01 23

V

(V)

OUT

FIGURE 8. ICM7216B AND ICM7216D TYPICAL I

9-16

DIGIT

vs V

OUT

ICM7216A, ICM7216B, ICM7216D

Description

INPUTS A and B

INPUTS A and B are digital inputs with a typical switching
threshold of 2V at V
peak-to-peak input signal should be at least 50% of the
supply voltage and centered about the switching voltage.
When these inputs are being driven from TTL logic, it is
desirable to use a pullup resistor. The circuit counts high to
low transitions at both inputs. (INPUT B is available only on
lCM7216A and lCM7216B).

Note that the amplitude of the input should not exceed the
device supply (above the V
than 0.3V, otherwise the device may be damaged.

Multiplexed Inputs

The FUNCTION, RANGE, CONTROL and EXTERNAL
DECIMAL POINT inputs are time multiplexed to select the
function desired. This is achieved by connecting the appro­priate Digit driver output to the inputs. The function, range
and control inputs must be stable during the last half of each
digit output, (typically 125µs). The multiplexed inputs are
active high for the common anode lCM7216A and active low
for the common cathode lCM7216B and lCM7216D.

Noise on the multiplex inputs can cause improper operation.
This is particularly true when the unit counter mode of
operation is selected, since changes in voltage on the digit
drivers can be capacitively coupled through the LED diodes
to the multiplex inputs. F or maxim um noise immunity, a 10kΩ
resistor should be placed in series with the multiplexed
inputs as shown in the application circuits.

Table 1 shows the functions selected by each digit for these
inputs.

TABLE 1. MULTIPLEXED INPUT FUNCTIONS

FUNCTION INPUT (Pin
3, lCM7216A and B
Only)

RANGE INPUT, Pin 14 0.01s/1 Cycle D1

CONTROL INPUT,
Pin 1

External DP INPUT (Pin
13, ICM7216D Only)

= 5V. For optimum performance the

DD

and below the VSS) by more

DD

FUNCTION DIGIT

Frequency D1
Period D8
Frequency Ratio D2
Time Interval D5
Unit Counter D4
Oscillator Frequency D3

0.1s/10 Cycles D2
1s/100 Cycles D3
10s/1K Cycles D4
Display Off D4 and

Display Test D8
1MHz Select D2
External Oscillator Enable D1
External Decimal Point

Enable
Decimal point is output for same digit

that is connected to this input.

Hold

D3

COUNTED
TRANSITIONS

250ns

MIN

50ns MIN

t

= tf = 10ns

r

= tf = 10s

t

r

INPUT B

4.5V

0.5V

FUNCTION = FREQUENCY, FREQUENCY RATIO,
UNIT COUNTER

4.5V

0.5V

AND fA(MAX) FOR FUNCTION = PERIOD AND
TIME INTERVAL

50ns MIN

MEASURED

INTERVAL

250ns

MIN

INPUT A

FIGURE 9. WA VEFORM FOR GU ARANTEED MINIMUM fA(MAX)

9.

INPUT A OR

FIGURE 10. WA VEFORM FOR GU ARANTEED MINIMUM fB(MAX)

Function Input
The six functions that can be selected are: Frequency,

Period, Time Interval, Unit Counter, Frequency Ratio and
Oscillator Frequency. This input is available on the

lCM7216A and lCM7216B only.
The implementation of different functions is done by routing

the different signals to two counters, called “Main Counter”
and “Reference Counter”. A simplified block diagram of the
device for functions realization is shown in Figure 11. Table 2
shows which signals will be routed to each counter in
different cases. The output of the Main Counter is the
information which goes to the display. The Reference
Counter divides its input by 1, 10, 100 and 1000. One of
these outputs will be selected through the range selector
and drive the enable input of the Main Counter. This means
that the Reference Counter , along with its associated blocks,
directs the Main Counter to begin counting and determines
the length of the counting period. Note that Figure 11 does
not show the complete functional diagram (See the
Functional Block Diagram). After the end of each counting
period, the output of the Main Counter will be latched and
displayed, then the counter will be reset and a new
measurement cycle will begin. Any change in the
FUNCTION INPUT will stop the present measurement
without updating the display and then initiate a new
measurement. This prevents an erroneous first reading after
the FUNCTION INPUT is changed. In all cases, the 1-0
transitions are counted or timed.

9-17

ICM7216A, ICM7216B, ICM7216D

INTERNAL CONTROL

FUNCTION

Frequency (f
Period (t
Ratio (f
Time Interval

(A→B)
Unit Counter

(Count A)
Osc. Freq.

(f

OSC

) Oscillator Input A

A

A/fB

)

100Hz

INPUT A
INPUT B

INTERNAL OR

EXTERNAL

OSCILLATOR

INPUT A

FIGURE 11. SIMPLIFIED BLOCK DIAGRAM OF FUNCTIONS IMPLEMENTATION

TABLE 2. 7216A/B INPUT ROUTING

MAIN

COUNTER REFERENCE COUNTER

) Input A 100Hz (Oscillator ÷105 or 104)

A

) Input A Input B

Oscillator Input A

Input B

Input A Not Applicable

Oscillator 100Hz (Oscillator ÷105 or 104)

INPUT

SELECTOR

INTERNAL CONTROL

INPUT

SELECTOR

Frequency - In this mode input A is counted by the Main

Counter for a precise period of time. This time is determined
by the time base oscillator and the selected range. For the
10MHz (or 1MHz) time base, the resolutions are 100Hz,
10Hz, 1Hz and 0.1Hz. The decimal point on the display is
set for kHz reading.

Period - In this mode, the timebase oscillator is counted by
the Main Counter for the duration of 1, 10, 100 or 1000
(range selected) periods of the signal at input A. A 10MHz
timebase gives resolutions of 0.1µs to 0.0001µs for 1000
periods averaging. Note that the maximum input frequency
for period measurement is 2.5MHz.

Frequency Ratio - In this mode, the input A is counted by
the Main Counter for the duration of 1, 10, 100 or 1000
(range selected) periods of the signal at input B. The fre­quency at input A should be higher than input B for meaning­ful result. The result in this case is unitless and its resolution
can go up to 3 digits after decimal point.

Time Interval - In this mode, the timebase oscillator is
counted by the Main Counter for the duration of a 1-0 transi­tion of input A until a 1-0 transition of input B. This means
input A starts the counting and input B stops it. If other ranges,
except 0.01s/1 cycle are selected the sequence of input A and
B transitions must happen 10, 100 or 1000 times until the

INTERNAL CONTROL

CLOCK

REFERENCE COUNTER

÷1 ÷10 ÷100 ÷1000

INTERNAL CONTROL

RANGE SELECTOR

ENABLE
CLOCK

MAIN COUNTER

display becomes updated; note this when measuring long
time intervals to give enough time for measurement comple­tion. The resolution in this mode is the same as for period
measurement. See the Time Interval Measurement section
also.

Unit Counter - In this mode, the Main Counter is always
enabled. The input A is counted by the Main Counter and
displayed continuously.

Oscillator Frequency - In this mode, the device makes a
frequency measurement on its timebase. This is a self test
mode for device functionality check. For 10MHz timebase
the display will show 10000.0, 10000.00, 10000.000 and
Overflow in different ranges.

Range Input

The RANGE INPUT selects whether the measurement
period is made for 1, 10, 100 or 1000 counts of the Refer­ence Counter. As it is shown in Table 1, this gives different
counting windows for frequency measurement and various
cycles for other modes of measurement.

In all functional modes except Unit Counter, any change in
the RANGE INPUT will stop the present measurement
without updating the display and then initiate a new mea­surement. This prevents an erroneous first reading after the
RANGE INPUT is changed.

Control Input

Unlike the other multiplexed inputs, to which only one of the
digit outputs can be connected at a time, this input can be
tied to different digit lines to select combination of controls.
In this case, isolation diodes must be used in digit lines to
avoid crosstalk between them (see Figure 17). The direction
of diodes depends on the device version, common anode or
common cathode. For maximum noise immunity at this input,
in addition to the 10K resistor which was mentioned before,
a 39pF to 100pF capacitor should also be placed between
this input and the V

or VSS (See Figure 17).

DD

Display Off - To disable the display drivers, it is necessary to
tie the D4 line to the CONTROL INPUT and have the HOLD

9-18

ICM7216A, ICM7216B, ICM7216D

input at VDD. While in Display Off mode, the segments and
digit drivers are all off, leaving the display lines floating, so the
display can be shared with other devices. In this mode, the
oscillator continues to run with a typical supply current of

1.5mA with a 10MHz crystal, but no measurements are made
and multiplexed inputs are inactive. A new measurement
cycle will be initiated when the HOLD input is switched to
V

.

SS

Display Test - Display will turn on with all the digits showing
8s and all decimal points on. The display will be blanked if
Display Off is selected at the same time.

1MHz Select - The 1MHz select mode allows use of a 1MHz
crystal with the same digit multiplex rate and time between
measurement as with a 10MHz crystal. This is done by
dividing the oscillator frequency by 10

4

rather than 105. The
decimal point is also shifted one digit to the right in period
and time interval, since the least significant digit will be in µs
increment rather than 0.1µs increment.

External Oscillator Enable - In this mode, the signal at EXT
OSC INPUT is used as a timebase instead of the on-board
crystal oscillator (built around the OSC INPUT, OSC OUT­PUT inputs). This input can be used for an external stable
temperature compensated crystal oscillator or for special
measurements with any external source. The on-board crys­tal oscillator continues to work when the external oscillator is
selected. This is necessary to avoid hang-up problems, and
has no effect on the chip's functional operation. If the on­board oscillator frequency is less than 1MHz or only the
external oscillator is used, THE OSC INPUT MUST BE
CONNECTED TO THE EXT OSC INPUT providing the time­base has enough voltage swing f or OSC INPUT (See Electri­cal Specifications). If the external timebase is TTL level a
pullup resistor must be used for OSC INPUT. The other way
is to put a 22MΩ resistor between OSC INPUT and OSC
OUTPUT and capacitively couple the EXT OSC INPUT to
OSC INPUT. This will bias the OSC INPUT at its threshold
and the drive voltage will need to be only 2V

. The exter-

P-P

nal timebase frequency must be greater than 100kHz or the
chip will reset itself to enable the on-board oscillator.

low) is stopped, the main counter is reset and the chip is
held ready to initiate a new measurement as soon as HOLD
goes low. The latches which hold the main counter data are
not updated, so the last complete measurement is displayed.
In unit counter mode when HOLD input is at V

DD

, the
counter is not stopped or reset, but the display is frozen at
that instantaneous value. When HOLD goes low the count
continues from the new value in the new counter.

RESET Input

RESET input resets the main counter, stops any

The
measurement in progress, and enables the main counter
latches, resulting in an all zero output. A capacitor to ground
will prevent any hang-ups on power-up.

MEASUREMENT IN PROGRESS

This output is provided in lCM7216D. It stays low during
measurements and goes high for intervals between mea­surements. It is provided for system interf acing and can driv e
a low power Schottky TTL or one ECL load if the ECL device
is powered from the same supply as lCM7216D.

Decimal Point Position

Table 3 shows the decimal point position for different modes
of lCM7216 operation. Note that the digit 1 is the least signif­icant digit. Table 3 is for 10MHz timebase frequency.

Overflow Indication

When overflow happens in any measurement it will be indicated
on the decimal point of the digit 8. A separate LED indicator can
be used. Figure 12 shows how to connect this indicator .

a

f

b

g

e

c

d

DP

External Decimal Point Enable - In this mode, the EX DP

INPUT is enabled (lCM7216D only). A decimal point will be
displayed for the digit that its output line is connected to this
input (EX DP INPUT). Digit 8 should not be used since it will
override the overflow output. Leading zero blanking is effec-

FIGURE 12. SEGMENT IDENTIFICATION AND DISPLAY FONT

Overflow will be indicated on the decimal point output of
digit 8. A separate LED overflow indicator can be connected
as follows:

tive for the digits to the left of selected decimal point.

Hold Input

Except in the unit counter mode, when the HOLD input is
at V

, any measurement in progress (before STORE goes

DD

TABLE 3. DECIMAL POINT POSITIONS

FREQUENCY

RANGE FREQUENCY PERIOD

0.01s/1 Cycle D2 D2 D1 D2 D1 D2

0.1s/10 Cycle D3 D3 D2 D3 D1 D3
1s/100 Cycle D4 D4 D3 D4 D1 D4
10s/1K Cycle D5 D5 D4 D5 D1 D5

RATIO

DEVICE CATHODE ANODE

ICM7216A Decimal Point D8
ICM7216B/D D8 Decimal Point

TIME

INTERVAL

UNIT

COUNTER

OSCILLATOR

FREQUENCY

9-19

ICM7216A, ICM7216B, ICM7216D

Time Interval Measurement

When in the time interval mode and measuring a single
event, the lCM7216A and lCM7216B must first be “primed”
prior to measuring the event of interest. This is done by first
generating a negative going edge on Channel A follo wed by a
negative going edge on Channel B to start the “measurement
interval”. The inputs are then primed ready for the measure­ment. Positive going edges on A and B, before or after the
priming, will be needed to restore the original condition.

Priming can be easily accomplished using the circuit in
Figure 13.

SIGNAL A

2

SIGNAL B

V

DD

N.O.

FIGURE 13. PRIMING CIRCUIT , SIGNALS A AND B BO TH HIGH

PRIME

1

100K

V

SS

DEVICE TYPE

V

DD

150K

11 1

1N914

1 CD4049B Inverting Buffer
2 CD4070B Exclusive - OR

OR LOW

0.1µF

V

SS

2

10K

V

INPUT A

INPUT B

10nF

SS

Following the priming procedure (when in single event or 1
cycle range) the device is ready to measure one (only)
event.

When timing repetitive signals, it is not necessary to “prime”
the lCM7216A and lCM7216B as the first alternating signal
states automatically prime the device. See Figure 1.

= Crystal Static Capacitance

C

O

= Crystal Series Resistance

R

S

= Input Capacitance

C

IN

= Output Capacitance

C

OUT

ω = 2πf
The required g

should not exceed 50% of the gM specified

M

for the lCM7216 to insure reliable startup. The OSCillator
INPUT and OUTPUT pins each contribute about 5pF to C
and C
C

OUT

. For maximum stability of frequency, CIN and

OUT

should be approximately twice the specified crystal

IN

static capacitance.
In cases where non decade prescalers are used it may be

desirable to use a crystal which is neither 10MHz or 1MHz.
In that case both the multiplex rate and time between mea­surements will be different. The multiplex rate is

f

MUX

f

OSC

-------------------= f

for 10MHz mode and for

4

210

×

MUX

f

OSC

-------------------=

3

210

×

the 1MHz mode. The time between measurements is

6

210

×

-------------------

in the 10MHz mode and in the 1MHz mode.

f

OSC

5

210

×

-------------------

f

OSC

The crystal and oscillator components should be located as
close to the chip as practical to minimize pickup from other
signals. Coupling from the EXTERNAL OSClLLATOR INPUT
to the OSClLLATOR OUTPUT or INPUT can cause undesir­able shifts in oscillator frequency.

Display Considerations

The display is multiplexed at a 500Hz rate with a digit time of
244µs. An interdigit blanking time of 6µs is used to prevent
display ghosting (faint display of data from previous digit
superimposed on the next digit). Leading zero blanking is
provided, which blanks the left hand zeroes after decimal
point or any non zero digits. Digits to the right of the decimal
point are always displayed. The leading zero blanking will be
disabled when the Main Counter overflows.

During any time interval measurement cycle, the ICM7216A
and lCM7216B require 200ms following B going low to
update all internal logic. A new measurement cycle will not
take place until completion of this internal update time.

Oscillator Considerations

The oscillator is a high gain CMOS inverter. An external
resistor of 10MΩ to 22MΩ should be connected between the
OSCillator INPUT and OUTPUT to provide biasing. The
oscillator is designed to work with a parallel resonant 10MHz
quartz crystal with a static capacitance of 22pF and a series
resistance of less than 35Ω.

For a specific crystal and load capacitance, the required g
can be calculated as follows:

C

gMω2CINC

=



where C

-------------------------------- -

=



L

CINC



OUTRS

CINC

+





OUT

OUT

2

O

1

--------+

C

L

The lCM7216A is designed to drive common anode LED
displays at peak current of 25mA/segment, using displays
with V

= 1.8V at 25mA. The average DC current will be over

F

3mA under these conditions. The lCM7216B and lCM7216D
are designed to drive common cathode displays at peak cur­rent of 15mA/segment using displays with V

= 1.8V at

F

15mA. Resistors can be added in series with the segment
drivers to limit the display current in very efficient displays, if
required. The Typical Performance Curves show the digit
and segment currents as a function of output voltage.

To get additional brightness out of the displays, V
increased up to 6.0V. However, care should be taken to see
that maximum power and current ratings are not exceeded.

M

The segment and digit outputs in lCM7216s are not directly
compatible with either TTL or CMOS logic when driving
LEDs. Therefore, level shifting with discrete transistors may
be required to use these outputs as logic signals.

9-20

DD

may be

ICM7216A, ICM7216B, ICM7216D

Accuracy

In a Universal Counter crystal drift and quantization effects
cause errors. In frequency, period and time interval
modes, a signal derived from the oscillator is used in either
the Reference Counter or Main Counter. Therefore, in
these modes an error in the oscillator frequency will cause
an identical error in the measurement. For instance, an
oscillator temperature coefficient of 20
measurement error of 20

0

0.01s

2

0.1s
1s

10s

4

1 CYCLE

10 CYCLES

2

10

CYCLES

3

CYCLES

10

SIGNIFICANT DIGITS

6

MAXIMUM NUMBER OF

8

11010

/oC.

PPM

FREQUENCY MEASURE

PERIOD MEASURE
f

OSC

3

FREQUENCY (Hz)

/oC will cause a

PPM

= 10MHz

5

10

7

10

In addition, there is a quantization error inherent in any digital
measurement of ±1 count. Clearly this error is reduced by dis­playing more digits. In the frequency mode the maximum
accuracy is obtained with high frequency inputs and in period
mode maximum accuracy is obtained with low frequency
inputs (as can be seen in Figure 14). In time interval mea­surements there can be an error of 1 count per interval. As a
result there is the same inherent accuracy in all ranges as
shown in Figure 15. In frequency ratio measurement can be
more accurately obtained by averaging over more cycles of
INPUT B as shown in Figure 16.

0

1

2

3

4

5

SIGNIFICANT DIGITS

MAXIMUM NUMBER OF

6

MAXIMUM TIME INTERVAL

7

8

101

MAXIMUM TIME INTERVAL

3

INTERVALS

FOR 10

MAXIMUM TIME
INTERVAL FOR
10

FOR 10 INTERVALS

2

10310410510610710

10

TIME INTERVAL (µs)

2

INTERVALS

8

FIGURE 14. MAXIMUM ACCURA CY OF FREQUENCY AND

PERIOD MEASUREMENTS DUE TO LIMITATIONS
OF QUANTIZATION ERRORS

0

1

2

3

4

5

SIGNIFICANT DIGITS

MAXIMUM NUMBER OF

6

7

8

10

101

2

FIGURE 15. MAXIMUM ACCURACY OF TIME INTERVAL MEA-

SUREMENT DUE TO LIMITATIONS OF QUANTIZA­TION ERRORS

RANGE

1 CYCLE
10 CYCLES

2

10

CYCLES

3

CYCLES

10

3

10

10410510610710

fA/f

B

8

FIGURE 16. MAXIMUM ACCURACY FOR FREQUENCY RATIO MEASUREMENT DUE TO LIMITATION OF QUANTIZATION ERRORS

9-21

Test Circuit

FUNCTION

GENERATOR

FUNCTION

GENERATOR

FUNCTION

F
P

FR

TI.
U.C.
O.F.

6

D8

D2
D5

D4

OVERFLOW

INDICATOR

10K

D1

D3

RESET

LED

INPUT B

DP

e

g

a

d
b

c

f

8

ICM7216A, ICM7216B, ICM7216D

39pF

10MHz

CRYSTAL

RANGE

D1

D2
D3

D4

V

DD

DISPLAY

BLANK

39pF

TYP

8

TYPICAL CRYSTAL SPECS:
F = 10MHz PARALLEL RESONANCE
C
R

.01/1
.1/10
1/100
10/1K

DISPLAY

TEST

1MHz

D4 D8 D2 D1 D5

1N914s

= 22pF

L

= <35Ω

S

4

V

DD

10kΩ

22MΩ

1
2
3
4
5
6
7
8

9
10
11
12
13
14

INPUT A

ICM7216A

100pF

V

DD

HOLD

10kΩ

28
27
26
25
24
23
22
21
20
19
18
17
16
15

D1

D2
D3
D4
D5

D6
D7
D8

V

DD

10kΩ

a
b
c
d
e
f

g

DP

D8 D8 D7 D6 D5 D4 D3 D2 D1

EXT

OSC

EXT
OSC

INPUT

TEST

8

FIGURE 17. TEST CIRCUIT (ICM7216A SHOWN, OTHERS SIMILAR)

Typical Applications

The lCM7216 has been designed for use in a wide range of
Universal and Frequency counters. In many cases, prescalers
will be required to reduce the input frequencies to under 10MHz.
Because INPUT A and INPUT B are digital inputs, additional
circuitry is often required for input buffering, amplification,
hysteresis, and le vel shifting to obtain a good digital signal.

The lCM7216A or lCM7216B can be used as a minimum
component complete Universal Counter as shown in
Figure 18. This circuit can use input frequencies up to
10MHz at INPUT A and 2MHz at INPUT B. If the signal at
INPUT A has a very low duty cycle it may be necessary to
use a 74LS121 monostable multivibrator or similar circuit to
stretch the input pulse width to be able to guarantee that it is
at least 50ns in duration.

To measure frequencies up to 40MHz the circuit of Figure
19 can be used. To obtain the correct measured value, it is
necessary to divide the oscillator frequency by four as well
as the input frequency. In doing this the time between

measurements is also lengthened to 800ms and the display
multiplex rate is decreased to 125Hz.

If the input frequency is prescaled by ten, then the oscillator
can remain at 10MHz or 1MHz, but the decimal point must
be moved one digit to the right. Figure 20 shows a frequency
counter with a

÷10 prescaler and an lCM7216A. Since there

is no external decimal point control with the lCM7216A and
lCM7216B, the decimal point may be controlled externally
with additional drivers as shown in Figure 20. Alternatively, if
separate anodes are available for the decimal points, they
can be wired up to the adjacent digit anodes. Note that there
can be one zero to the left of the decimal point since the
internal leading zero blanking cannot be changed. In
Figure 21 additional logic has been added to count the input
directly in period mode for maximum accuracy. In Figures 20
and 21, INPUT A comes from Q
than Q

to obtain an input duty cycle of 40%.

D

of the prescaler rather

C

9-22

INPUT A

ICM7216A, ICM7216B, ICM7216D

V

DD

10kΩ

39pF

TYP

HOLD

100pF

V

DD

DISPLAY

CONTROL

SWITCHES

BLANK

DISPLAY

TEST

EXT

OSC

ENABLE

F.R.

T.I.

U.C.

O.F.

F
P

6

INPUT B

D8

D2
D5

D4

FUNCTION

0.1µF

RESET

DIGIT

DRIVERS

1

2

10
11
12
13
14

3

4

5

6

7

ICM7216B

8

9

COMMON CATHODE LED DISPLAY

10kΩ

D1

D1

D2
D3

D4

D5

D3

D6
D7
D8

8

D8 D7 D6 D5 D4 D3 D2 D1

28
27
26
25
24
23
22
21
20
19
18
17
16
15

100kΩ

DP

g
e
a
d

b
c

f

RANGE

10kΩ

8

FIGURE 18. 10MHz UNIVERSAL COUNTER

22MΩ

10MHz

CRYSTAL

39pF

V

DD

D1

D2
D3

D4

SEGMENT DRIVERS

D1 0.01 1.0
D2 0.1 10.0
D3 1.0 100.0
D4 10.0 1K

D4 D8 D1

IN914s

4

SEC CYCLES

8

a
b
c
d
e

f

g

DP

D8

LED

OVERFLOW

INDICATOR

3

EXT
OSC
INPUT

V

DD

8

9-23

INPUT A

J3 1CL K2
P
4

Q6

1

/274LS112

Q5

ICM7216A, ICM7216B, ICM7216D

C
15

V+

K12 13 CL J11

10

Q7

100pF

0.1µF

RESET

OVERFLOW

INDICATOR

LED

1

/274LS112

D1
D2
D3

D4

D5
D6
D7
D8

8

V

C

Q9

1
2
3
4
5
6
7
8

9
10
11
12
13
14

14P

ICM7216D

3kΩ

10kΩ

28
27
26
25
24
23
22
21
20
19
18
17
16
15

a
b

V

DD

HOLD

100kΩ

DP

g
e

a
d

V

DD

b
c

f

10kΩ

COMMON CATHODE LED DISPLAY

DD

39pF

22MΩ

2.5MHz

CRYSTAL

8

c
d
e
f

g

DP
D8

D8 D7 D6 D5 D4 D3 D2 D1

D1

D4

V

DD

RANGE

D2
D3

39pF

EXT

DISPLAY

OSC

ENABLE

OFF

D1 D4 D8

IN914s

4

a
b
c
d
e

f

g

DP

8

OVERFLOW

INDICATOR

DISPLAY

TEST

3

EXT

OSC

INPUT

FIGURE 19. 40MHz FREQUENCY COUNTER

9-24

ICM7216A, ICM7216B, ICM7216D

INPUT B INPUT A

CK1 CK2

QA
QC

74LS90 OR

11C90

V

3kΩ

DD

0.1µF

RESET

F
P

F.R.

10kΩ

D1

D8

D2

CK2CK1

QA
QC

11C90

D2
D3

22MΩ

V

DD

39pF

CRYSTAL

44

10MHz

D2
D3

V

DP

DD

D1

D4

DP

g

d
b

V

DD

V

DD

100pF

1
2
3
4

e

a

c

f

8

5
6
7

ICM7216A

8

9
10
11
12
13
14

a
b

COMMON ANODE LED DISPLAY

3kΩ

28
27
26
25
24
23
22
21
20
19
18
17
16
15

HOLD

D1

D2
D3
D4
D5

V
D6
D7
D8

10kΩ

10kΩ

10kΩ

DD

RANGE

D1

D4

c
d
e
f

g

D8 D8 D7 D6 D5 D4 D3 D2 D1

LED
OVERFLOW
INDICATOR

30pF

TYP

1kΩ

DISPLAY

1N914

2N2222

TEST

1kΩ

D7

8

DP

V

SS

40Ω

8

FIGURE 20. 100MHz MULTIFUNCTION COUNTER

9-25

INPUT A

ICM7216A, ICM7216B, ICM7216D

11C90
CK1
CK2 QA OC

V

DD

3kΩ

10kΩ

V

DD

FUNCTION SWITCH

OPEN: FREQ.
CLOSED: PERIOD

0.1µF

RESET

10kΩ

1

CONT

4

CONT

D1
13

D8
5

2

CD4016

3

3kΩ

V

DD

39pF

10MHz

CRYSTAL

44

D2
D3

V

DP

D1

D4

DD

39pF

TYP

2N2222

1kΩ

V

DD

V

DD

HOLD

28
27
26
25
24
23
22
21
20
19
18
17
16
15

10kΩ

D1

D2
D3
D4
D5

D6
D7
D8

V

DD

100kΩ

8

RANGE

D1

D4

10kΩ

22MΩ

D2
D3

V

DP

g

d
b

74LS00

100pF

1

+

2
3
4

e

a

c

5
6
7

ICM7216A

8

9
10
11
12

f

13
14

8

a
b

COMMON CATHODE LED DISPLAY

c
d
e
f

g

D8 D8 D7 D6 D5 D4 D3 D2 D1

2N2222

D3

V

2N2222

SS

1kΩ

1kΩ

DP

10kΩ

10kΩ

V

40Ω

8

SS

LED

OVERFLOW

INDICATOR

FIGURE 21. 100MHz FREQUENCY, 2MHz PERIOD COUNTER

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries f or its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under an y patent or patent rights of Intersil or its subsidiaries.

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9-26