545 East Brokaw Road
San Jose, CA 95112, U.S.A.
Phone: (408) 451-8838
Fax: (408) 451-8839
Email: Sales@IC-Media.Com
Web Site: www.ic-media.com
Important notice: This document contains information of a new product. IC Media Corp
reserves the right to make any changes without further notice to any product herein to improve
design, function or quality and reliability. No responsibility is assumed by IC Media Corp for its
use, nor for any infringements of patents of third parties which may result from its use.
IC Media Technology Corporation
6F, No. 61, ChowTze Street., NeiHu District
Taipei, Taiwan, R.O.C.
Phone: 886-2-2657-7898
Fax: 886-2-2657-8751
Email: Ap.Sales@IC-Media.Com.tw
Web Site: www.ic-media.com.tw
• 277,242 (574x483) pixels, used with 1/4” optical system
• Output: NTSC-M, NTSC-J composite video
• Input interface: SIF
• Automatic exposure control
• Electronic exposure control
• On-chip 9-bit ADC
• Correlated double sampling
• On-chip digital signal processing
• Real-time color interpolation
• Automatic white balancing and color correction
• Programmable hue and contrast saturation
• Programmable luma and chroma
• Programmable gamma correction
• Automatic optical black compensation
• Horizontal & vertical images
• Low lux indicator pin(optional package)
• Scrambling control pin(optional package)
• Single 3.3 V power supply
• Low power consumption
• Capable of digital CVBS signal output
General Description
ICM-515NB is a single-chip digital color video imaging device. It incorporates a 574x483 sensor array (584x493 in
physical layout) operating at 30 frames per second (60 fields/sec) in interlaced manner. Correlated double sampling
is performed by the internal ADC and timing circuitry. Depending on the brightness of the scene, the raw data can be
adjusted by an automatic (or manual) exposure control (AE). The raw data are further processed by a color
interpolation module so that each pixel gets a complete set of RGB values. To correct or enhance color, white
balancing and color correction are also performed automatically on chip. At the next stage, the gamma correction can
also be performed. After these digital processing steps, the signal is fed to an embedded NTSC encoder that generates
composite video output to be sent to a TV for display.
1. Pin Assignment (Preliminary, subject to change)
Pin # Name Class* Function
13 XIN A, I Crystal input / external clock input
14 XOUT A, O Crystal output
35 PCLK
(LLLED)*
33 SIF ID
(SLWTSEL)*
34 MSSEL
(ENCRYPT)*
1 SCL D, I/O SIF clock
48 SDA D, I/O SIF data
17 RSET A, I
9 RSETD A, I
10 RSTN D, I, U Chip reset, active low
3 VSYNC D, I/O Vertical sync signal Output or Input
2 HSYNC D, I/O Horizontal sync signal Output Or Input
7 CPOUT(CVB
S)
15 POWERDN D, I, U Power down control, 0: power down, 1: active
18 AFSEL D, I, N Anti-flickering selection; 0: 60Hz(default), 1: 50Hz
47, 46,45, 44, 43,
40, 39, 38, 37, 36
16 RAMP A, O Analog ramp output
11, 32 VDDA P Sensor analog power
12, 31 GNDA P Sensor analog ground
30 VDDD P Sensor digital power
19 GNDD P Sensor digital ground
6 VDDC P DAC analog power
8 GNDC P DAC analog ground
4, 41 VDDK P Digital power
5, 42 GNDK P Digital ground
Class Code: A – Analog signal; D – Digital signal; I – Input; O – Output; P – Power or ground; U – Internal
pull-up; N – Internal pull-down
* Option thru different bonding at packaging
DOUT[9:0] D, I/O Digital input & output for analysis purpose only
D, O Pixel clock output;
(Low-lux Indicator, 1: low-lux, 0: normal)
D, I, N Lsb of SIF slave address (0: 0x20 , 1: 0x21)
(Wavetable selection with short(0) or long IRST(1))
D, I, U
(D,I,N)
ICM-515NB is a single-chip digital color imaging device. It includes a 574x483 sensor array, 574 column-level
ADC, correlated double sampling circuitry, an automatic exposure control module, a color interpolation module,
programmable white balancing, a color correction module and a programmable gamma correction module. All the
programmable parameters are set by writing into the SIF interface which can address the register file consisting of
8-bit registers. The output format is NTSC composite video, which includes horizontal and vertical sync signals.
SIF
Interface
Timing
Control
Sensor Array
574x483
Column-Level
ADC
Correlated
Double
Sampling
Sensor
Control
Module
Figure 1. Block diagram
2.1 Image Array
The image array consists of 574x483 pixels. Each pixel has a light sensitive photo diode and a set of control and
transfer transistors. At the beginning of the cycle, a row of pixels is pre-charged to its maximum value. Then the
row is exposed to light for several lines worth of time and sampled by the ADC. A “Correlated Double Sampling
(CDS)” process is performed with subtracting the reset value (sampled right before sampling the signal) from the
signal value. The purpose of CDS is to eliminate the point-wise fixed pattern noise (FPN). The output of CDS is
approximately proportional to the amount of received light, ranging from 0 to 512.
Each pixel is covered by a color (R, G, or B) filter. Since each pixel only gets part of the spectral band, the data
need further processing (i.e., color interpolation and color correction) in order to produce the full visible spectrum
for best image quality.
ICM-515NB incorporates the following digital signal processing functions.
An automatic exposure (AE) time control to accommodate for different brightness, the AE feature will adjust the
exposure time thru various gain control mechanisms to achieve the appropriate brightness.
An anti-flickering control circuit to eliminate flickering caused by a 50Hz or 60Hz light source normally found
indoors.
A color interpolation and Automatic White Balance (AWB) module to perform color interpolation and gain on
each color pixel to obtain a set of correlated RGB value for each pixel. The result of this operation is a data stream
consisting of 24-bit RGB per pixel with balanced color components.
A color control module to adjust color contrast, hue, and saturation.
To boost darker signal to match the video monitor characteristic, gamma correction are performed:
γ
/1
VV =
io
where V
normalized final output. The parameter γ is programmable with default value of 2.2.
is normalized (ranged from 0 to 1) R, G, or B signal coming from the white balancing module, and Vo is
i
2.3 Output Format
The output format of ICM-515NB is analog composite video output suitable for TV display. This output is tied
through a parallel 75 Ω ohms resistor to ground, and to a pi-network of one 1.7 µH inductor and two 560 pF
capacitors, before connecting to a 75 Ω cable.
Address Name Default Description
0x00 PART_CONTROL 0x4a Processing control
[0] Reserved
[1] (One shot) Auto-slope, 1:enable, 0: disable;
[2] Exposure time control, writing a 1 will
activate the new value set in
AD_EXPOSE_TIME, when read back from
it, 0 means the exposure time change is
finished. 1 means either the exposure time
change is still in progress
[3] dead pixel filter 1:enable 0:disable.
[4] Scrambling mode control, 0: normal, 1:enable
[5]Reserved
[6] Reserved
[7] Latent change, writing a 1 means the changed
latent registers now starts taking effect, when the
entire operation is done, the read back value of
this bit will change from 1 to 0.
0x01
0x02
TIMING_CONTROL_LOW
TIMING_CONTROL_HIGH
0x4041 Timing control
[0] Column count enable, set to 0 when filling
wave table, set to 1 when normal operation.
[1] HSYNC polarity, 0: active low, 1: active high.
[2] VSYNC polarity, 0: active low, 1: active high.
[7][3] Auto dark correction control:
00: disable auto dark,
01:when AE update,Auto dark function
10,11: enable auto dark
[4] Wavetable select, 0: wavetable timing
(default, register setting, short IRST),
1: Fixed setting timing(long IRST)
[5] ET_fast enable,
[10:0] Beginning of active line in terms of
column position
[11] Left-right Mirror image enable
[12] Up-Down Mirror image enable
[9:0] End of sensor array in terms of column
position, count by pclk
for field1, in terms of line position,
[3:2] row_begin2[9:8]
[5:4] stop_row_high[9:8]
ET_fast=0
[10:0] End of horizontal sync in terms of col_
cnt,count by clk
[9:0] End of vertical sync in terms of line position
[10:0] Gain coefficient (G1) , in unsigned 3.8
(default) format
[10:0] Gain coefficient.(B) , in unsigned 3.8
(default) format
[10:0] Gain coefficient.(G2) , in unsigned 3.8
(default) format
0,7: 9bit RAW data, default
1: control signal, 9bitX2
2: row address, 9bitX2
3: column address, 10bit
4: Test Register, 10bit
5: Data from DOUT, 10bit
6: line count 10bit
[4:3] DSP output selection
0:Y,Cb,Cr after AWB correction
1: Y,Cb,Cr after sharpen and Hue,saturation
adjust
2: Y,Cb,Cr after sharpen,Gamma,and
Hue,saturation adjust
3: Y,Cb,Cr after Sharpen ,Gamma ,
offset , Hue,saturation adjust
0x30 AD_SP_CTRL* 0x09 [4] 1: average interpolation, 0: adjacent
0x1E AD_AWB_GAIN_CTRL 0xF8 Min value: [3:0]x1/8; Max value: [7:4]x1/4
0x1F AD_AWB_WF_CTRL 0xB0 [4:0] AWB sampling frequency in terms of frame
0x34 AD_AWB_OVERFLOW* 0xFE
(254)
0x35 AD_AWB_BRIGHTTH* 0x00 [7:0] AWB Bright limit, if "G"/2 of pixel > Bright
0x36 AD_DG_GAIN* 0x20 [7:0] digital gain, 3.5 format
0x37 AD_WB_RED* 0x70 [7:0] white balance red gain, 2.6 format
0x38 AD_WB_GREEN* 0x80 [7:0] white balance green gain, 2.6 format
0x39 AD_WB_BLUE* 0x90 [7:0] white balance blue gain, 2.6 format
0:disable 1:enabl
[3] low pass adjust step, 0: 1/8, 1:1/4
[6] 0: Disable AWB either at low lux or AE is
changing; 1: AWB is always ON.
[7] AWB sampling area selection
0:Center 1:whole Frame
period: [4:0]x2;
[7:5] White pixel limit: 2^([7:5]+4)
[7:0] AWB overflow limit, if "R,G,B" of pixel >
(overflowx2+1), this pixel will not be satisfied.
0x43 AD_AESTEP 0xBF AE adjust step ratio to expected step
AD_BLL
AD_BLH
0xC0
[7:0] AE Y target, Y=(2R/8+5G/8+B/8)*1/2
[10:0] bright pixel number limit,10% of sampling
pixel number:2040 ,if the bright pixel number >
limit, this frame is over exposed, AE target is
reduced automatically by 10
[3:0] x1/8: min digital gain limit
[7:4] x1/2 max digital gain limit
[2:0]: 1/2^[2:0]: the ratio for ET increase step;
min step is (1/32)
[5:3:] 1/2^[5:3]: the ratio for ET decrease step;
min step is (1/32)
0x44 AD_AFSTEP 0x83 [7:0] Anti Flicker Exposure time adjust step under
30 fps, 131(60Hz), 158(50Hz)
0x45 AD_YBRIGHT 0x68
(104)
[7:0] Bright Limit, if "Y" > Birght Limit, the
pixel is bright pixel
AE and AWB status parameters for controller debugging purpose(read only)
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
AD_YCAverage
AD_Yaverage
AD_NTBPL
AD_NTBPH
AD_AWBR
AD_AWBG
AD_AWBB
AD_AWBpixelL
AD_AWBpixelH
AD_AWBRGBH
®
®
®
®
®
®
®
®
[7:0] Y average value for center of a frame
7:0] Y average value for a whole frame
[10:0] Number of too bright pixel
[7:0] R average value for a frame
[7:0] G average value for a frame
[7:0] B average value for a frame
[10:0] The number of pixel which is valid AWB
criteria
R,G,B average MSB
[0] Raverage[8] [1]Gaverage[8] [2]Baverage[8]
Output format, CDS and dead pixel control parameters
0x52 AD_INOUTSEL** 0x0b [7] Reserved
[6] choose the DAC source 0: CVBS(TV)
1:DSP input source according to
AD_DSP_CTRL
[5] swap Cb,Cr sequence when output YCbCr
[4:0] Normal output select
[4] 0:ouput DSP 1: output NTSC
[4:0]: 5'h0: 3.8 format rawdata after auto dark
5'h1: 4.7 format rawdata after auto dark
5'h2: 5.6 format rawdata after auto dark
5'h3: 6.5 format rawdata after auto dark
5'h4: rawdata after deadpixel remove and
sign process
5'h5: R channel data after interpolation
5'h6: G channel data after interpolation
5'h7: B channel data after interpolation
5'h8: control siganl adc_vector[8:0]
5'h9: sensor row[8:0]
5'ha: sensor column[9:0]
5'hb: DSP input source according to
AD_DSP_CTRL
5'hc: Reserved
5'hd: Y channel output according to
AD_DSP_CTRL output
5'he: YCbYCr or YCrYCb output
according to [5]
5'hf: CbYCrY or CrYCbY output
according to [5]
5'h10: digital CVBS output
5'h11: digital Chrominance(C) output
5'h12: digital luminance(Y) output
Wound pixel filter, autodark, dark offset parameters
0x8A
0x8B AD_HighLimit_L 0x90 highlimit[7:0]
0x8C AD_LowLimit_L 0x00 lowlimit[7:0]
0x8D AD_LowHighLimit_L 0x06 High limit for Lowluxlimit[7:0]
0x84 AD_DARK1_OFFSET 0x00 R dark offset [7] sign bit in 2’s complement
0x7F AD_DARK2_OFFSET 0x00 G1 dark offset [7] sign bit in 2’s complement
0x8E AD_DARK3_OFFSET 0x00 B dark offset [7] sign bit in 2’s complement
0x8F AD_DARK4_OFFSET 0x00 G2 dark offset [7] sign bit in 2’s complement
0x90 AD_DARK_DATA 0 [7:0]x2: When auto dark correction is disabled,
AD_Limit_H
0x6A [7:4]: turn-on threshold for low lux wound pixel
removal: ([7:4]+1)x1/4
[3] 1: enable wound pixel removal
[2] lowluxlimit[8]
[1] highlimit[8], [0]:lowlimit[8]
serve as the subtrahend for dark correction
Sensor array control parameters
0x91 AD_SLOPEREG 0x87 [3:0] Slope rate select, larger value means steeper
ramp slope, resulting in smaller value
[7:4] Slope begin voltage select
0: 1.0 V 1: 1.1 V
2: 1.2 V 3: 1.3 V
4: 1.4 V 5: 1.5 V
6: 1.6 V 7: 1.7 V
8: 1.8 V(default) 9: 1.9 V
a: 2.0 V b: 2.1 V
c: 2.2 V
0x92 AD_TXRSTSEL 0x22 [3:0] TXH voltage select
0: 1.4 V 1: 1.5 V
2: 1.7 V (default) 3: 1.9 V
4: 2.0 V 5: 2.1 V
6: 2.2 V 7: 2.3 V
8: Vdd 9: Vdda-0.1V
a: Vdda-0.2V b: Vdda-0.3V
c: Vdda
[6:4] TXL voltage select
0: 0.0 V 1: 0.6 V
2: 0.7 V (default) 3: 0.8 V
4: 1.0 V
0x93 AD_SUBPH_PULSE 0x10
(16)
0x94 AD_BITCONTROL 0x00 [6]: enable small amount of current into the
[10:0] Wave table end point, when it is reached,
the waveform will remain fixed until the start of
next row
[10:0] col_cnt position where the CDS
subtraction pulse is applied
(*) Synchronized with frame begin.
(**) Need PART_CONTROL[7] to change value, which synchronizes with frame begin.
® Read only
ICM515NB can work in three modes:
a. Normal Mode: RAW sensor data output from DOUT[9:0], TV signal output on CPOUT
b. DSP Test Mode: Test patterns including column addresses generated on-chip as input,
encoded as digital CVBS output to DOUT[9:0]
c. DAC Test Mode: external data can be applied to pins DOUT[9:0] to test DAC directly.
When captured by rising edge of PCLK, the output may have 1 clock delay if using
DAC’s LOOKAHEAD structure. Normal DAC mode will not have delay.
The three modes are controlled by:
AD-INOUTSEL(0X52), AD_DSP_CTRL(0X2f), TIMING_CONTROL_LOW(0X01)
AD_INOUTSEL AD_DSP_CTRL
8’h0b 8’h00 8’h41 a
8’h10 8’h03 8’h41 b
8’h4b 8’h05 8’h11 c