545 East Brokaw Road
San Jose, CA 95112, U.S.A.
Phone: (408) 451-8838
Fax: (408) 451-8839
Email: Sales@IC-Media.Com
Web Site: www.ic-media.com
Important notice: This document contains information of a new product. IC Media
Corp. reserves the right to make any changes without further notice to any product
herein to improve design, function or quality and reliability. No responsibility is
assumed by IC Media Corp. for its use, nor for any infringements of patents of third
parties that may result from its use.
IC Media Technology Corporation
6F, No. 61, ChowTze Street., NeiHu District
Taipei, Taiwan, R.O.C.
Phone: 886-2-2657-7898
Fax: 886-2-2657-8751
Email: Ap.Sales@IC-Media.Com.tw
Web Site: www.ic-media.com.tw
This is a single-chip digital color imaging device. It incorporates a 640 x 480 sensor array operating at
max. 30 frames per second in progressive manner. Each pixel is covered by a color filter, which formed a
so-called Bayer pattern. Correlated double sampling is performed by the internal ADC and timing
circuitry.
Depending on the brightness of the scene, the raw data can be adjusted by the digital gain for all pixels, or
be adjusted separately for the 4 Bayer pattern pixels. This is done either by the built-in automatic
exposure control circuit, or can be done manually by the external CPU via serial bus control.
The data are then processed by the color interpolation module so that each pixel will get a complete set of
RGB values. To correct or enhance color, automatic white balance circuit is built-in. The user may
perform white balancing and color correction manually by external CPU via serial bus too. Color
saturation control is programmable via serial bus, if user is not satisfied with the default settings
At the final stage, the gamma correction can also be performed, in addition to default value. The output
formats include 8/16-bit YCbCr, 24-bit, 16-bit RGB, and 8-bit raw data which can be fed to other DSP,
color processing, or compression chips.
13 Xin A, I Crystal in
14 Xout A, O Crystal out
2 PCLK D, O Pixel clock output
21 TEST D, I, N Test Mode Input Pin
22 SYNCMODE D, I, N Sync. Mode.
0: External Sync,
1: Internal Sync
23 PWRDOWN D, I,U Power Down Mode.
0:Enable
1:Disable
25 Enable D, I, U Data Output .
0:Disble
1:Enable
24 I2CA D, I, N LSB of serial bus address.
0: Device ID address 0x20
1: Device ID address 0x21
20 MSSEL D, I, U Serial bus master/slave selection.
0: Slave
1: Master
26 SCLOCK D, I/O Serial bus clock
27 SDATA D, I/O Serial bus data
16 GNDS P Substrate GND
18 RSET A, I Resistor to ground
51 KΩ @ Clock = 24Mhz
10 RSTN D, I, U Chip reset, active low
45, 46, 47,
48, 1, 3, 4,
9
28, 30, 34,
35, 36, 37,
38, 39
41 HSYNC D, I/O Horizontal sync signal
42 VSYNC D, I/O Vertical sync signal
40 BLANK D, O Video blank signal
15 RAMP A, O Analog ramp output
11, 33 VDDA P Analog power
12, 32 GNDA P Analog ground
6, 19, 43 VDDD,
5, 17, 44 GNDD
7, 31 VDDO P Pad power
8, 29 GNDO P Pad ground
Class Code:
A – Analog signal, D – Digital signal, I – Input, O – Output, P – Power or ground,
U – Internal pull-up, N – Internal pull-down
The image array consists of 640x480 pixels. Each pixel has a light sensitive photo diode and a set of
control and transfer transistors. At the beginning of the cycle, a row of pixels are pre-charged to its
maximum value. Then they are exposed to light for several lines worth of time and sampled by the ADC.
Correlated double sampling (CDS) is performed by subtracting the reset value (sampled right before
sampling the signal) from the signal value. The purpose of CDS is to eliminate the point-wise fixed
pattern noise (FPN). The output of CDS is approximately proportional to the amount of received light,
ranging from 0 to 255.
Color Filter
Each pixel is covered by a color filter. They form the Bayer Pattern as shown in Figure 2. (Row 0, Column
0) is covered by a Red filter, (Row 0, Column 1) and (Row 1, Column 0) by Green filters, and (Row 1,
Column 1) by a Blue filter. Since each pixel only gets part of the frequency band, the data need further
processing (i.e., color interpolation and color correction) in order to approximate the full visible spectrum.
RRGGRRGG
GBGBGBGB
RRGGRRGG
GBGBGBGB
Figure 2. Color filter Bayer pattern
Exposure and Gain Control
The brightness of the scene may change by a great amount that renders the captured image either
over-exposed or under-exposed. To accommodate for different brightness, the user may change the
exposure time by adjusting the AD_EXPOSE_TIMEH, and AD_EXPOSE_TIMEL. The exposure time is
measured in terms of the time to read out one line of data, which is equal to 64 µs (assuming the line
length is 770 @ 24 MHz). If the number of lines per frame is set at 520 (the default), the exposure time can
vary from 1 to 519 lines.
50/60Hz anti-flickering control
To eliminate the flickering caused by the 50Hz or 60Hz light source normally found indoor, an
anti-flickering control circuit is build in. The selection is between off and on. When it is on, then the
selection is between 50 or 60Hz.
The Auto Exposure circuit control the Exposure Time, Digital Gain, and Anti-flickering function
automatically. The following features are provided:
. Disable/Enable AE
. Disable/Enable Anti-flickering
. Disable/Enable Digital Gain
. Disable/Enable Fix Frame Rate
. Adjustable Maximum/Minimum Frame Rate
. Adjustable AE Target brightness value
The following registers are use to control these features:
0x3A (AD_AE_CTRL, Default = 7)
bit 0 : Disable/Enable AE
bit 1 : Disable/Enable Digital Gain
bit 2 : Disable/Enable Anti-flickering
bit 3 : Disable/Enable Fix Frame Rate
The default value enable AE, Anti-flickering, and Digital Gain.
0x3B (AD_AE_HIGH,AE Target value High Limit, Default = 0x65)
0x3C (AD_AE_LOW,AE Target value Low Limit, Default = 0x55)
Use AD_AEHIGH and AD_AELOW to set the target brightness of AE function.
0x3F,0x40 (AD_MAXFH, Maximum Frame Height, Default = 0x1450)
AD_MAXFH set the minimum frame rate of AE .
0x41,0x42 (AD_MINFH, Minimum Frame Height, Default = 0x208)
AD_MINFH set the maximum frame rate of AE .
0x44 (AD_AFSTEP, Anti-flickering Exposure Time Step, Default = 0x82)
Use AD_AFSTEP to setup 50 /60HZ Anti-flickering step.
Color Interpolation
Since the raw data coming out the sensor array has only one of the R, G, or B value for each pixel, we need
to perform interpolation to obtain a set of correlated RGB value for each pixel. The method used is based
on a 3x3 interpolation window. The result of this operation is a data stream consisting of 24-bit RGB per
pixel. After this step, the whole frame can be viewed as a color picture. However, since the RGB filters
and the photodiode are not perfect, the RGB values may have different strength. In addition, there are
some cross-talk among the RGB channels. That’s why we need the color correction (or white balancing)
step.
Due to the different transparency and the overlapping spectrum response of the R, G, and B filters, the
interpolated color may not be balanced. The Auto White Balancing performs the White Balance function
automatically . The following register are used to control the AWB function:
0x33 (AD_AWB_CTRL, Default = 3)
0 : Disable AWB
1 : Enable AWB with R,G,B range limited
3 : Enable AWB with no range limited
0x34 (AD_AWB_OVERFLOW, Default = 255)
Set the overflow value of the sampling pixel, if the sampling data is larger than
AD_AWB_OVERFLOW, then it will not be used for AWB processing. The default value 255 means
there is no limit on sampling data.
0x35 (AD_AWB_BRIGHT, Default = 0)
Set the minimum bright value of the sampling pixel, if the sampling data is less than
AD_AWB_BRIGHT, then it will not be used for AWB processing. The default value 0 means there is
no limit on sampling data.
When AWB function is disabled, the following registers are used to adjust the White Balance manually:
0x37 (AD_WB_RED, Default = 0x80 )
Set the RED Gain manually.
0x38 (AD_WB_GREEN, Default = 0x80)
Set the GREEN Gain manually.
0x39 (AD_WB_BLUE, Default = 0x80)
Set the BLUE Gain manually.
Sharpening
The following register are used to control the Sharpening function:
0x30 (AD_SHARP_CTRL, Default =9)
0 : Disable Sharpening.
8 : Sharpen Weight = 0.5 (light Sharpening)
9 : Sharpen Weight = 1 (default)
a : Sharpen Weight = 2
b : Sharpen Weight = 3
c : Sharpen Weight = 4
d : Sharpen Weight = 5
e : Sharpen Weight = 6
f : Sharpen Weight = 7 (heavy Sharpening)
0x31 (AD_SHARP_HIGH,Default =0x0a)
Sharpening High Tone Threshold.
0x32 (AD_SHARP_LOW,Default = 0x05)
Sharpening Low Tone Threshold.
The color saturation can be enhanced by adjusting the Saturation Factor register 0x2D
(AD_SATURATION, Default = 0x30).
The following examples show how to set the Saturation to 0, 1, 1.5, and 2:
Saturation 0 : AD_SATURATION = 0x00, no color (B/W)
1 : AD_SATURATION = 0x20
1.5: AD_SATURATION = 0x30
2.0: AD_SATURATION = 0x40
Gamma Correction
To boost darker signal to match the video monitor characteristic, gamma correction are performed:
γ
/1
VV =
io
where V
and V
0x2c (AD_GAMMA) to select one of them:
The Brightness offset can be adjusted by Brightness Offset register 0x2B (AD_BRIGHT_OFFSET,
Default =0). The default value =0 means the Brightness is not adjusted.
The following examples show how to increase/decrease the Brightness Level:
is normalized (ranged from 0 to 1) R, G, or B signal coming from the white balancing module,
i
is normalized final output. The Gamma values (parameter γ) are provided in 205B, use register
Note : *1 Need PART_CONTROL [7] to change value
*2 Need PART_CONTROL [2] to change value
Address Name Default Description
0x00 PART_CONTROL 0x00 Processing control
[0] Mode select
0: Normal mode,
1: Single frame mode
[2] Exposure time control, writing a 1 will
activate the new value set in
AD_EXPOSE_TIME, when read back from
it, 0 means either the exposure time change
is finished (in video mode) or the entire
frame is transmitted (in single frame
mode), 1 means either the exposure time
change is still in progress (in video mode)
or the frame is yet to finish (in single frame
mode)
[6:3] Frame rate,
0: 30 fps
1: 15 fps
2: 10 fps
3: 6 fps
4: 5 fps
5: 3 fps
6: 2 fps
7: 1 fps
[7] Latent change, writing a 1 means the
changed latent registers now starts taking
effect, when the entire operation is done,
the read back value of this bit will change
from 1 to 0.
[0] Reserved
[1] HSYNC polarity,
0: Active low
1: Active high
[2] VSYNC polarity
0: Active low
1: Active high.
[3] Auto dark correction
0: Disable
1: Enable
[4] Reserved
[7] Blank polarity
0: Active high
1: Active low
[8] Reserved
[9] Reserved
[10] Capture: when in single frame mode,
writing a 1 here will start a frame capture
[11] Reserved
[12] Reserved
[13] Reserved
[14] Reserved
[15] Reserved
[15:0] Frame height, should not be less than
AD_ROW_BEGIN + 298 (*1)
[9:0] Beginning of active line in terms of
column position (*1)
[10] Left-right Mirror image (*1)
0: Disable
1: Enable
[11] Up-Down Mirror image (*1)
0: Disable
1: Enable
[15:13] Raw Data Digital gain
0: 1
1: 2
2: 4
3: 8
4: 16
5: 32
6: 64
[15:0] Beginning of active frame in terms of
row position (*1)
[9:0] End of horizontal sync in terms of
column position (*1)
[15:0] End of vertical sync in terms of row
position (*1)
[15:0] Exposure time in terms of number of
rows (*2)
In different frame rate mode (controlled by PART_CONTROL[6:3]), the duty cycle (high time / clock
period) of the PCLK signal is described in the following table: