Datasheet ICM108B Datasheet (ICMED)

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

ICM108B 1.3 million pixel

Color CMOS image sensor

Data Sheet

V1.1

November, 2002

IC Media Corporation

545 East Brokaw Road San Jose, CA 95112, U.S.A. Phone: (408) 451-8838 Fax: (408) 451-8839 Email: Sales@IC-Media.Com Web Site: www.ic-media.com

Important notice: This document contains information of a new product. IC Media Corp. reserves the right to make any changes without further notice to any product herein to improve design, function or quality and reliability. No responsibility is assumed by IC Media Corp. for its use, nor for any infringements of patents of third parties that may result from its use.

IC Media Technology Corporation

6F, No. 61, ChowTze Street., NeiHu District Taipei, Taiwan, R.O.C. Phone: 886-2-2657-7898 Fax: 886-2-2657-8751 Email: Ap.Sales@IC-Media.Com.tw Web Site: www.ic-media.com.tw

page 1 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

Features

• 1.3 mega pixels (1280x1024) format

• Support sub-sampling at quarter (1/4), and quarter-quarter (1/16) mega pixel resolutions for higher

video frame rate

• Progressive readout

• Output data format: 10-bit raw data

• Input interface: SIF

• Electronic exposure control

• On-chip 11-bit ADC

• On-chip PLL

• Correlated double sampling

• Video mode and DSC mode

• Dead pixel removal

• Flash control

• Power down mode

• Automatic optical black compensation

• Horizontal and vertical images

• Single 3.3V power supply

General Description

ICM-108B is a single-chip digital color-imaging device. It incorporates a 1280x1024 sensor array capable of operating at up to 30 frames per second and sub-sampled quarter (1/4) and quarter-quarter (1/16) mega pixel resolutions, operating at higher frame rate in progressive manner. Each pixel is covered by a color filter, which formed a so-called Bayer pattern. Correlated double sampling is performed by the internal ADC and timing circuitry. The gains for raw data can be adjusted separately for the 4 Bayer pattern pixels. The output format is 10-bit raw data that can be fed to other DSP, color processing, or compression chips.

Applications

• Digital camcorder

• Digital still camera

• Video phone

• Video conferencing

• Video mail

• Video cellular phone

• PC camera

• Security system

• Visual toy

• Industrial image capture/analysis

• Environment monitor system

page 2 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

Key Parameters

• Number of pixels: 1280x1024

• Number of physical pixels: 1,333,860, (1290x1034)

• Frame rate: 30/15/10/5/4/3/2/1 fps

• Sub-sampling quarter (1/4) and quarter-quarter (1/16) mega pixel resolutions for higher frame rate

• Pixel size: 6 µm x 6 µm

• Sensor area: 7.68 mm x 6.144 mm

• Input clock: 6 MHz crystal, or external clock source of 6, 12, 24, 48, or 96 MHz through PLL or

bypass PLL

• Main clock frequency: 48 MHz; on-chip 11 bit ADC clock: 96MHz (2x of main clock frequency), for 30 fps operation.

• Mode exposure time: 31.25 µs (@ 30 fps, 1 line). Maximum exposure time ~ 60 s @ X1 mode (1 fps), 65535 lines

• RGB gain: 1/256 to 64 for individual Bayer pattern pixels depending on register setting.

• Sensitivity: 1.0 V/lux-sec (5200 K light source, 650 nm IR cutoff filter)

• Quantum Efficiency: 38 % (555 nm)

• Dynamic Range: 55 dB (relative to noise floor = temporal noise + quantization noise); 45 dB

(relative to total noise)

• Fill Factor: 36%

• S/N Ratio (temporal noise): 45 dB @ 75% full signal level

• S/N Ratio (total noise): 40 dB @ 75% full signal level

• Sensitive to infrared illumination source

• Power supply: 3.3V

• Power requirement: <100mA (@30fps) and <60mA (@15fps)

• Standby mode power: < 50uA

• Package: Plastic LCC48

page 3 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

1. Preliminary Pin Assignment

Pin # Name Class* Function 14 CLKSEL D, I, N Clock source selection

0: clocks pass PLL, use XIN (pin 12)

1: bypass PLL, use CLKIN (pin 11) 11 CLKIN D, I, N External clock source; bypass PLL 12 XIN A, I Crystal oscillator in, or external clock in; if external

clocks used, leave Xout (pin 13) unconnected 13 XOUT A, O Crystal oscillator out 33 PCLK D, O Pixel clock output 35 OEN D, I, N Output enable. 0: enable, 1: disable 31 SIF ID D, I, N LSB of SIF slave address 32 MSSEL D, I, U SIF master/slave selection. 0: slave, 1: master 2 SCL D, I/O SIF clock 1 SDA D, I/O SIF data 10 POWERDN D, I, N Power down control, 0: power down, 1: active 17 RSET A, I

8 RSTN D, I, U Chip reset, active low 48 DOUT[10] D, I/O Data output bit 10 47 DOUT[9] D, I/O Data output bit 9 46 DOUT[8] D, I/O Data output bit 8 45 DOUT[7] D, O Data output bit 7 44 DOUT[6] D, I/O Data output bit 6; if pulled up/down, the initial value

43 DOUT[5] D, I/O Data output bit 5; if pulled up/down, the initial value

40 DOUT[4] D, I/O Data output bit 4; if pulled up/down, the initial value

39 DOUT[3] D, I/O Data output bit 3; if pulled up/down, the initial value

38 DOUT[2] D, I/O Data output bit 2; if pulled up/down, the initial value

37 DOUT[1] D, I/O Data output bit 1; if pulled up/down, the initial value

36 DOUT[0] D, I/O Data output bit 0; if pulled up/down, the synchron-

3 HSYNC D, I/O Horizontal sync signal 5 VSYNC D, I/O Vertical sync signal 34 FLASH D, O Flash light control 15 RAMP A, O Analog ramp output 30,7 VDDA P Sensor analog power 29,9 GNDA P Sensor analog ground 19 VDDD P Sensor digital power 18 GNDD P Sensor digital ground 41,4 VDDK P Digital power 42,6 GNDK P Digital ground

Resistor to ground = 25 KΩ @ 48 MHz main clock,

(or 50KΩ @ 24 MHz main clock)

of TIMING_CONTROL_LOW[2] (VSYNC polarity)

is 1/0

of TIMING_CONTROL_LOW[1] (HSYNC polarity)

is 1/0

of AD_IDL[3] (Sub ID) is 1/0

of AD_IDL[2] (Sub ID) is 1/0

of AD_IDL[1] (Sub ID) is 1/0

of AD_IDL[0] (Sub ID) is 1/0

ization mode is in master/slave mode which requires

HSYNC and VSYNC operating in output/input mode

page 4 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

Class Code: A – Analog signal, D – Digital signal, I – Input, O – Output, P – Power or ground, U – Internal pull-up, N – Internal pull-down

2. Functional Description

ICM-108B is a single-chip digital color imaging device. It includes a 1280x1024 sensor array, 1280 column-level ADC, and correlated double sampling circuitry. All the programmable parameters are set by writing into the SIF interface which can address the register file consisting of 8-bit registers. The output format is 10-bit raw data, together with horizontal and vertical sync signals.

SIF

Interface

Timing & Function

Control

Sensor Array

1280 x 1024

Column-Level

ADC

Correlated

Double

Sampling

Individual

RGB gain control

RGB Bayer Pattern

Output Control

Figure 1. Block diagram

2.1 Image Array

The image array consists of 1280x1024 pixels. Each pixel has a light sensitive photo diode and a set of control transistors. At the beginning of the cycle, a row of pixels is pre-charged to its maximum value. Then the row is exposed to light for several lines worth of time and sampled by the ADC. A “Correlated Double Sampling (CDS)” process is performed with subtracting the reset value (sampled right before sampling the signal) from the signal value. The purpose of CDS is to eliminate the point-wise fixed pattern noise (FPN). The output of CDS is approximately proportional to the amount of received light, ranging from 0 to 1023.

page 5 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

2.2 Color Filter

Each pixel is covered by a color filter. They form the Bayer Pattern as shown in Figure 2. (Row 0, Column 0) is covered by a Red filter, (Row 0, Column 1) and (Row 1, Column 0) by Green filters, and (Row 1, Column 1) by a Blue filter. Since each pixel only gets part of the frequency band, the data need further processing (i.e., color interpolation and color correction) in order to approximate the full visible spectrum.

R G

G B

R G R G R G R G

G B G B G B G B

R G R G R G

G B G B G B

Figure 2. Color filter Bayer pattern

2.3 Exposure and Gain Control

The brightness of the scene may change by a great amount that renders the captured image either overexposed or under-exposed. To accommodate for different brightness, the user may change the exposure time by adjusting the AD_EXPOSE_TIMEH, and AD_EXPOSE_TIMEL. The exposure time is measured in terms of the time to read out one line of data, which is equal to 31.25 µs (assuming the line length is 1500 @ 48 MHz). If the number of lines per frame is set at 1100 (the default), the exposure time can vary from 1 to 1100 lines. In addition, users can adjust registers AD_M1_L, AD_M1_H, AD_M2_L, AD_M2_H, AD_M3_L, AD_M3_H, AD_M4_L, AD_M4_H, to optimize the individual Gr/R/B/Gb gain (default at 3.8 format for 1/256 to 8) of the 4 Bayer pattern pixels separately.

2.4 Timing Control

Timing control is performed with programming a 32-entry wave table. Its content can be filled by external circuitry after power up if other than default values are desirable. Bits 19 to 11 are the control signals. Bits 10 to 0 are the change position. Whenever the change position equals the column counter, a new set of signal values are applied. Please see the Wave Table Programming section for details.

page 6 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

2.5 Output Format

During normal operation, the output format is 10-bit raw data that ranges from 0 to 1023. It may be used for off-chip color processing or compression. A typical configuration is to connect ICM-108B to a USB1, a USB2, or a 1394/Compression combo chip. At 30 fps, the PCLK and main clock are both operating at 48 MHz.

In addition to the data pins, the chip also output VSYNC, HSYNC, and PCLK. The length and polarity of VSYNC and HSYNC can be adjusted through registers. The line and frame timing can be adjusted through registers AD_WIDTH and AD_HEIGHT.

2.6 SIF Interface

Register programming is through SIF interface (SCL and SDA pins). The default 7-bit SIF device address is 0x20, meanwhile the last bit can be configured by the SIF ID pin. ICM-108B can operate in either SIF master mode or slave mode right after power up, depending on the pull-up or pull-down of the MSSEL pin. When MSSEL is pulled low during power-up, ICM-108B’s SIF interface is operated as an SIF slave device, waiting to be controlled by an external SIF master such as a microprocessor. When MSSEL is pulled high during power-up, the SIF interface is first acting as an SIF master device trying to read from an external SIF EEPROM. After that, it will fall back to behave like an SIF slave.

page 7 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

3. SIF Registers

Address Name Default Description 0x00 PART_CONTROL 0 Processing control

[0] 0: normal video mode, 1: single frame mode [1] Reserved [2] Exposure time control, writing a 1 will activate the new value set in AD_EXPOSE_TIME, when read back from it, 0 means either the exposure time change is finished (in video mode) or the entire frame is transmitted (in single frame mode), 1 means either the exposure time change is still in progress (in video mode) or the frame is yet to finish (in single frame mode) [3] 0: normal mode, 1:sub-sampling mode [6:4] Frame rate, 0: 30 fps 1: 15 fps 2: 10 fps 3: 5 fps 4: 4 fps 5: 3 fps 6: 2 fps 7: 1 fps [7] Latent change, writing a 1 means the changed latent registers now starts taking effect, when the entire operation is done, the read back value of

this bit will change from 1 to 0. 0x01 0x02

0x0C AD_WIDTHL 0x05DC [10:0] Frame width

TIMING_CONTROL_LOW TIMING_CONTROL_HIGH

0x0011 Timing control

[0] Column count enable, set to 0 when filling

wave table, set to 1 when normal operation

[1] HSYNC polarity, 0: active low, 1: active high,

the initial value is determined by DOUT[5]

[2] VSYNC polarity, 0: active low, 1: active high,

the initial value is determined by DOUT[6]

[3] Auto dark correction enable

[4] Timing select, 0: wave table timing, 1: default

timing

[6] Flash polarity, 0: active low, 1: active high

[7] Blank polarity, 0: active low, 1: active high

[8] IRST select, 0: from wave table, 1: from

IRST_NUMBER register

[10] Capture: when in single frame mode, writing

a 1 here will start a frame capture

[12] Out-of-array exposure pointer control, 0:

point to row 1031, 1: point to row 1035 (a non-

existent row)

[13] Column stop, 0: sensor column counter stop

at 1289 when exceeding real array, 1: sensor

column counter keeps counting

page 8 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

0x0D AD_WIDTHH (1500) 0x0E 0x0F 0x10 0x11

0x14 0x15 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x40 0X41 0x42 0x43 0x44 0x45 0x52 AD_INOUTSEL 0 [4:0] Output format

0x53 AD_RAMPSEL 0 reserved 0x54 0x55 0x56 0x57 0x82 0x83

0x84 0x85

AD_HEIGHTL AD_HEIGHTH AD_COL_BEGINL AD_COL_BEGINH

AD_ROW_BEGINL AD_ROW_BEGINH AD_HSYNC_ENDL AD_HSYNC_ENDH AD_VSYNC_ENDL AD_VSYNC_ENDH AD_EXPOSE_TIMEL AD_EXPOSE_TIMEH AD_M1_L AD_M1_H AD_M2_L AD_M2_H AD_M3_L AD_M3_H AD_M4_L AD_M4_H AD_DARK_DATA_L AD_DARK_DATA_H AD_HighLimit 3FF

AD_LowLimit 0 [9:0] Apply dead pixel removal algorithm only to

AD_DSRSTL AD_DSRSTH AD_DSDATAL AD_DSDATAH AD_IDL AD_IDH

AD_FLASH_BEGINL AD_FLASH_BEGINH

0x044C (1100) 0x0064 (100)

0x000A (10) 0x0040 (64) 0x0003 (3) 0x044B (1099) 0x100 (256) 0x100 (256) 0x100 (256) 0x100 (256) 0 [9:0] When auto dark correction is disabled, serve

(1023)

0x0000 (0) 0x07D0 (2000) 0x9080 (36992)

0x040A (1034)

[15:0] Frame height, should not be less than

AD_ROW_BEGIN + (1034)

[10:0] Beginning of active line in terms of

column position

[11] Mirror image enable

[12] Up-down image enable

[15:0] Beginning of active frame in terms of row

position

[10:0] End of horizontal sync in terms of column

position

[15:0] End of vertical sync in terms of row

position

[15:0] Exposure time in terms of number of rows

[10:0] Gain coefficient (Gr) , in unsigned 3.8

(default) format

[10:0] Gain coefficient (R) , in unsigned 3.8

(default) format

[10:0] Gain coefficient.(B) , in unsigned 3.8

(default) format

[10:0] Gain coefficient.(Gb) , in unsigned 3.8

(default) format

as the subtrahend for dark correction

[9:0] Apply dead pixel removal algorithm only to

those pixel above HighLimit

those pixel below LowLimit

0: default, unsigned 3.8 format

1: default, unsigned 4.7 format

2: default, unsigned 5.6 format

3: default, unsigned 6.5 format

0-7: 10-bit raw data

8: control signals

9: row address

10: column address

11: dead pixel removal algorithm enable

12: sub-sampling data output (1/16 format)

13: sub-sampling data output (1/4 format)

14-31: Reserverd

[10:0] Reserverd

[3:0] Sub ID, Read from pins DOUT[4:1] during

reset

[15:4] Device ID, default 0x908 , can be

configured using SIF

[15:0] Flash light begin position in terms of rows

page 9 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

0x86 0x87 0x88 0x89 0x8A 0x8B 0x8C 0x8D 0x8E 0x8F 0x90 AD_RSTSEL 0x40 [7:6] RSTL voltage select 0x91 AD_SLOPEREG 0x8A

0x93 AD_SUBPH_PULSE 0x10

0x94 AD_BITCONTROL C0 Reserved 0x97 0x98 0x99 0x9A 0x9B 0x9C 0xA1 0xA2 0xA3 0xA4 0xA5 0xA6 0xA7 0xA8 0xA9 0xAA 0xAB 0xAC 0xAD AD_PART_CONTROL_C 0x00

0xAE 0xAF 0xB0 0xB1 0xB4 AD_PLL 0x07 [4:0] PLL setting for ADC clock. For example, at

0xB6 0xB7

AD_FLASH_ENDL AD_FLASH_ENDH AD_BWIDTH_BEGINL AD_BWIDTH_BEGINH AD_BWIDTH_ENDL AD_BWIDTH_ENDH AD_BHEIGHT_BEGINL AD_BHEIGHT_BEGINH AD_BHEIGHT_ENDL AD_BHEIGHT_ENDH

AD_WT_BEGINL AD_WT_BEGINH AD_WT_ENDL AD_WT_ENDH AD_SUB_EN_TIMEL AD_SUB_EN_TIMEH AD_WIDTHL_C AD_WIDTHH_C AD_HEIGHTL_C AD_HEIGHTH_C AD_COL_BEGINL_C AD_COL_BEGINH_C AD_ROW_BEGINL_C AD_ROW_BEGINH_C AD_HSYNC_ENDL_C AD_HSYNC_ENDH_C AD_VSYNC_ENDL_C AD_VSYNC_ENDH_C

AD_WT_BEGINL_C AD_WT_BEGINH_C AD_WT_ENDL_C AD_WT_ENDH_C

AD_F_MAX_ADDRL AD_F_MAX_ADDRH

0x041E (1054) 0x0068 (104) 0x0567 (1383) 0x000E (14) 0x040D (1037)

(138)

(16)

0 Reserved

0x07F8 (2040) 0x05BE (1470) 0x05DC (1500) 0x044C (1100) 0x0064 (100) 0x000A (10) 0x0040 (64) 0x0003 (3)

(0) 0 [10:0] Current wave table beginning point, read

0x07F8 (2040)

0x0409 (1033)

[15:0] Flash light end position in terms of rows

[10:0] Blank begin in terms of columns

[10:0] Blank end in terms of columns/ need [10:0]

[15:0] Blank begin in terms of rows

[15:0] Blank end in terms of rows

[3:0] Slope rate select, larger value means steeper

ramp slope, resulting in smaller ADC conversion

gain. The slope at [1111] is about 2x over [0000].

[7:4] Slope begin voltage select

Reserved

[10:0] Current frame width, read only

[15:0] Current frame height, read only

[10:0] Current column beginning position, read

only

[10:0] Current row beginning position, read only

[10:0] Current HSync end position, read only

[15:0] Current VSync end position, read only

[7:0] Current part control setting, read only

only

[10:0] Current wave table end point, read only

6 MHz input, selection of [00011] will run system

ADC clock at 24MHz. Note: maximum ADC

clock is 96MHz for 30 fps operation.

00000: x1 for PLL

00001: x2 for PLL

00011: x4 for PLL

00111: x8 for PLL

01111: x16 for PLL

Reserved for debugging up_down image purpose

page 10 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

0xB8 0xB9 0xBA 0xBB 0xBC 0xBD 0xBE 0xBF 0xC0 0xC1 0xC2 0xC3 0xC4 0xC5 0xC6 0xC7 0xC8 0xC9 0xCA 0xCB 0xCC 0xCD 0xCE 0xCF 0xD0 0xD1 0xD2 0xD3 0xD4 0xD5 0xD6 0xD7 0xD8 0xD9 0xDA 0xDB 0xDC 0xDD 0xDE 0xDF 0xE0 0xE1 0xE2 0xE3 0xE4 0xE5 0xE6 0xE7 0xE8 0xE9 0xEA 0xEB 0xEC AD_COL_DEAD11L 07FF Dead pixel #11 address

AD_F_OVERL AD_F_OVERH AD_F_LIMITAL AD_F_LIMITAH AD_F_LIMITBL AD_F_LIMITBH AD_F_LIMITCL AD_F_LIMITCH AD_COL_DEAD0L AD_COL_DEAD0H AD_ROW_DEAD0L AD_ROW_DEAD0H AD_COL_DEAD1L AD_COL_DEAD1H AD_ROW_DEAD1L AD_ROW_DEAD1H AD_COL_DEAD2L AD_COL_DEAD2H AD_ROW_DEAD2L AD_ROW_DEAD2H AD_COL_DEAD3L AD_COL_DEAD3H AD_ROW_DEAD3L AD_ROW_DEAD3H AD_COL_DEAD4L AD_COL_DEAD4H AD_ROW_DEAD4L AD_ROW_DEAD4H AD_COL_DEAD5L AD_COL_DEAD5H AD_ROW_DEAD5L AD_ROW_DEAD5H AD_COL_DEAD6L AD_COL_DEAD6H AD_ROW_DEAD6L AD_ROW_DEAD6H AD_COL_DEAD7L AD_COL_DEAD7H AD_ROW_DEAD7L AD_ROW_DEAD7H AD_COL_DEAD8L AD_COL_DEAD8H AD_ROW_DEAD8L AD_ROW_DEAD8H AD_COL_DEAD9L AD_COL_DEAD9H AD_ROW_DEAD9L AD_ROW_DEAD9H AD_COL_DEAD10L AD_COL_DEAD10H AD_ROW_DEAD10L AD_ROW_DEAD10H

0x040A (1034) 0x040B (1035) 2(2) Reserved for debugging up_down image purpose

0x040A (1034) 07FF 07FF

07FF 07FF

Reserved for debugging up_down image purpose

Dead pixel #0 address

A total of 12 pixels

Dead pixel #1 address

Dead pixel #2 address

Dead pixel #3 address

Dead pixel #4 address

Dead pixel #5 address

Dead pixel #6 address

Dead pixel #7 address

Dead pixel #8 address

Dead pixel #9 address

Dead pixel #10 address

page 11 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

0xED 0xEE 0xEF

AD_COL_DEAD11H AD_ROW_DEAD11L AD_ROW_DEAD11H

07FF

page 12 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

4. Electrical Characteristics

4.1 DC Characteristics

Symbol Parameter

V

Absolute

CCA

Minimum Typical Maximum

-0.3 3.8 V Power Supply

V

Absolute

INA

-0.3 VCC + 0.3 V Input Voltage

V

Absolute

OUTA

-0.3 VCC + 0.3 V Output Voltage

T

Storage

STG

0 25 65

Temperature

VCC Digital (VCC Analog)

Operating Power Supply

3.0 3.3 3.6 V

VIN Operating

0 VCC V Input Voltage

T

Operating

OPR

0 25 55 Temperature

IDD Operating

100 mA Current @ VCC=3.3 V, 25 °C

IIL Input Low

-1 1

Current

IIH Input High

-1 1

Current

IOZ Tri-state

-10 10 Leakage Current

CIN Input

3 pF

Capacitance

C

Output

OUT

3 pF

Capacitance

C

Bi-

BID

3 pF

directional

Rating

Unit

°C

µA

page 13 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

Buffer Capacitance

VIL Input Low

Voltage

V

Schmitt

ILS

Input Low Voltage

VIH Input High

Voltage

V

Schmitt

IHS

Input High Voltage

VOL Output Low

Voltage

VOH Output High

Voltage

RL Input Pull-

up/down Resistance

0.3 * VCC V

1.1 V

0.7 * VCC V

1.8 V

0.4 V

2.4 V

50

KΩ

page 14 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

4.2 Timing

4.2.1 MegaPixel Mode

Reset Timing

RSTN

VDD

CLKIN

PCLK

DOUT[9:0]

HSYN C

Unst able c lock

> 2 CLKIN

0.9*VDD

> 2 CLKIN

Pixel Timi ng

VSYN C

Use PCLK rising edge to latch data

Defa ult Li ne Timing

1500 PCLKs

HSYNC

DOUT[9:0]

VSYN C

DOUT[9:0]

100

64 64

16

3 3

0

1

5

Column 105 – 1384 is valid

Default Frame Timing (Change registers 0x14/0x15 to 0x0010(H))

1100 ROWs

5

15 16

1024

Column 21 – 1044 is valid

1101280

5

50

5

1050

1049 1099

0HSYN C

page 15 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

4.2.2 Sub-sampling Quarter (1/4) Mega Pixel Mode

De f au l t Lin e Ti m i ng

750 PCLKs

HSYNC

DOUT[9:0]

50

32 32

5

Co lumn 55 – 694 is valid

Def aul t Fram e Timi ng (C hang e registe rs 0 x14 /0x15 to 0x00 10(H ))

550 ROWs

55640

VSYNC

DOUT[9:0]

8

3

01 78

3

Co lumn 11 – 490 is valid

480

59

491

490 549

0HSYNC

page 16 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

4.2.3 Sub-sampling Quarter-Quarter (1/16) Mega Pixel Mode

De f au l t Lin e Ti m i ng

375 PCLKs

HSYNC

DOUT[9:0]

25

16 16

3

Co lumn 28 – 347 is valid

Default Frame Timing (change registers 0x14/0x15 to 0x0010(H))

275 ROWs

27320

VSYNC

DOUT[9:0]

4

3

01 34

3

Co lumn 7 – 246 is valid

240

28

247

246 274

0HSYNC

page 17 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

4.3 Pixel Clock Duty Cycle

In different frame rate mode (controlled by PART_CONTROL [6:4]), the duty cycle (high time / clock period) of the PCLK signal is described in the following table:

Frame Rate Duty Cycle

30 50.0% 15 50.0% 10 50.0% 5 50.0% 4 53.3% 3 50.0% 2 50.0% 1 50.0%

4.4 Default Wavetable Timing

The following timing diagram is used when bit 4 of register TIMING_CONTROL_LOW is set at 1. If it is set at 0, wave table is used instead.

Wavetable Timing

State

IWORD

DALINIT

SEN_ROW_SEL

IRST

DALSEL

SLOPEEN

Clocks Count s

EXPOSURE

RESET

0

1(HIGH)

4 17 2 2 1000 (2000 ADC) 4 10 2 2 400 (800 ADC) 44

2

1 3 4 5 6 7 8 9

11

2

PHOTODIODE

READ

1500

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10

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CDS

page 18 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

5 Mechanical Information

Figure 3. P Type 14 x 14 mm Plastic LCC48 Packaging

page 19 COMPANY CONFIDENTIAL

ICM108B 1.3 million pixel CMOS sensor

Data Sheet V 1.1 November, 2002

6 Ordering Information

Part number for 108B Sensor:

Description Part Number

Color 1.3 mega pixel resolution sensor in P Type plastic LCC 48 packaged ICM-108Bpa

IC Media Corporation

545 East Brokaw Road San Jose, CA 95112, U.S.A. Phone: (408) 451-8838 Fax: (408) 451-8839 Email: Sales@IC-Media.Com Web Site: www.ic-media.com

IC Media Technology Corporation

6F, No. 61, ChowTze Street., NeiHu District Taipei, Taiwan, R.O.C. Phone: 886-2-2657-7898 Fax: 886-2-2657-8751 Email: Sales@IC-Media.Com.tw Web Site: www.ic-media.com.tw

page 20 COMPANY CONFIDENTIAL

Datasheet ICM108B Datasheet (ICMED)

Specifications and Main Features

Frequently Asked Questions

User Manual