Datasheet ICL8038ACJD, ICL8038BCJD, ICL8038CCJD, ICL8038CCPD Datasheet (Harris Semiconductor)

Semiconductor
ICL8038
September 1998 File Number 2864.3
Precision Waveform Generator/Voltage Controlled Oscillator
o
C.
Features
• Low Frequency Drift with Temperature. . . . . . .250ppm/oC
• Low Distortion. . . . . . . . . . . . . . . . 1% (Sine Wave Output)
• High Linearity . . . . . . . . . . .0.1% (Triangle Wave Output)
• Wide Frequency Range . . . . . . . . . . . 0.001Hz to 300kHz
• Variable Duty Cycle . . . . . . . . . . . . . . . . . . . . . 2% to 98%
• High Level Outputs. . . . . . . . . . . . . . . . . . . . . .TTL to 28V
• Simultaneous Sine, Square, and Triangle Wave Outputs
• Easy to Use - Just a Handful of External Components Required
Ordering Information
PART NUMBER STABILITY TEMP. RANGE (oC) PACKAGE PKG. NO.
ICL8038CCPD 250ppm/oC (Typ) 0 to 70 14 Ld PDIP E14.3 ICL8038CCJD 250ppm/oC (Typ) 0 to 70 14 Ld CERDIP F14.3 ICL8038BCJD 180ppm/oC (Typ) 0 to 70 14 Ld CERDIP F14.3 ICL8038ACJD 120ppm/oC (Typ) 0 to 70 14 Ld CERDIP F14.3
Pinout
DUTY CYCLE
FREQUENCY
SINE WAVE
ADJUST
SINE
WAVE OUT TRIANGLE
OUT
ADJUST
V+
FM BIAS
ICL8038
(PDIP, CERDIP)
TOP VIEW
1
2
3
4
5
6
7
14
NC
13
NC
SINE WAVE
12
ADJUST
11
V- OR GND TIMING
10
CAPACITOR SQUARE
9
WAVE OUT FM SWEEP
8
INPUT
Functional Diagram
CURRENT
SOURCE
#1
I
10
2I
C
CURRENT
SOURCE
#2
92
COMPARATOR
#1
COMPARATOR
#2
FLIP-FLOP
BUFFERBUFFER
SINE
CONVERTER
3
V+
6
V- OR GND
11
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
© Harris Corporation 1998
Copyright
ICL8038
Absolute Maximum Ratings Thermal Information
Supply Voltage (V- to V+). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V
Input Voltage (Any Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V+
Input Current (Pins 4 and 5). . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA
Output Sink Current (Pins 3 and 9) . . . . . . . . . . . . . . . . . . . . . 25mA
Operating Conditions
Temperature Range
ICL8038AC, ICL8038BC, ICL8038CC . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)
CERDIP Package. . . . . . . . . . . . . . . . . 75 20
PDIP Package . . . . . . . . . . . . . . . . . . . 115 N/A
Maximum Junction Temperature (Ceramic Package) . . . . . . . .175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Die Characteristics
Back Side Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V-
Electrical Specifications V
PARAMETER SYMBOL
Supply Voltage Operating Range V
= ±10V or +20V, TA = 25oC, RL = 10k, Test Circuit Unless Otherwise Specified
SUPPLY
TEST
CONDITIONS
SUPPLY
ICL8038CC ICL8038BC ICL8038AC
UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX
V+ Single Supply +10 - +30 +10 - +30 +10 - +30 V
V+, V- Dual Supplies ±5-±15 ±5-±15 ±5-±15 V
Supply Current I
SUPPLYVSUPPLY
= ±10V
1220-1220-1220 mA
(Note 2) FREQUENCY CHARACTERISTICS (All Waveforms) Max. Frequency of Oscillation f Sweep Frequency of FM Input f
MAX
SWEEP
100 - - 100 - - 100 - - kHz
-10- -10- -10- kHz Sweep FM Range (Note 3) - 35:1 - - 35:1 - - 35:1 ­FM Linearity 10:1 Ratio - 0.5 - - 0.2 - - 0.2 - % Frequency Drift with
∆f/∆T0oC to 70oC - 250 - - 180 - - 120 ppm/oC
Temperature (Note 5) Frequency Driftwith Supply Voltage f/V Over Supply
- 0.05 - - 0.05 - 0.05 - %/V
Voltage Range
OUTPUT CHARACTERISTICS
Square Wave
Leakage Current I Saturation Voltage V Rise Time t Fall Time t Typical Duty Cycle Adjust
OLK
∆D 2 98 2 - 98 2 - 98 %
V9 = 30V - - 1 - - 1 - - 1 µA
SATISINK
R F
= 2mA - 0.2 0.5 - 0.2 0.4 - 0.2 0.4 V RL = 4.7k - 180 - - 180 - - 180 - ns RL = 4.7k -40- -40- -40- ns
(Note 6)
Triangle/Sawtooth/Ramp -
Amplitude V
TRIAN-
GLE
R
= 100k 0.30 0.33 - 0.30 0.33 - 0.30 0.33 - xV
TRI
Linearity - 0.1 - - 0.05 - - 0.05 - % Output Impedance Z
OUTIOUT
= 5mA - 200 - - 200 - - 200 -
2
SUPPLY
ICL8038
Electrical Specifications V
PARAMETER SYMBOL
= ±10V or +20V, TA = 25oC, RL = 10k, Test Circuit Unless Otherwise Specified (Continued)
SUPPLY
TEST
CONDITIONS
ICL8038CC ICL8038BC ICL8038AC
UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX
Sine Wave
Amplitude V
SINERSINE
THD THD RS = 1M
= 100k 0.2 0.22 - 0.2 0.22 - 0.2 0.22 - xV
- 2.0 5 - 1.5 3 - 1.0 1.5 %
SUPPLY
(Note 4)
THD Adjusted THD Use Figure 4 - 1.5 - - 1.0 - - 0.8 - %
NOTES:
2. RA and RB currents not included.
3. V
= 20V; RA and RB = 10k, f 10kHz nominal; can be extended 1000 to 1. See Figures 5A and 5B.
SUPPLY
4. 82k connected between pins 11 and 12, Triangle Duty Cycle set at 50%. (Use RA and RB.)
5. Figure 1, pins 7 and 8 connected, V
= ±10V. See Typical Curves for T.C. vs V
SUPPLY
SUPPLY
.
6. Not tested, typical value for design purposes only.
Test Conditions
PARAMETER R
A
Supply Current 10k 10k 10k 3.3nF Closed Current Into Pin 6 Sweep FM Range (Note 7) 10k 10k 10k 3.3nF Open Frequency at Pin 9 Frequency Drift with Temperature 10k 10k 10k 3.3nF Closed Frequency at Pin 3 Frequency Drift with Supply Voltage (Note 8) 10k 10k 10k 3.3nF Closed Frequency at Pin 9 Output Amplitude (Note 10)
Sine 10k 10k 10k 3.3nF Closed Pk-Pk Output at Pin 2
Triangle 10k 10k 10k 3.3nF Closed Pk-Pk Output at Pin 3 Leakage Current (Off) (Note 9) 10k 10k 3.3nF Closed Current into Pin 9 Saturation Voltage (On) (Note 9) 10k 10k 3.3nF Closed Output (Low) at Pin 9 Rise and Fall Times (Note 11) 10k 10k 4.7k 3.3nF Closed Waveform at Pin 9 Duty Cycle Adjust (Note 11)
Max 50k ~1.6k 10k 3.3nF Closed Waveform at Pin 9
Min ~25k 50k 10k 3.3nF Closed Waveform at Pin 9 Triangle Waveform Linearity 10k 10k 10k 3.3nF Closed Waveform at Pin 3 Total Harmonic Distortion 10k 10k 10k 3.3nF Closed Waveform at Pin 2
NOTES:
7. The hi and lo frequencies can be obtained by connecting pin 8 to pin 7 (fHI) and then connecting pin 8 to pin 6 (fLO). Otherwise apply Sweep Voltage at pin 8 (2/3V
SUPPLY
+2V) V
SWEEP
V
SUPPLY
5.3V and 10V with respect to ground.
8. 10V V+ 30V, or ±5V V
SUPPLY
≤±15V.
9. Oscillation can be halted by forcing pin 10 to +5V or -5V.
10. Output Amplitude is tested under static conditions by forcing pin 10 to 5V then to -5V.
11. Not tested; for design purposes only.
where V
R
B
SUPPLY
R
L
CSW1MEASURE
is the total supply voltage. In Figure 5B, pin 8 should vary between
3
10V
ICL8038
Test Circuit
Detailed Schematic
CURRENT SOURCES
R
EXT
5
2
Q
4
Q
8
46
Q
11
R
4
100
R
13
620
Q
26
7
R 30K
Q Q
Q Q
Q
R
1
Q
8
11K
R
2
39K
3
Q
31
32 33 34
9
23
1
Q
Q
6
Q
7
R 40K
30
Q
24
R
11
270
R
12
2.7K Q
25
BR
Q
12
R
14
27K
R
15
470
Q
FLIP-FLOP
R 100
R
1.8K
29
EXT
4
Q
3
Q
5
Q
9
Q
10
Q
13
R
6
5
100
16
Q
Q
27
28
SW N.C.
A
10
ICL8038
R 10K
B
R
A
10K
456
7
1
8
C 3300pF
FIGURE 1. TEST CIRCUIT
R
41
Q
35
4K
COMP ARATOR
Q
15
R
7B
15K
Q
Q
19
Q
36
R
41
27K
R 27K
Q
17
Q
16
R
10K
Q
21
20
R 27K
Q
37
Q
38
42
BUFFER AMPLIFIER
Q
14
C
EXT
R
17
4.7K
R
18
4.7K
+
R
L
10K
9
3
R
TRI
2
121110
R
82K
SINE
-10V
6
V+
R
32
R
8
5K
Q
18
R
9
5K
7A
Q
22
R
10
5K
43
Q
39
Q
40
3
11
R
19
800 R
20
2.7K R
21
Q
10K
Q
41
Q
49
R
22
Q
10K R
23
2.7K R
24
R
800
44
1K
2
Q
Q
43
42
R
25
33K
R
28
33K
50
Q
51
Q
SINE CONVERTER
Q
Q
45
44
R
26
33K
R
29
33K
52
Q
53
Q
Q
Q
47
46
R
27
33K
R
30
33K
54
Q
55
Q
5.2K
48
R 33K
R 33K
56
1
R
33
200
R
34
375
R
35
330
45
R
36
1600
31
R
37
330
R
38
375 R
39
200
12
R
40
R
C
EXT
5.6K 82K
Application Information
(See Functional Diagram)
An external capacitor C is charged and discharged by two current sources. Current source #2 is switched on and off by a flip-flop, while current source #1 is on continuously. Assuming that the flip-flop is in a state such that current source #2 is off, and the capacitor is charged with a current I, the voltage across the capacitor rises linearly with time.Whenthis voltage reaches the level of comparator #1 (set at 2/3 of the supply voltage), the flip-flop is triggered, changes states, and releases current source #2. This current source normally carries a current 2I, thus the capacitor is discharged with a
4
net-current I and the voltage across it drops linearly with time. When it has reached the level of comparator #2 (set at 1/3 of the supply voltage), the flip-flop is triggered into its original state and the cycle starts again.
Four waveforms are readily obtainable from this basic generator circuit. With the current sources set at I and 2I respectively, the charge and discharge times are equal. Thus a triangle waveform is created across the capacitor and the flip-flop produces a square wave. Both waveforms are fed to buffer stages and are available at pins 3 and 9.
ICL8038
The levels of the current sources can, however, be selected overa wide range with two external resistors. Therefore,with the two currents set at values different from I and 2I, an asymmetrical sawtooth appears at Terminal 3 and pulses with a duty cycle from less than 1% to greater than 99% are available at Terminal 9.
The sine wave is created by feeding the triangle wave into a nonlinear network (sine converter). This network provides a decreasing shunt impedance as the potential of the triangle moves toward the two extremes.
Waveform Timing
The
symmetry
external timing resistors. Two possible ways to accomplish this are shown in Figure 3. Best results are obtained by keeping the timing resistors R controls the rising portion of the triangle and sine wave and the 1 state of the square wave.
The magnitude of the triangle waveform is set at V
SUPPLY
of all waveforms can be adjusted with the
and RB separate (A). R
A
1
/
3
; therefore the rising portion of the triangle is,
A
CV×
t
--------------
1
C 1/3 V
------------------------------------------------------------------ -
I
×
0.22 V
SUPPLYRA
SUPPLY
R
×××
A
------------------== =
0.66
C×
The falling portion of the triangle and sine wave and the 0 state of the square wave is:
C 1/3V
×
CV
t
------------ -
2
-----------------------------------------------------------------------------------
1
2 0.22()
×
V
SUPPLY
------------------------
R
B
SUPPLY
0.22
V
SUPPLY
------------------------
R
A
Thus a 50% duty cycle is achieved when R
RARBC
------------------------------------- -== =
0.66 2RAR
= RB.
A
()
B
If the duty cycle is to be varied over a small range about 50% only, the connection shown in Figure 3B is slightly more convenient.A 1kpotentiometer may not allow the duty cycle to be adjusted through 50% on all devices. If a 50% duty cycle is required, a 2k or 5k potentiometer should be used.
With two separate timing resistors, the frequency is given by:
--------------- -
f
t
or, if R
0.33
-----------
f
RC
1
+
1t2
= RB = R
A
(for Figure 3A)=
------------------------------------------------------==
RAC
------------
0.66
1
R

1
 
-------------------------+
2RARB–
B
FIGURE 2A. SQUARE WAVE DUTY CYCLE - 50% FIGURE 2B. SQUARE WAVE DUTY CYCLE - 80%
FIGURE 2. PHASE RELATIONSHIP OF WAVEFORMS
V+
ICL8038
R
B
121110
R
A
456
7
8
C 82K
V+
R
L
9
3
2
V- OR GND
1k
R
A
456
7
8
C 100K
ICL8038
R
B
121110
R
L
9
3
2
V- OR GND
FIGURE 3A. FIGURE 3B.
FIGURE 3. POSSIBLE CONNECTIONS FOR THE EXTERNAL TIMING RESISTORS
5
ICL8038
Neither time nor frequency are dependent on supply voltage, even though none of the voltages are regulated inside the integrated circuit. This is due to the fact that both currents and thresholds are direct, linear functions of the supply voltage and thus their effects cancel.
Reducing Distortion
To minimize sine wave distortion the 82k resistor between pins 11 and 12 is best made variable. With this arrangement distortion of less than 1% is achievable. To reduce this even further, two potentiometers can be connected as shown in Figure 4; this configuration allows a typical reduction of sine wave distortion close to 0.5%.
V+
1k
R
A
456
7
8
C
FIGURE 4. CONNECTION TO ACHIEVE MINIMUM SINE WAVE
R
B
ICL8038
121110
DISTORTION
1
R
L
9
3
2
10k100k
100k
10k
V- OR GND
Selecting RA, RB and C
For any given output frequency, there is a wide range of RC combinations that will work, however certain constraints are placed upon the magnitude of the charging current for optimum performance. At the low end, currents of less than 1µA are undesirable because circuit leakages will contribute significant errors at high temperatures. At higher currents (I > 5mA), transistor betas and saturation voltages will contribute increasingly larger errors. Optimum performance will, therefore, be obtained with charging currents of 10µAto 1mA. If pins 7 and 8 are shorted together, the magnitude of the charging current due to R
R
1
----------------------------------------
I
R
V+ V-()×
+()
1R2
1
------- -
×
R
A
can be calculated from:
A
0.22 V+ V-()
------------------------------------==
R
A
and R2 are shown in the Detailed Schematic.
R
1
A similar calculation holds for RB. The capacitor value should be chosen at the upper end of its
possible range.
Waveform Out Level Control and Power Supplies
The waveform generator can be operated either from a single power supply (10V to 30V) or a dual power supply (±5V to ±15V). With a single power supply the averagelevels of the triangle and sine wave are at exactly one-half of the supply voltage, while the square wave alternates between V+ and ground. A split power supply has the advantage that all waveforms move symmetrically about ground.
The square wave output is not committed. A load resistor can be connected to a different power supply, as long as the applied voltage remains within the breakdown capability of the waveform generator (30V). In this way, the square wave output can be made TTL compatible (load resistor connected to +5V) while the waveform generator itself is powered from a much higher voltage.
Frequency Modulation and Sweeping
The frequency of the waveform generator is a direct function of the DC voltage at Terminal 8 (measured from V+). By altering this voltage, frequency modulation is performed. For small deviations (e.g. ±10%) the modulating signal can be applied directly to pin 8, merely providing DC decoupling with a capacitor as shown in Figure 5A. An external resistor between pins 7 and 8 is not necessary, but it can be used to increase input impedance from about 8k (pins 7 and 8 connected together), to about (R + 8k).
For larger FM deviations or for frequency sweeping, the modulating signal is applied between the positive supply voltage and pin 8 (Figure 5B). In this way the entire bias for the current sources is created by the modulating signal, and a very large (e.g. 1000:1) sweep range is created (f = 0 at V supply voltage; in this configuration the charge current is no longer a function of the supply voltage (yet the trigger thresholds still are) and thus the frequency becomes dependent on the supply voltage.The potential on Pin 8 may be swept down from V+ by (
= 0). Care must be taken, however, to regulate the
SWEEP
1
/3 V
SUPPLY
- 2V).
6
ICL8038
V+
R
L
V- OR GND
FM
ICL8038
R
B
R
A
456
7
R
8
C 81K
9
3
2
121110
FIGURE 5A. CONNECTIONS FOR FREQUENCY MODULATION
V+
SWEEP
VOLTAGE
ICL8038
R
B
121110
R
A
456
8
C 81K
R
L
9
3
2
V- OR GND
FIGURE 5B. CONNECTIONS FOR FREQUENCY SWEEP
FIGURE 5.
Typical Applications
The sine wave output has a relatively high output impedance (1k Typ). The circuit of Figure 6 provides buffering, gain and amplitude adjustment. A simple op amp follower could also be used.
V+
ICL8038
R
B
AMPLITUDE
2
100K
+
741
-
20K
R
A
456
7
8
With a dual supply voltage the external capacitor on Pin 10 can be shorted to ground to halt the ICL8038 oscillation. Figure 7 shows a FET switch, diode ANDed with an input strobe signal to allow the output to always start on the same slope.
V+
R
A
45
7
8
ICL8038
R
B
9
1N914
2
1011
C
2N4392
-15V
1N914
100K
OFF
15K
ON
STROBE
+15V (+10V)
-15V (-10V)
FIGURE 7. STROBE TONE BURST GENERATOR
To obtain a 1000:1 Sweep Range on the ICL8038 the voltage across external resistors R
and RB must decrease
A
to nearly zero. This requires that the highest voltage on control Pin 8 exceed the voltageat the top of R
and RBby a
A
few hundred mV. The Circuit of Figure 8 achieves this by using a diode to lower the effective supply voltage on the ICL8038. The large resistor on pin 5 helps reduce duty cycle variations with sweep.
The linearity of input sweep voltage versus output frequency can be significantly improved by using an op amp as shown in Figure 10.
+10V
1N457
DUTY CYCLE
15K
9
3
10K
FREQ.
0.1µF
1K
4.7K
546
8
4.7K
ICL8038
1110
C
4.7K
FIGURE 6. SINE WAVE OUTPUT BUFFER AMPLIFIERS
7
2
121110
20K
15M
V-
0.0047µF
DISTORTION 100K
-10V
FIGURE 8. VARIABLE AUDIO OSCILLATOR, 20Hz TO 20kHzY
ICL8038
V1+
INPUT
DETECTOR
HIGH FREQUENCY
SYMMETRY
1,000pF
+15V
-
741
+
-V
IN
10k
OFFSET
DUTY
CYCLE
FREQUENCY
ADJUST
45
7
9
8
ICL8038
TIMING CAP.
PHASE
VCO
IN
AMPLIFIER
DEMODULATED
FM
R
2
LOW PASS
FILTER
R
1
FM BIAS
SQUARE
WAVE
OUT
FIGURE 9. WAVEFORM GENERATOR USED AS STABLE VCO IN A PHASE-LOCKED LOOP
1M
9
3
2
50µF 15V
SINE WAVE DISTORTION
10k
100k
+
1N753A
(6.2V)
1k
1k
P
4
500
4.7k
456
8
FUNCTION GENERATOR
3,900pF
4.7k
ICL8038
121110
100k
100k
LOW FREQUENCY SYMMETRY
-
+
+15V
741
6
3
2
1
121110
SINE WAVE ADJ.
V2+
TRIANGLE
OUT
SINE WAVE
OUT
SINE WAVE ADJ.
V-/GND
SINE WAVE OUTPUT
-15V
FIGURE 10. LINEAR VOLTAGE CONTROLLED OSCILLATOR
Use in Phase Locked Loops
Its high frequency stability makes the ICL8038 an ideal building block for a phase locked loop as shown in Figure 9. In this application the remaining functional blocks, the phase detector and the amplifier, can be formed by a number of available ICs (e.g., MC4344, NE562).
In order to match these building blocks to each other, two steps must be taken. First, two different supply voltages are used and the square wave output is returned to the supply of the phase detector. This assures that the VCO input voltage will not exceed the capabilities of the phase detector. If a smaller VCO signal is required, a simple resistive voltage divider is connected between pin 9 of the waveform generator and the VCO input of the phase detector.
8
Second, the DC output level of the amplifier must be made compatible to the DC lev el required at the FM input of the waveform generator (pin 8, 0.8V+). The simplest solution here is to provide a voltage divider to V+ (R
, R2 as shown) if the
1
amplifier has a lower output lev el, or to g round if its level is higher. The divider can be made part of the low-pass filter.
This application not only provides for a free-running frequency with very low temperature drift, but is also has the unique feature of producing a large reconstituted sinewave signal with a frequency identical to that at the input.
For further information, see Harris Application Note AN013, “Everything You Always Wanted to Know About the ICL8038”.
ICL8038
Definition of Terms
Supply Voltage (V
SUPPLY
V+ to V-. Supply Current. The supply current required from the
power supply to operate the device, excluding load currents and the currents through R
Frequency Range. The frequency range at the square wave output through which circuit operation is guaranteed.
Sweep FM Range. The ratio of maximum frequency to minimum frequency which can be obtained by applying a sweep voltage to pin 8. For correct operation, the sweep voltage should be within the range:
2
(
/3 V
SUPPLY
+ 2V) < V
). The total supply voltage from
and RB.
A
< V
SWEEP
SUPPLY
Typical Performance Curves
20
FM Linearity. The percentage deviation from the best fit
straight line on the control voltage versus output frequency curve.
Output Amplitude. The peak-to-peak signal amplitude appearing at the outputs.
Saturation Voltage. The output voltage at the collector of Q
when this transistor is turned on. It is measured for a
23
sink current of 2mA. Rise and Fall Times. The time required for the square wave
output to change from 10% to 90%, or 90% to 10%, of its final value.
Triangle Waveform Linearity. The percentage deviation from the best fit straight line on the rising and falling triangle waveform.
Total Harmonic Distortion. The total harmonic distortion at the sine wave output.
1.03
1.02
15
10
SUPPLY CURRENT (mA)
5
5 1015202530
SUPPLY VOLTAGE (V)
-55oC
25oC
125oC
1.01
1.00
0.99
NORMALIZED FREQUENCY
0.98
51015202530
SUPPLY VOLTAGE (V)
FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 12. FREQUENCY vs SUPPLY VOLTAGE
1.03
1.02
1.01
1.00
0.99
NORMALIZED FREQUENCY
0.98
10
30 20
10
20
30
200
150
100
TIME (ns)
50
125oC
25
-55
o
C
o
C
RISE TIME
FALL TIME
125oC
o
25
C
o
-55
C
-50 -25 0 25 75 125 TEMPERATURE (oC)
0
LOAD RESISTANCE (k)
FIGURE 13. FREQUENCY vs TEMPERATURE FIGURE 14. SQUARE WAVE OUTPUT RISE/FALL TIME vs
LOAD RESISTANCE
9
1064208
ICL8038
Typical Performance Curves
2
1.5
125oC
25
-55
LOAD CURRENT (mA)
SATURATION VOLTAGE
1.0
0.5
0
o
C
o
C
(Continued)
FIGURE 15. SQUARE WAVE SATURATIONVOLTAGEvs LOAD
CURRENT
1.2
1.1
1.0
LOAD CURRENT
0.9
0.8 LOAD CURRENT TO V+
NORMALIZED PEAK OUTPUT VOLTAGE
1064208
FIGURE 16. TRIANGLE WAVE OUTPUT VOLTAGE vs LOAD
CURRENT
10.0
-
TO V
LOAD CURRENT (mA)
125oC
25oC
-55oC
16642010201814128
1.0
0.9
0.8
0.7
NORMALIZED OUTPUT VOLTAGE
0.6
FREQUENCY (Hz)
10K1K10010 1M100K
FIGURE 17. TRIANGLE WAVE OUTPUT VOLTAGE vs
FREQUENCY
1.1
1.0
0.9
NORMALIZED OUTPUT VOLTAGE
1.0
LINEARITY (%)
0.1
0.01
FREQUENCY (Hz)
10K1K10010 1M100K
FIGURE 18. TRIANGLE WAVE LINEARITY vs FREQUENCY
12
10
8
6
4
DISTORTION (%)
2
UNADJUSTED
ADJUSTED
10K1K10010 1M100K
FREQUENCY (Hz)
0
10010 1M100K
1K
FREQUENCY (Hz)
10K
FIGURE 19. SINE WAVE OUTPUT VOLTAGE vs FREQUENCY FIGURE 20. SINE WAVE DISTORTION vs FREQUENCY
10
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