Page 1
ICL7667
Data Sheet April 1999
Dual Power MOSFET Driver
The ICL7667 is a dual monolithic high-speed driver
designed to convert TTL level signals into high current
outputs at voltages up to 15V. Its high speed and current
output enable it to drive large capacitiveloadswithhighslew
rates and low propagation delays. With an output voltage
swing only millivolts less than the supply voltage and a
maximum supply voltage of 15V, the ICL7667 is well suited
for driving power MOSFETs in high frequency switchedmode power converters. The ICL7667’s high current outputs
minimize power losses in the power MOSFETs by rapidly
charging and discharging the gate capacitance. The
ICL7667’s inputs are TTL compatible and can be directly
driven by common pulse-width modulation control ICs.
Ordering Information
PART
NUMBER
ICL7667CBA 0 to 70 8 Ld SOIC (N) M8.15
ICL7667CPA 0 to 70 8 Ld PDIP E8.3
ICL7667CJA 0 to 70 8 Ld CERDIP F8.3A
ICL7667CTV 0 to 70 8 Pin Metal Can T8.C
ICL7667MTV
(Note 1)
ICL7667MJA
(Note 1)
NOTE:
1. Add /883B to Part Number for 883B Processing
TEMP. RANGE
(oC) PACKAGE PKG. NO.
-55 to 125 8 PinMetal Can T8.C
-55 to 125 8 Ld CERDIP F8.3A
Functional Diagram
V
CC
≈2mA
File Number
Features
• Fast Rise and Fall Times
- 30ns with 1000pF Load
• Wide Supply Voltage Range
-V
= 4.5V to 15V
CC
• Low Power Consumption
- 4mW with Inputs Low
- 20mW with Inputs High
• TTL/CMOS Input Compatible Power Driver
-R
OUT
= 7Ω Typ
• Direct Interface with Common PWM Control ICs
• Pin Equivalent to DS0026/DS0056; TSC426
Applications
• Switching Power Supplies
• DC/DC Converters
• Motor Controllers
Pinouts
ICL7667 (CAN)
TOP VIEW
V+
8
IN A
1
2
3
TOP VIEW
OUT A
ICL7667 (PDIP, SOIC, CERDIP)
7
OUT B
6
N/CN/C
5
4
V-
IN B
2853.3
1
OUT
IN
3-73
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
N/C
IN A
V-
IN B
2
3
4
| Copyright © Intersil Corporation 1999
8
7
6
5
N/C
OUT A
V+
OUT B
Page 2
ICL7667
Absolute Maximum Ratings Thermal Information
Supply Voltage V+ to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . V- -0.3V to V+ +0.3V
Package Dissipation, TA 25oC. . . . . . . . . . . . . . . . . . . . . . . .500mW
Operating Temperature Range
ICL7667C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
ICL7667M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER SYMBOL TEST CONDITIONS
DC SPECIFICATIONS
Logic 1 Input Voltage V
Logic 1 Input Voltage V
Logic 0 Input Voltage V
Logic 0 Input Voltage V
Input Current I
Output Voltage High V
Output Voltage Low V
Output Resistance R
Output Resistance R
Power Supply Current I
Power Supply Current I
IL
OH
OL
OUT
OUT
CC
CC
SWITCHING SPECIFICATIONS
Delay Time T
D2
Rise Time T
Fall Time T
Delay Time T
D1
NOTE: All typical values have been characterized but are not tested.
VCC = 4.5V 2.0 - - 2.0 - - V
IH
VCC = 15V 2.0 - - 2.0 - - V
IH
VCC = 4.5V - - 0.8 - - 0.5 V
IL
VCC = 15V - - 0.8 - - 0.5 V
IL
VCC = 15V, VIN = 0V and 15V -0.1 - 0.1 -0.1 - 0.1 µA
VCC = 4.5V and 15V V
VCC = 4.5V and 15V - 0 0.05 - - 0.1 V
VIN = VIL, I
VIN = VIH, I
= -10mA, VCC = 15V - 7 10 - - 12 Ω
OUT
= 10mA, VCC = 15V - 8 12 - - 13 Ω
OUT
VCC = 15V, VIN = 3V both inputs - 5 7 - - 8 mA
VCC = 15V, VIN = 0V both inputs - 150 400 - - 400 µA
Figure 3 - 35 50 - - 60 ns
Figure 3 - 20 30 - - 40 ns
R
Figure 3 - 20 30 - - 40 ns
F
Figure 3 - 20 30 - - 40 ns
Thermal Resistance (Typical, Note 2) θJA(oC/W) θJC(oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . . 150 N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 170 N/A
Metal Can Package . . . . . . . . . . . . . . . 156 68
CERDIP Package. . . . . . . . . . . . . . . . . 115 30
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
ICL7667C, M ICL7667M
TA = 25oC -55oC ≤ TA≤ 125oC
MIN TYP MAX MIN TYP MAX
CC
-0.05
V
CC
-V
CC
-0.1
V
CC
UNITS
-V
3-74
Page 3
Test Circuits
ICL7667
V- = 15V
INPUT
ICL7667
INPUT RISE AND
FALL TIMES ≤ 10ns
Typical Performance Curves
1µs
100
, (ns)
f
AND t
r
t
10
VCC = 15V
t
RISE
t
FALL
1
10 100 1000 10K 100K
C
(pF)
L
+
4.7µF
0.1µF
CL = 1000pF
OUTPUT
INPUT
≈0.4V
OUTPUT
+5V
10%
T
D1
t
15V
0V
100
90
80
70
, (ns)
60
D2
50
AND T
40
D1
T
30
20
10
90%
0
-55 0 25 70 125
f
10%
TEMPERATURE (
90%
T
D2
CL = 1nF
VCC = 15V
T
D2
o
C)
t
r
10%
T
90%
D1
FIGURE 1. RISE AND FALL TIMES vs C
50
40
tr AND t
f
30
, (ns)
f
AND t
20
r
t
10
0
-55 0 25 70 125
TEMPERATURE (
CL = 1nF
= 15V
V
CC
o
C)
FIGURE 3. tr,tfvs TEMPERATURE FIGURE 4. ICC vs C
L
(mA)
CC
I
FIGURE 2. TD1, TD2 vs TEMPERATURE
30
VCC = 15V
200kHz
10
3.0
1
10 100 1K 10K
C
(pF)
L
20kHz
100K
L
3-75
Page 4
ICL7667
Typical Performance Curves
100
10
(mA)
CC
I
1
100µA
10K 100K 1M 10M
FIGURE 5. ICC vs FREQUENCY FIGURE 6. NO LOAD ICC vs FREQUENCY
50
40
VCC = 15V
FREQUENCY (Hz)
(Continued)
VCC = 5V
CL = 1nF
100
(mA)
CC
I
100mA
50
40
10
1
10k
VCC = 15V
100k 1M
FREQUENCY (Hz)
VCC = 5V
CL = 10pF
10M
30
, (ns)
f
20
AND t
D1
t
10
0
510 15
FIGURE 7. DELAY AND FALL TIMES vs V
t
f
t
VCC (V)
D1
C
= 1nF
L
CC
Detailed Description
The ICL7667 is a dual high-power CMOS inverter whose
inputs respond to TTL levels while the outputs can swing as
high as 15V. Its high output current enables it to rapidly
charge and discharge the gate capacitance of power
MOSFETs, minimizing the switching losses in switchmode
power supplies. Since the output stage is CMOS, the output
will swing to within millivolts of both ground and V
any external parts or extrapowersupplies as required by the
DS0026/56 family. Althoughmost specifications are at V
15V, the propagation delays and specifications are almost
independent of V
CC
.
In addition to power MOS drivers, the ICL7667 is well suited
for other applications such as bus, control signal, and clock
drivers on large memory of microprocessor boards, where
the load capacitance islargeand low propagation delays are
required. Other potential applications include peripheral
power drivers and charge-pump voltage inverters.
CC
without
CC
30
, (ns)
D2
20
AND t
r
t
10
0
51015
V
CC
FIGURE 8. RISE TIME vs V
(V)
tr = T
CC
D2
CL = 10pF
Input Stage
The input stage is a large N-Channel FET with a P-channel
constant-current source.Thiscircuit has a threshold ofabout
1.5V, relatively independent of the VCC voltage. This means
that the inputs will be directly compatible with TTL over the
entire 4.5V - 15V V
range. Being CMOS, the inputs draw
CC
less than 1µA of current over the entire input voltage range
of ground to V
. The quiescent current or no load supply
CC
current of the ICL7667 is affected by the input voltage, going
=
to nearly zero when the inputs are at the 0 logic level and
rising to 7mA maximum when both inputs are at the 1 logic
level.A small amount of hysteresis,about 50mV to 100mV at
the input, is generated by positive feedback around the
second stage.
Output Stage
The ICL7667 output is a high-power CMOS inverter,
swinging between ground and VCC. At V
output impedance of the inverter is typically 7Ω. The high
= 15V, the
CC
3-76
Page 5
ICL7667
peak current capability of the ICL7667 enables it to drive a
1000pF load with a rise time of only 40ns. Because the
output stage impedance is very low, up to 300mA will flow
through the series N-Channel and P-channel output devices
(from V
current is responsible for a significant portion of the internal
power dissipation of the ICL7667 at high frequencies. It can be
minimized by keeping the rise and fall times of the input to the
ICL7667 below 1µs.
to ground) during output transitions. This crossover
CC
Application Notes
Although the ICL7667 is simply a dual level-shifting inverter,
there are several areas to which careful attention must be
paid.
Grounding
Since the input and the high current output current paths
both include the ground pin, it is very important to minimize
and common impedance in the ground return. Since the
ICL7667 is an inverter, any common impedance will
generate negative feedback, and will degrade the delay, rise
and fall times. Use a ground plane if possible, or use
separate ground returns for the input and output circuits. To
minimize any common inductance in the ground return,
separate the input and output circuit ground returns as close
to the ICL7667 as is possible.
Bypassing
The rapid charging and discharging of the load capacitance
requires very high current spikes from the power supplies. A
parallel combination of capacitors that has a low impedance
over a wide frequency range should be used. A 4.7µF
tantalum capacitor in parallel with a low inductance 0.1µF
capacitor is usually sufficient bypassing.
2
7. Output stage I
The sum of the abovemust stay within the specified limitsfor
reliable operation.
As noted above, the input inverter current is input voltage
dependent, with an I
input and 6mA maximum with a logic 1 input.
The output stage crowbar current is the current that flows
through the series N-Channel and P-channel devices that
form the output. This current, about 300mA, occurs only
during output transitions. Caution: The inputs should never
be allowed to remain between V
leave the output stage in a high current mode, rapidly
leading to destruction of the device. If only one of the drivers
is being used, be sure to tie the unused input to a ground.
NEVER leave an input floating. The average supply current
drawn by the output stage is frequency dependent, as can
be seen in I
Characteristics Graphs.
The output stage I
the product of the output current times the voltage drop
across the output device. In addition to the current drawn by
any resistive load, there will be an output current due to the
charging and discharging of the load capacitance. In most
high frequency circuits the current used to charge and
discharge capacitance dominates,and the power dissipation
is approximately
P
= CV
AC
where C = Load Capacitance, f = Frequency
In cases where the load is a power MOSFET and the gate
drive requirement are described in terms of gate charge, the
ICL7667 power dissipation will be
CC
CC
R power loss
of 0.1mA maximum with a logic 0
CC
and VIH since this could
IL
vs Frequency graph in the Typical
2
R power dissipation is nothing more than
2
f
Output Damping
Ringing is a common problem in any circuit with very fast
rise or fall times. Such ringing will be aggravated by long
inductive lines with capacitive loads. Techniques to reduce
ringing include:
1. Reduceinductancebymakingprinted circuitboard traces
as short as possible.
2. Reduceinductance by usinga ground planeor by closely
coupling the output lines to their return paths.
3. Use a10Ωto 30Ω resistor in series with the output ofthe
ICL7667.Although this reducesringing, itwill alsoslightly
increase the rise and fall times.
4. Usegoodbypassingtechniquestoprevent supplyvoltage
ringing.
Power Dissipation
The power dissipation of the ICL7667 has three main
components:
5. Input inverter current loss
6. Output stage crossover current loss
3-77
P
= QGVCCf
AC
where QG = Charge required to switch the gate, in
Coulombs, f = Frequency.
Power MOS Driver Circuits
Power MOS Driver Requirements
Because it has a very high peak current output, the ICL7667
the at driving the gate of power MOS devices. The high
current output is important since it minimizes the time the
power MOS device is in the linear region. Figure 9 is a
typical curve of charge vsgatevoltagefor a power MOSFET.
The flat region is caused by the Miller capacitance, where
the drain-to-gate capacitance is multiplied by the voltage
gain of the FET. This increase in capacitance occurs while
the power MOSFET is in the linear region and is dissipating
significant amounts of power. The very high current output of
the ICL7667 is able to rapidly overcome this high
capacitance and quickly turns the MOSFET fully on or off.
Page 6
ICL7667
18
16
14
12
10
GATE TO SOURCE VOLTAGE
-2
ID = 1A
VDD = 50V
8
6
4
2
0
0 2 4 6 8 10 12 14 16 18 20
680pF
212pF
GATE CHARGE - Q
630pF
(NANO-COULOMBS)
G
VDD = 375V
VDD = 200V
FIGURE 9. MOSFET GATE DYNAMIC CHARACTERISTICS
Direct Drive of MOSFETs
Figure 11 showsinterfacesbetween the ICL7667 and typical
switching regulator ICs. Note that unlike the DS0026, the
ICL7667 does not need a dropping resistor and speedup
capacitor between it and the regulator IC. The ICL7667, with
its high slewrateand high voltage drive candirectlydrivethe
gate of the MOSFET. The SG1527 IC is the same as the
SG1525 IC, except that the outputs are inverted. This
inversion is needed since ICL7667 is an inverting buffer.
Transformer Coupled Drive of MOSFETs
Transformers are often used for isolation between the logic
and control section and the power section of a switching
regulator. The high output drive capability of the ICL7667
enables it to directly drive such transformers. Figure 11
shows a typical transformer coupled drive circuit. PWM ICs
with either active high or active low output can be used in
this circuit, since any inversion required can be obtained by
reversing the windings on the secondaries.
Buffered Drivers for Multiple MOSFETs
In very high power applications which use a group of
MOSFETs inparallel,the input capacitance maybe very large
and it can be difficult to charge and discharge quickly. Figure
13 shows a circuit which works very well with very large
capacitance loads. When the input of the driver is zero , Q
held in conduction by the lower half of the ICL7667 and Q
clamped off byQ
off and a current pulse is applied to the gate of Q
. When the inputgoespositive, Q1is turned
1
by the
2
upper half of the ICL7667 through the transformer, T
about 20ns, T
saturates and Q2 is held on by its own C
1
and the bootstrap circuit of C1, D1 and R1. This bootstrap
circuit may not be needed at frequencies greater than 10kHz
since the input capacitance of Q
discharges slowly.
2
. After
1
GS
is
1
is
2
15V
+V
TL494
GND
15V
+165V
DC
+V
C
SG1527
GND
+V
A
ICL7667
B
-V
IRF730
IRF730
FIGURE 10A.
+165V
DC
C
C1
E1
C2
E2
+15V
1K
1K
+V
ICL7667
-V
IRF730
IRF730
V
OUT
3-78
FIGURE 10B.
FIGURE 10. DIRECT DRIVE OF MOSFET GATES
Page 7
18V
CB
CA V
IN
EA
+V
ICL7667
1µF
IRF730
+165V
CA1524
EB
470
470
ICL7667
1µF
-V
IRF730
FIGURE 11. TRANSFORMER COUPLED DRIVE CIRCUIT
0.1µF
IN914
FF10
D
10k
1
R
1
1/2
ICL7667
+
4.7µF
2200pF
V+
4.7µF
Q
IRFF120
0V
-165V
V
OUT
0.1µF
2
1000pF
C
1
1kHz - 250kHz
SQUARE
WAVE
IN TTL
LEVELS
0V - 5V
INPUT
FROM
PWM IC
1/2
ICL7667
5FF10
1/2
ICL7667
IRFF120
Q
1
Z
L
FIGURE 12. VERY HIGH SPEED DRIVER
+15V
+
10µF
-4
-6
-8
(V)
-10
OUT
V
-12
-
IN4001
IN4001
+
-13.5V
47µF
-14
520406080100
SLOPE = 60Ω
I
OUT
f = 10kHz
(mA)
FIGURE 13A. FIGURE 13B. OUTPUT CURRENT vs OUTPUT VOLTAGE
FIGURE 13. VOLTAGE INVERTER
3-79
Page 8
ICL7667
Other Applications
Relay and Lamp Drivers
The ICL7667 is suitable for converting low power TTL or
CMOS signals into high current, high voltage outputs for
relays, lamps and other loads. Unlike many other level
translator/driver ICs, the ICL7667 will both source and sink
current. The continuous output current is limited to 200mA
2
by the I
Charge Pump or Voltage Inverters and Doublers
The low output impedance and wide VCC range of the
ICL7667 make it well suited for charge pump circuits. Figure
13A showsatypical charge pump voltage invertercircuitand
a typical performance curve. A common use of this circuit is
to provide a low current negative supply for analog circuitry
or RS232 drivers. With an input voltage of +15V, this circuit
will deliver 20mA at -12.6V. By increasing the size of the
capacitors, the current capability can be increased and the
voltage loss decreased. The practical range of the input
frequency is 500Hz to 250kHz. As the frequency goes up,
the charge pump capacitors can be made smaller, but the
internal losses in the ICL7667 will rise, reducing the circuit
efficiency.
Figure 14, a voltage doubler, is very similar in both circuitry
and performance. A potential use of Figure 13 would be to
supply the higher voltage needed for EEPROM or EPROM
programming.
R power dissipation in the output FETs.
Clock Driver
Some microprocessors (such as the CDP68HC05 families)
use a clock signal to control the various LSI peripherals of
the family. The ICL7667s combination of low propagation
delay, high current drive capability and wide voltage swing
make it attractive for this application. Although the ICL7667
is primarily intended for driving power MOSFET gates at
15V, the ICL7667 also works well as a 5V high-speed buffer.
Unlike standard 4000 series CMOS, the ICL7667 uses short
channel length FETs and the ICL7667 is only slightly slower
at 5V than at 15V.
1kHz - 250kHz
SQUARE
WAVE
IN TTL
LEVELS
+15V
1/2
ICL7667
FIGURE 14. VOLTAGE DOUBLER
+
10µF
+15
IN4001
-
IN4001
-
+
28.5V
47µF
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believ ed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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3-80
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