Datasheet ICL7660, ICL7660A Datasheet (Intersil Corporation)

3-26

File Number

3072.4

ICL7660, ICL7660A

CMOS Voltage Converters

The Intersil ICL7660 and ICL7660A are monolithic CMOS
power supply circuits which offer unique performance
advantages over previously available devices. The ICL7660
performs supply voltage conversions from positive to
negative for an input range of +1.5V to +10.0V resulting in
complementary output voltages of -1.5V to -10.0V and the
ICL7660A does the same conversionswithaninputrangeof
+1.5V to +12.0V resulting in complementary output voltages
of -1.5V to -12.0V. Only 2 noncritical external capacitors are
needed for the charge pump and charge reservoir functions.
The ICL7660 and ICL7660A can also be connected to
function as voltage doublers and will generate output
voltages up to +18.6V with a +10V input.

Contained on the chip are a series DC supply regulator, RC
oscillator, voltage level translator, and four output power
MOS switches. A unique logic element senses the most
negative voltage in the deviceand ensures that the output N­Channel switch source-substrate junctions are not forward
biased. This assures latchup free operation.

The oscillator, when unloaded, oscillates at a nominal
frequency of 10kHz for an input supply voltage of 5.0V. This
frequency can be lowered by the addition of an external
capacitor to the “OSC” terminal, or the oscillator may be
overdriven by an external clock.

The “LV” terminal may be tied to GROUND to bypass the
internal series regulator and improve low voltage (LV)
operation. At medium to high voltages (+3.5V to +10.0V for
the ICL7660 and +3.5V to +12.0V for the ICL7660A), the LV
pin is left floating to prevent device latchup.

Features

• Simple Conversion of +5V Logic Supply to ±5V Supplies

• Simple Voltage Multiplication (V

OUT

= (-) nVIN)

• Typical Open Circuit Voltage Conversion Efficiency 99.9%

• Typical Power Efficiency 98%

• Wide Operating Voltage Range

- ICL7660 . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 10.0V

- ICL7660A . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 12.0V

• ICL7660A 100% Tested at 3V

• Easy to Use - Requires Only 2 External Non-Critical
Passive Components

• No External Diode Over Full Temp. and Voltage Range

Applications

• On Board Negative Supply for Dynamic RAMs

• Localized µProcessor (8080 Type) Negative Supplies

• Inexpensive Negative Supplies

• Data Acquisition Systems

Pinouts

ICL7660, ICL7660A (PDIP, SOIC)

TOP VIEW

ICL7660 (METAL CAN)

TOP VIEW

Ordering Information

PART NO.

TEMP.

RANGE (oC) PACKAGE

PKG.

NO.

ICL7660CBA 0 to 70 8 Ld SOIC (N) M8.15
ICL7660CBA-T 0 to 70 8 Ld SOIC (N)

Tape and Reel

M8.15

ICL7660CPA 0 to 70 8 Ld PDIP E8.3
ICL7660MTV† 0 to 70 8 Pin Metal Can T8.C
ICL7660ACBA 0 to 70 8 Ld SOIC (N) M8.15
ICL7660ACBA-T 0 to 70 8 Ld SOIC (N)

Tape and Reel

M8.15

ICL7660ACPA 0 to 70 8 Ld PDIP E8.3
ICL7660AIBA -40 to 85 8 Ld SOIC (N) M8.15
ICL7660AIBA-T -40 to 85 8 Ld SOIC (N)

Tape and Reel

M8.15

ICL7660AIPA -40 to 85 8 Ld PDIP E8.3

† Add /883B to part number if 883B processing is required.

NC

CAP+

GND

CAP-

1
2
3
4

8
7
6
5

V+
OSC
LV
V

OUT

V+ (AND CASE)

LV

CAP+

NC

GND

OSC

V

OUT

2

4

6

1

3

7

5

8

CAP-

Data Sheet April 1999

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

3-27

C

Absolute Maximum Ratings Thermal Information

Supply Voltage

ICL7660 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +10.5V

ICL7660A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +13.0V

LV and OSC Input Voltage. . . . . . -0.3V to (V+ +0.3V) for V+ < 5.5V

(Note 2) . . . . . . . . . . . . . . (V+ -5.5V) to (V+ +0.3V) for V+ > 5.5V

Current into LV (Note 2). . . . . . . . . . . . . . . . . . . 20µA for V+ > 3.5V

Output Short Duration (V

SUPPLY

≤ 5.5V) . . . . . . . . . . . .Continuous

Operating Conditions

Temperature Range

ICL7660M. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

ICL7660C, ICL7660AC. . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC

ICL7660AI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC

Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)

PDIP Package . . . . . . . . . . . . . . . . . . . 150 N/A

SOIC Package . . . . . . . . . . . . . . . . . . . 165 N/A

Metal Can Package (ICL7660 Only). . . 160 70

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering, 10s). . . . . . . . . . . . .300oC

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications ICL7660 and ICL7660A, V+ = 5V, T

A

= 25oC, C

OSC

= 0, Test Circuit Figure 11

Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS

ICL7660 ICL7660A

UNITSMIN TYP MAX MIN TYP MAX

Supply Current I+ R

L

= ∞ - 170 500 - 80 165 µA

Supply Voltage Range - Lo VL+ MIN ≤ TA≤ MAX, RL = 10kΩ, LV to GND 1.5 - 3.5 1.5 - 3.5 V
Supply Voltage Range - Hi VH+ MIN ≤ TA≤ MAX, RL = 10kΩ, LV to Open 3.0 - 10.0 3 - 12 V
Output Source Resistance R

OUTIOUT

= 20mA, TA = 25oC - 55 100 - 60 100 Ω

I

OUT

= 20mA, 0oC ≤ TA≤ 70oC - - 120 - - 120 Ω

I

OUT

= 20mA, -55oC ≤ TA≤ 125oC - - 150 - - - Ω

I

OUT

= 20mA, -40oC ≤ TA≤ 85oC -----120Ω

V

+

= 2V, I

OUT

= 3mA, LV to GND

0oC ≤ TA≤ 70oC

- - 300 - - 300 Ω

V+ = 2V, I

OUT

= 3mA, LV to GND,

-55oC ≤ TA≤ 125oC

--400---Ω

Oscillator Frequency f

OSC

-10- -10-kHz

Power Efficiency P

EF

RL = 5kΩ 95 98 - 96 98 - %

Voltage Conversion Efficiency V

OUT EFRL

= ∞ 97 99.9 - 99 99.9 - %

Oscillator Impedance Z

OSC

V+ = 2V - 1.0 - - 1 - MΩ
V = 5V -100----kΩ

ICL7660A, V+ = 3V, TA = 25oC, OSC = Free running, Test Circuit Figure 11, Unless Otherwise Specified

Supply Current (Note 3) I+ V+ = 3V, RL = ∞, 25oC - - - - 26 100 µA

0oC < TA<70oC -----125µA

-40oC < TA < 85oC -----125µA

Output Source Resistance R

OUT

V+ = 3V, I

OUT

= 10mA - - - - 97 150 Ω

0oC < TA<70oC -----200Ω

-40oC < TA <85oC -----200Ω

Oscillator Frequency (Note 3) f

OSC

V+ = 3V (same as 5V conditions) - - - 5.0 8 - kHz
0oC < TA<70oC - - - 3.0 - - kHz

-40oC < TA <85oC - - - 3.0 - - kHz

ICL7660, ICL7660A

3-28

Functional Block Diagram

Voltage Conversion Efficiency V

OUT

EFF V+ = 3V, RL = ∞ ---99--%

T

MIN

< TA < T

MAX

---99--%

Power Efficiency P

EFF

V+ = 3V, RL = 5kΩ ---96--%
T

MIN

< TA < T

MAX

---95--%

NOTES:

2. Connecting any input terminal tovoltagesgreaterthan V+ or less than GND may cause destructive latchup. Itisrecommended that no inputs
from sources operating from external supplies be applied prior to “power up” of the ICL7660, ICL7660A.

3. Derate linearly above 50oC by 5.5mW/oC.

4. In the test circuit,thereis no external capacitor applied to pin7.However, when the device is plugged intoatest socket, there is usually a very
small but finite stray capacitance present, of the order of 5pF.

5. The Intersil ICL7660A can operatewithoutan external diode over the full temperature and voltage range. This device will function in existing
designs which incorporate an external diode with no degradation in overall circuit performance.

Electrical Specifications ICL7660 and ICL7660A, V+ = 5V, T

A

= 25oC, C

OSC

= 0, Test Circuit Figure 11

Unless Otherwise Specified (Continued)

PARAMETER SYMBOL TEST CONDITIONS

ICL7660 ICL7660A

UNITSMIN TYP MAX MIN TYP MAX

RC

OSCILLATOR

÷2

VOLTAGE

LEVEL

TRANSLATOR

VOLTAGE

REGULATOR

LOGIC

NETWORK

OSC LV

V+

CAP+

CAP-

V

OUT

Typical Performance Curves

(Test Circuit of Figure 11)

FIGURE 1. OPERATING VOLTAGE AS A FUNCTION OF

TEMPERATURE

FIGURE 2. OUTPUT SOURCE RESISTANCE AS A FUNCTION

OF SUPPLY VOLTAGE

10

SUPPLY VOLTAGE RANGE

(NO DIODE REQUIRED)

8

6

4

2

0

-55 -25 0 25 50 100 125
TEMPERATURE (

o

C)

SUPPLY VOLTAGE (V)

10K

TA = 25oC

1000

100

10

01 2345678

SUPPLY VOLTAGE (V+)

OUTPUT SOURCE RESISTANCE (Ω)

ICL7660, ICL7660A

3-29

FIGURE 3. OUTPUT SOURCE RESISTANCE AS A FUNCTION

OF TEMPERATURE

FIGURE 4. POWER CONVERSION EFFICIENCY AS A

FUNCTION OF OSC. FREQUENCY

FIGURE 5. FREQUENCY OF OSCILLATION AS A FUNCTION

OF EXTERNAL OSC. CAPACITANCE

FIGURE 6. UNLOADED OSCILLATOR FREQUENCY AS A

FUNCTION OF TEMPERATURE

FIGURE 7. OUTPUT VOLTAGE AS A FUNCTION OF OUTPUT

CURRENT

FIGURE 8. SUPPLY CURRENT AND POWER CONVERSION

EFFICIENCY AS A FUNCTION OF LOAD
CURRENT

Typical Performance Curves

(Test Circuit of Figure 11) (Continued)

350

300

250

200

150

100

50

0

-55 -25 0 25 50 75 100 125
TEMPERATURE (

o

C)

OUTPUT SOURCE RESISTANCE (Ω)

I

OUT

= 1mA

V+ = +2V

V+ = 5V

POWER CONVERSION EFFICIENCY (%)

TA = 25oC

I

OUT

= 1mA

I

OUT

= 15mA

100

98
96
94
92
90
88
86
84
82
80

100 1K 10K

OSC. FREQUENCY f

OSC

(Hz)

V+ = +5V

OSCILLATOR FREQUENCY f

OSC

(Hz)

10K

1K

100

10

V+ = 5V
T

A

= 25oC

1.0 10 100 1000 10K
C

OSC

(pF)

20

18

16

14

12

10

8

6

-50 -25 0 25 50 75 100 125

OSCILLATOR FREQUENCY f

OSC

(kHz)

TEMPERATURE (oC)

V+ = +5V

TA = 25oC
V+ = +5V

5
4
3
2
1
0

-1

-2

-3

-4

-5

OUTPUT VOLTAGE

LOAD CURRENT IL (mA)

SLOPE 55Ω

0 1020304050607080

P

EFF

I

+

TA = 25oC
V

+

= +5V

SUPPLY CURRENT I+ (mA)

100
90
80
70
60
50
40
30
20
10
0

100

90
80
70
60
50
40
30
20
10

0

0102030405060

POWER CONVERSION EFFICIENCY (%)

LOAD CURRENT IL (mA)

ICL7660, ICL7660A

3-30

Detailed Description

The ICL7660 and ICL7660A contain all the necessary
circuitry to complete a negative voltage converter, with the
exception of 2 external capacitors which may be inexpensive
10µF polarized electrolytic types. The mode of operation of
the device may be best understood by considering Figure
12, which shows an idealized negative voltage converter.
Capacitor C

1

is charged to a voltage, V+, for the half cycle

when switches S

1

and S3 are closed. (Note: Switches S

2

and S4 are open during this half cycle.) During the second
half cycle of operation, switches S

2

and S4 are closed, with

S

1

and S3 open, thereby shifting capacitor C1 negatively by

V+ volts. Charge is then transferred from C

1

to C2such that

the voltage on C

2

is exactly V+, assuming ideal switches and

no load on C

2

. The ICL7660 approaches this ideal situation

more closely than existing non-mechanical circuits.

In the ICL7660 and ICL7660A, the 4 switches of Figure 12
are MOS power switches; S

1

is a P-Channel device and S2,

S

3

and S4 are N-Channel devices. The main difficulty with
this approach is that in integrating the switches, the
substrates of S

3

and S4must always remain reverse biased
with respect to their sources, but not so much as to degrade
their “ON” resistances. In addition, at circuit start-up, and
under output short circuit conditions (V

OUT

= V+), the output
voltage must be sensed and the substrate bias adjusted
accordingly. Failure to accomplish this would result in high
power losses and probable device latchup.

This problem is eliminated in the ICL7660 and ICL7660A by a
logic network which senses the output voltage (V

OUT

) together

with the level translators, and switches the substrates of S

3

and

S

4

to the correct level to maintain necessary rev erse bias.

FIGURE 9. OUTPUT VOLTAGE AS A FUNCTION OF OUTPUT

CURRENT

FIGURE 10. SUPPLY CURRENT AND POWER CONVERSION

EFFICIENCY AS A FUNCTION OF LOAD
CURRENT

NOTE:

6. These curves include in the supply current that current fed directly into the load RLfrom the V+ (See Figure 11). Thus, approximately half the
supply current goes directly to the positive side of the load, and the other half, through the ICL7660/ICL7660A, to the negative side of the load.
Ideally, V

OUT

∼ 2V

IN

, I

S

∼ 2I

L

, so VIN x I

S

∼ V

OUT

x IL.

NOTE: For large values of C

OSC

(>1000pF) the values of C1 and C2 should be increased to 100µF.

FIGURE 11. ICL7660, ICL7660A TEST CIRCUIT

Typical Performance Curves

(Test Circuit of Figure 11) (Continued)

TA = 25oC
V+ = 2V

+2

+1

0

-1

-2

SLOPE 150Ω

012345678

LOAD CURRENT I

L

(mA)

OUTPUT VOLTAGE

100

90
80
70
60
50
40
30
20
10

0

POWER CONVERSION EFFICIENCY (%)

P

EFF

I+

LOAD CURRENT I

L

(mA)

0 1.5 3.0 4.5 6.0 7.5 9.0

20.0

18.0

16.0

14.0

12.0

10.0

8.0

6.0

4.0

2.0
0

SUPPLY CURRENT (mA) (NOTE 6)

TA =25oC
V+ = 2V

1
2
3
4

8
7
6
5

+

-

C

1

10µF

ISV+

(+5V)

I

L

R

L

-V

OUT

C

2

10µF

ICL7660

C

OSC

+

-

(NOTE)

ICL7660A

ICL7660, ICL7660A

3-31

The voltage regulator portion of the ICL7660 and ICL7660A is
an integral part of the anti-latchup circuitry,howeverits inherent
voltage drop can degrade operation at low voltages. Therefore,
to improve low v oltage operation the “LV” pin should be
connected to GROUND , disab ling the regulator. For supply
voltages greater than 3.5V the LV terminal must be left open to
insure latchup proof operation, and prevent de vice damage .

Theoretical Power Efficiency
Considerations

In theory a voltage converter can approach 100% efficiency
if certain conditions are met.

1. The driver circuitry consumes minimal power.

2. The output switches haveextremely low ON resistance
and virtually no offset.

3. The impedances ofthepumpandreservoircapacitorsare
negligible at the pump frequency.

The ICL7660 and ICL7660A approach these conditions for
negative voltage conversion if large values of C

1

and C

2

are used.

ENERGY IS LOST ONLY IN THE TRANSFER OF
CHARGE BETWEEN CAPACITORS IF A CHANGE IN
VOLTAGE OCCURS. The energy lost is defined by:

E =

1

/2 C1 (V

1

2

- V

2

2

)

where V1and V2are the voltages on C1during the pump and
transfer cycles. If the impedances of C

1

and C2 are relatively
high at the pump frequency (refer to Figure 12) compared to
the value of R

L

, there will be a substantial difference in the

voltages V

1

and V2. Therefore it is not only desirable to make

C

2

as large as possible to eliminate output voltage ripple, but

also to employ a correspondingly large value forC

1

in order to

achieve maximum efficiency ofoperation.

Do’s And Don’ts

1. Do not exceed maximum supply voltages.

2. Do not connect LVterminal to GROUND for supply
voltages greater than 3.5V.

3. Do not shortcircuit theoutput to V+ supply for supply volt­agesabove5.5V forextended periods, however,transient
conditions including start-up are okay.

4. When using polarized capacitors, the + terminal of C

1

mustbe connected to pin 2 ofthe ICL7660 and ICL7660A
and the + terminal of C

2

must be connected to GROUND.

5. If the voltage supply driving the ICL7660 and ICL7660A
has a large source impedance (25Ω -30Ω), then a 2.2µF
capacitor from pin 8 to ground may be required to limit
rate of rise of input voltage to less than 2V/µs.

6. User should insure that the output (pin 5) does not go
morepositivethan GND (pin 3). Device latch up will occur
under these conditions. A 1N914 or similar diode placed
in parallel with C

2

will prevent the device from latching up

under these conditions. (Anode pin 5, Cathode pin 3).

V

OUT

= -V

IN

C

2

V

IN

C

1

S

3

S

4

S

1

S

2

8

3

2

5

3

7

FIGURE 12. IDEALIZED NEGATIVE VOLTAGE CONVERTER

FIGURE 13A. CONFIGURATION FIGURE 13B. THEVENIN EQUIVALENT

FIGURE 13. SIMPLE NEGATIVE CONVERTER

1
2
3
4

8
7
6
5

+

-

10µF

ICL7660

V

OUT

= -V+

V+

+

-

10µF

ICL7660A

V+

+

-

R

O

V

OUT

ICL7660, ICL7660A

3-32

Typical Applications

Simple Negative Voltage Converter

Themajority of applications will undoubtedly utilize the ICL7660
and ICL7660A for generation of negative supplyvoltages.
Figure 13 shows typical connections to provide a negative
supply negative (GND) for supply v oltages below 3.5V.

The output characteristics of the circuit in Figure 13A can be
approximated by an ideal voltage source in series with a
resistance as shown in Figure 13B. The voltage source has
a value of -V+. The output impedance (R

O

) is a function of
the ON resistance of the internal MOS switches (shown in
Figure 12), the switching frequency, the value of C

1

and C2,
and the ESR (equivalent series resistance) of C1 and C2. A
good first order approximation for R

O

is:

RSW, the total switch resistance, is a function of supply
voltageand temperature (See the Output Source Resistance
graphs), typically 23Ω at 25

o

C and 5V. Careful selection of

C

1

and C2 will reduce the remaining terms, minimizing the
output impedance. High value capacitors will reduce the
1/(f

PUMP

• C1) component, and low ESR capacitors will
lower the ESR term. Increasing the oscillator frequency will
reduce the 1/(f

PUMP

• C1) term, but may have the side effect

of a net increase in output impedance when C

1

> 10µF and

there is no longer enough time to fully charge the capacitors

FIGURE 14. OUTPUT RIPPLE

FIGURE 15. PARALLELING DEVICES

FIGURE 16. CASCADING DEVICES FOR INCREASED OUTPUT VOLTAGE

A

t

2

t

1

B

0

-(V+)

V

1
2
3
4

8
7
6
5

ICL7660

V+

C

1

ICL7660A

1
2
3
4

8
7
6
5

ICL7660

C

1

ICL7660A

R

L

+

-

C

2

“n”

“1”

1
2
3
4

8
7
6
5

V+

1
2
3
4

8
7
6
5

+

-

10µF

+

-

10µF

+

-

10µF

+

-

10µF

V

OUT

= -nV+

ICL7660

ICL7660A

“n”

ICL7660

ICL7660A

“1”

R

O

≅

2(R

SW1

+ R

SW3

+ ESRC1) +

2(R

SW2

+ R

SW4

+ ESRC1) +

1

+ ESR

C2

(f

PUMP

) (C1)

(f

PUMP

=

f

OSC

,R

SWX

= MOSFET switch resistance)

2

Combining the four R

SWX

terms as RSW, we see that:

RO≅

2 (RSW) +

1

+ 4 (ESRC1) + ESR

C2

(f

PUMP

) (C1)

R

O

≅

2(R

SW1

+ R

SW3

+ ESRC1) +

ICL7660, ICL7660A

3-33

every cycle. In a typical application where f

OSC

= 10kHz and

C = C

1

= C2 = 10µF:

R

O

≅ 46 + 20 + 5 (ESRC)

Since the ESRs of the capacitors are reflected in the output
impedance multiplied by a factor of 5, a high v alue could
potentially swamp out a low 1/(f

PUMP

• C1) term, rendering an
increase in switching frequency or filter capacitance ineffective.
Typical electrolytic capacitors may have ESRs as high as 10Ω.

R

O/

≅ 46 + 20 + 5 (ESRC)

Since the ESRs of the capacitors are reflected in the output
impedance multiplied by a factor of 5, a high v alue could
potentially swamp out a low 1/(f

PUMP

• C1) term, rendering an
increase in switching frequency or filter capacitance ineffective.
Typical electrolytic capacitors may have ESRs as high as 10Ω.

Output Ripple

ESR also affects the ripple voltage seen at the output. The
total ripple is determined by 2 voltages, A and B, as shown in
Figure 14. Segment A is the voltage drop across the ESR of
C

2

at the instant it goes from being charged by C1 (current

flow into C

2

) to being discharged through the load (current

flowing out of C

2

). The magnitude of this current change is

2• I

OUT

, hence the total drop is 2• I

OUT

• eSRC2V. Segment

B is the voltage change across C

2

during time t2, the half of

the cycle when C

2

supplies current to the load. The drop at

B is l

OUT

• t2/C2V. The peak-to-peak ripple voltage is the

sum of these voltage drops:

Again, a low ESR capacitor will reset in a higher
performance output.

Paralleling Devices

Any number of ICL7660 and ICL7660A voltage converters
may be paralleled to reduce output resistance. The reservoir
capacitor, C

2

, serves all devices while each device requires

its own pump capacitor, C

1

. The resultant output resistance

would be approximately:

Cascading Devices

The ICL7660 and ICL7660A may be cascaded as shown to
produced larger negative multiplication of the initial supply
voltage. However, due to the finite efficiency of each device,
the practical limit is 10 devices for light loads. The output
voltage is defined by:

V

OUT

= -n (VIN),

where n is an integer representing the number of devices
cascaded. The resulting output resistance would be
approximately the weighted sum of the individual ICL7660
and ICL7660A R

OUT

values.

Changing the ICL7660/ICL7660A Oscillator
Frequency

It may be desirable in some applications, due to noise or
other considerations, to increase the oscillator frequency.
This is achieved by overdriving the oscillator from an
external clock, as shown in Figure 17. In order to prevent
possible device latchup, a 1kΩ resistor must be used in
series with the clock output. In a situation where the
designer has generated the external clock frequency using
TTL logic, the addition of a 10kΩ pullup resistor to V+ supply
is required. Note that the pump frequency with external
clocking, as with internal clocking, will be

1

/2 of the clock
frequency. Output transitions occur on the positive-going
edge of the clock.

It is also possible to increase the conversion efficiency of the
ICL7660 and ICL7660A at low load levels by lowering the
oscillator frequency. This reduces the switching losses, and is
shown in Figure 18. However, lowering the oscillator
frequency will cause an undesirable increase in the
impedance of the pump (C

1

) and reservoir (C2) capacitors;

this is overcome by increasing the values of C

1

and C2by the
same factor that the frequency has been reduced. For
example, the addition of a 100pF capacitor between pin 7
(OSC) and V+ will lower the oscillator frequency to 1kHz from
its nominal frequency of 10kHz (a multiple of 10), and thereby
necessitate a corresponding increase in the value of C

1

and

C

2

(from 10µF to 100µF).

R

O

≅

2 (23) +

1

+ 4 (ESRC1) + ESR

C2

(5 • 103) (10-5)

RO≅

2 (23) +

1

+ 4 (ESRC1) + ESR

C2

(5 • 103) (10-5)

V

RIPPLE

≅

[

1

+ 2 (ESRC2)]I

OUT

2 (f

PUMP

) (C2)

R

OUT

=

R

OUT

(of ICL7660/ICL7660A)

n (number of devices)

1
2
3
4

8
7
6
5

+

-

10µF

ICL7660

V

OUT

V+

+

-

10µF

V+

CMOS
GATE

1kΩ

ICL7660A

FIGURE 17. EXTERNAL CLOCKING

ICL7660, ICL7660A

3-34

Positive Voltage Doubling

The ICL7660 and ICL7660A may be employed to achieve
positive voltage doubling using the circuit shown in Figure

19. In this application, the pump inverter switches of the
ICL7660 and ICL7660A are used to charge C

1

to a voltage

levelofV+-V

F

(where V+ is the supply voltage and VFis the

forward voltage drop of diode D

1

). On the transfer cycle, the

voltageon C

1

plus the supply voltage (V+) is applied through

diode D

2

to capacitor C2. The voltage thus created on C

2

becomes (2V+) - (2VF) or twice the supply voltage minus the
combined forward voltage drops of diodes D

1

and D2.

The source impedance of the output (V

OUT

) will depend on
the output current, but for V+ = 5V and an output current of
10mA it will be approximately 60Ω.

Combined Negative Voltage Conversion
and Positive Supply Doubling

Figure 20 combines the functions shown in Figures 13 and
Figure 19 to provide negative voltage conversion and
positive voltage doubling simultaneously. This approach
would be, for example, suitable for generating +9V and -5V
from an existing +5V supply. In this instance capacitors C

1

and C3 perform the pump and reservoir functions
respectively for the generation of the negative voltage, while
capacitors C

2

and C4 are pump and reservoir respectively
for the doubled positive voltage. There is a penalty in this
configuration which combines both functions, however, in
that the source impedances of the generated supplies will be
somewhat higher due to the finite impedance of the common
charge pump driver at pin 2 of the device.

Voltage Splitting

The bidirectional characteristics can also be used to split a
higher supply in half, as shown in Figure 21. The combined
load will be evenly shared between the two sides. Because
the switches share the load in parallel, the output impedance
is much lower than in the standard circuits, and higher
currents can be drawn from the device. By using this circuit,
and then the circuit of Figure 16, +15V can be converted (via
+7.5, and -7.5) to a nominal -15V, although with rather high
series output resistance (

~250Ω).

Regulated Negative Voltage Supply

In some cases, the output impedance of the ICL7660 and
ICL7660A can be a problem, particularly if the load current
varies substantially. The circuit of Figure 22 can be used to
overcomethis by controlling the input voltage, via an ICL7611
low-power CMOS op amp, in such a way as to maintain a
nearly constant output voltage. Direct feedback is inadvisable,
since the ICL7660s and ICL7660As output does not respond
instantaneously to change in input, but only after the switching
delay. The circuit shown supplies enough delay to
accommodate the ICL7660 and ICL7660A, while maintaining
adequate feedback. An increase in pump and storage
capacitors is desirable, and the values sho wn provides an
output impedance of less than 5Ω to a load of 10mA.

1
2
3
4

8
7
6
5

+

-

V

OUT

V+

+

-

C

2

C

1

C

OSC

ICL7660

ICL7660A

FIGURE 18. LOWERING OSCILLATOR FREQUENCY

1
2
3
4

8
7
6
5

V+

D

2

C

1

C

2

V

OUT

=

(2V+) - (2V

F

)

+

-

+

-

D

1

ICL7660

ICL7660A

FIGURE 19. POSITIVE VOLT DOUBLER

1
2
3
4

8
7
6
5

V+

D

1

D

2

C

4

V

OUT

= (2V+) -

(V

FD1

) - (V

FD2

)

+

-

C

2

+

-

C

3

+

-

V

OUT

=

- (nV

IN

- V

FDX

)

C

1

+

-

ICL7660

ICL7660A

FIGURE 20. COMBINED NEGATIVEVOLTAGE CONVERTER

AND POSITIVE DOUBLER

1
2
3
4

8
7
6
5

+

-

+

-

50µF

50µF

+

-

50µF

R

L1

V

OUT

=

V+ - V-

2

V+

V -

R

L2

ICL7660

ICL7660A

FIGURE 21. SPLITTING A SUPPLY IN HALF

ICL7660, ICL7660A

3-35

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However,no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

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NORTH AMERICA

Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: [phone]
FAX: [phone]

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Mercure Center
100, Rue de la Fusee
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TEL: [phone]
FAX: [phone]

Other Applications

Further information on the operation and use of the ICL7660
and ICL7660A may be found in AN051 “Principals and
Applications of the ICL7660 and ICL7660A CMOS Voltage
Converter”.

1
2
3
4

8
7
6
5

+

-

100µF

100µF

V

OUT

+

-

10µF

ICL7611

+

-

100Ω

50K

+8V

100K

50K

ICL8069

56K

+8V

800K

250K

VOLTAGE

ADJUST

-

+

ICL7660

ICL7660A

FIGURE 22. REGULATING THE OUTPUT VOLTAGE

1
2
3
4

8
7
6
5

+

-

+

-

10µF

16

TTL DATA

INPUT

15

4

10µF

13

14

12 11

+5V LOGIC SUPPLY

RS232
DAT A
OUTPUT

IH5142

1

3

+5V

-5V

ICL7660

ICL7660A

FIGURE 23. RS232 LEVELS FROM A SINGLE 5V SUPPLY

ICL7660, ICL7660A