The Intersil ICL3237E contains 3.0V to 5.5V powered
RS-232 transmitters/receivers which meet ElA/TIA-232 and
V.28/V.24 specifications, even at V
provides
Human Body Model) on transmitter outputs and receiver
inputs (RS-232 pins). Targeted applications are cell phones,
PDAs, P almtops , and notebook and laptop computers where
the low operational, and even lower standby, power
consumption is critical. Efficient on-chip charge pumps,
coupled with the manual powerdown function, reduce the
standby supply current to a 10nA trickle. Small footprint
packaging, and the use of small, low value capacitors ensure
board space savings as well. Data rates greater than 1Mbps
(MBAUD = V
conditions. The ICL3237E is fully compatible with 3.3V only
systems, mixed 3.3V and 5.0V systems, and 5.0V only
systems.
The ICL3237E is a 5 driver, 3 receiver device that also
includes a noninverting always-active receiver for “wake-up”
capability.
Table 1 summarizes the features of the device represented
by this data sheet, while Application Note AN9863
summarizes the features of each device comprising the
ICL32XX 3V family.
NOTE:
1. Data rate is selectable via the MBAUD pin.
±15kV ESD protection (IEC61000-4-2 Air Gap and
) are guaranteed at worst case load
CC
PART
NUMBER
ICL3237E531250/1000YESNOYESNO
NO. OF
Tx.
NO. OF
Rx.
= 3.0V. Additionally, it
CC
TABLE 1. SUMMARY OF FEATURES
NO. OF
MONITOR Rx.
)
(R
OUTB
(NOTE 1)
DATA
RATE
(kbps)
Features
• ESD Protection For RS-232 I/O Pins to ±15kV (IEC61000)
• Pin Compatible Replacement for MAX3237E
• Pin Selectable, Guaranteed Data Rate . . 250kbps/1Mbps
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
• RS-232 Compatible with VCC = 2.7V
• Latch-Up Fre e
• On-Chip Voltage Converters Require Only Four External
Capacitors
• Manual Powerdown Feature
• Flow Through Pinout
• Rx and Tx Hysteresis For Improved Noise Immunity
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
ICL3237E
www.BDTIC.com/Intersil
Pinout
Ordering Information
TEMP.
PART NUMBER
RANGE (oC)PACKAGE
ICL3237ECA0 to 7028 Ld SSOPM28.209
ICL3237ECAZ
(See Note)
0 to 7028 Ld SSOP
(Pb-free)
ICL3237EIA-40 to 8528 Ld SSOPM28.209
ICL3237EIAZ
(See Note)
-40 to 8528 Ld SSOP
(Pb-free)
*Add “-T” suffix to part number for tape and reel packaging.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
C1+External capacitor (voltage doubler) is connected to this lead.
C1-External capacitor (voltage doubler) is connected to this lead.
C2+External capacitor (voltage inverter) is connected to this lead.
C2-External capacitor (voltage inverter) is connected to this lead.
T
T
OUT
R
R
OUT
R
OUTB
EN
SHDN
MBAUDInput low selects 250kbps data rate, and input high selects 1Mbps data rate (Note 2).
NOTE:
2. These input pins incorporate positive feedback resistors. Once the input is driven to a valid logic level, the feedback resistor maintains that logic
level until V
System power supply input (3.0V to 5.5V).
TTL/CMOS compatible transm it ter I nputs (Note 2).
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
5. θ
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
The ICL3237E operates from a single +3V to +5.5V supply,
guarantees a 1Mbps minim um data rate (MBAUD = V
requires only four small external 0.1µF (0.22µF f o r
V
= 3.0V) capacitors, features low power consumption,
CC
and meets all EIA/TIA-232 and V . 28 specifications. The
circuit is divided into three sections: The charge pump, the
transmitters, and the receivers.
Charge-Pump
Intersil’s new ICL32XX family utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a V
supply as
CC
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
voltage doubler and inverter functions at V
=3.3V. See
CC
the “Capacitor Selection” section, and Table 3 for capacitor
recommendations for other operating conditions. The cha rge
pumps operate discontinuously (i.e., they turn off as soon as
the V+ and V- supplies are pumped up to the nominal
values), resulting in significant power savings.
Transmitters
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies, these
transmitters deliver true RS-232 levels over a wide range of
single supply system voltages.
All transmitter outputs disable and assume a high
impedance state when the device enters the powerdown
mode (see Table 2). These outputs may be driven to ±12V
when disabled.
The ICL3237E guarantees a 1Mbps data rate
(MBAUD = V
V
≥ 3.0V, with one transmitter operating at full speed.
CC
Under more typical conditions of V
R
=3kΩ, and CL= 250pF, one transmitter easily operates
L
at 1.7Mbps.
Transmitter inputs incorporate an active positive feedback
resistor that maintains the last driven input state in the
absence of a forcing signal. Unused transmitter inputs may
be left unconnected.
) for full load conditions (3kΩ and 250pF),
CC
≥ 3.3V, C
CC
1-4
),
CC
= 0.1µF,
hysteresis to increase noise immunity and decrease errors
due to slow input signal transitions.
Monitor receivers remain active even during manual
powerdown and forced receiver disable, making them
extremely useful for Ring Indicator monitoring. Standard
receivers driving powered down peripherals must be
disabled to prevent current flow through the peripheral’s
protection diodes (see Figures 2 and 3). This renders them
useless for wake up functions, but the corresponding monitor
receiver can be dedicated to this task as shown in Figure 3.
V
CC
R
XIN
-25V ≤ V
FIGURE 1. INVERTING RECEIVER CONNECTIONS
RIN
≤ +25V
GND
5kΩ
R
GND ≤ V
XOUT
ROUT
≤ V
CC
Po werdown Functionality
This 3V device requires a nominal supply current of 0.3mA
during normal operation (not in powerdown mode). This is
considerably less than the 5mA to 11mA current required of
5V RS-232 devices. The already low current requirement
drops significantly when the device enters powerdown mode.
In powerdown, supply current drops to 10nA, because the
on-chip charge pump turns off (V+ collapses to V
collapses to GND), and the transmitter outputs tristate. This
micro-power mode makes the ICL3237E ideal for battery
powered and portable applications.
Software Controlled (Manual) Powerdown
On the ICL3237E, the powerdown control is via a simple
shutdown (SHDN
operation, while driving it low forces the IC into it’s
powerdown state. Connect SHDN
function isn’t needed. Note that all the receiver outputs
remain enabled during shutdown (see Table 2). For the
lowest power consumption during powerdown, the receivers
should also be disabled by driving the EN
next section, and Figures 2 and 3). The time required to exit
powerdown, and resume transmission is only 100µs.
) pin. Driving this pin high enables normal
to VCC if the powerdown
input high (see
CC
, V-
Receivers
The ICL3237E contains standard inverting receivers that
tristate only when the EN
control line is driven high.
Additionally, it includes a noninverting (monitor) receiver
(denoted by the R
label) that is always active,
OUTB
regardless of the state of any control lines. All the receivers
convert RS-232 signals to CMOS output levels and accept
inputs up to ±25V while presenting the required 3kΩ to 7kΩ
input impedance (see Figure 1) even if the power is off
(V
= 0V). The receivers’ Schmitt trigger input stage uses
CC
6
ICL3237E
www.BDTIC.com/Intersil
TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE
INPUT EN INPUT TRANSMITTER OUTPUTS RECEIVER OUTPUTS R
This device also features an EN input to control the receiver
outputs. Driving EN
receiver outputs placing them in a high impedance state.
This is useful to eliminate supply current, due to a receiver
output forward biasing the protection diode, when driving the
input of a powered down (V
Figure 2). The enable input has no effect on transmitter nor
monitor (R
OUTB
high disables all the inverting (standard)
= GND) peripheral (see
CC
) outputs.
MegaBaud Selection
In normal operating mode (MBAUD = GND), the ICL3237E
transmitters guarantee a 250kbps data rate with worst-case
loads of 3kΩ in parallel with 1000pF. This provides
compatibility with PC-to-PC communication software, such
as Laplink™.
For higher speed serial communications, the ICL3237E
features MegaBaud operation. In MegaBaud operating mode
(MBAUD = V
), the ICL3237E transmitters guarantee a
CC
1Mbps data rate with worst-case loads of 3kΩ in parallel with
250pF for 3.0V < V
< 4.5V. For 5V ±10% operation, the
CC
ICL3237E transmitters guarantee a 1Mbps data rate with
worst-case loads of 3kΩ in parallel with 1000pF.
Capacitor Selection
The charge pumps require 0.1µF capacitors for 3.3V (5%
tolerance) operation. For other supply voltages refer to Table
3 for capacitor values. Do not use values smaller than those
listed in Table 3. Increasing the capacitor values (by a factor
of 2) reduces ripple on the transmitter outputs and slightly
reduces power consumption. C
increased without increasing C
increase C
without also increasing C2, C3, and C4 to
1
maintain the proper ratios (C
, C3, and C4 can be
2
’s value, however, do not
1
to the other capacitors).
1
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
TABLE 3. REQUIRED CAPACITOR VALUES
V
CC
(V)
3.0 to 3.6 (3.3V ±10%)0.220.22
3.15 to 3.6 (3.3V ±5%)0.10.1
4.5 to 5.50.0470.33
3.0 to 5.50.221.0
C
(µF)
1
C
2
, C3, C
(µF)
4
Po wer Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple V
capacitor of the same value as the charge-pump capacitor C
Connect the bypass capacitor as close as possible to the IC.
to ground with a
CC
1
.
7
Laplink® is a registered trademark of Traveling Software.
ICL3237E
www.BDTIC.com/Intersil
Operation Down to 2.7V
ICL3237E transmitter outputs meet RS-562 levels (±3.7V), at
the full data rate, with V
as low as 2.7V. RS-562 levels
CC
typically ensure inter operability with RS-232 devices.
Transmitter Outputs when Exiting
Powerdown
Figure 4 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
5V/DIV
2V/DIV
SHDN
T1
V
CC
0.1µF
+
C
1
+
C
2
V
CC
C1+
C1-
C2+
C2-
T
IN
R
OUT
EN
SHDN
+
V
CC
ICL3237E
V+
T
OUT
R
5k
MBAUD
V-
IN
FIGURE 5. TRANSMITTER LOOPBACK TEST CIRCUIT
5V/DIV.
MBAUD = GND
T1
IN
+
C
3
C
4
+
C
L
GND or V
CC
T2
VCC = +3.3V
C1 - C4 = 0.1µF
TIME (20µs/DIV.)
FIGURE 4. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
High Data Rates
The ICL3237E maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 5
details a transmitter loopback test circuit, and Figure 6
illustrates the standard speed loopback test result for a
single transmitter driving 1000pF and an RS-232 load at
250kbps. Figure 7 shows the MegaBaud loopback results for
a single transmitter driving 250pF and an RS-232 load at
1Mbps. The static transmitters were also loaded with an
RS-232 receiver.
T1
OUT
R1
OUT
VCC = +3.3V
C1 - C4 = 0.1µF
2µs/DIV.
FIGURE 6. LOOPBACK TEST AT 250kbps (C
5V/DIV.
R1
T1
T1
OUT
OUT
MBAUD = V
IN
VCC = +3.3V
C1 - C4 = 0.1µF
CC
0.5µs/DIV.
FIGURE 7. LOOPBACK TEST AT 1Mbps (C
= 1000pF)
L
= 250pF)
L
8
ICL3237E
www.BDTIC.com/Intersil
Interconnection with 3V and 5V Logic
The ICL3237E directly interfaces with 5V CMOS and TTL
logic families. Nev ertheless, with the ICL32XX at 3.3V, and
the logic supply at 5V, AC, HC, and CD4000 outputs can
drive ICL32XX inputs, but ICL32XX outputs do not reach the
minimum V
information.
TABLE 4. LOGIC FAMILY COMPATIBILITY WITH VARIOUS
SYSTEM
POWER-SUPPLY
VOLTAGE
for these logic families. See Table 4 for more
IH
SUPPLY VOLTAGES
V
CC
SUPPLY
VOLTAGE
(V)
3.33.3Compatible with all CMOS
55Compatible with all TTL and
53.3Compatible with ACT and HCT
(V)COMPATIBILITY
families.
CMOS logic families.
CMOS, and with TTL. ICL32XX
outputs are incompatible with AC,
HC, and CD4000 CMOS inputs.
±15kV ESD Protection
All pins on ICL32XX devices include ESD protection
structures, but the ICL32XXE family incorporates advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to ±15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These ne w ESD structures
protect the device whether or not it is powered up, protect
without allowing any latchup mechanism to activate, and
don’t interfere with RS-232 signals as large as ±25V.
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330Ω limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely
to suffer an ESD event are those that are exposed to the
outside world (the RS-232 pins in this case), and the IC is
tested in its typical application configuration (power applied)
rather than testing each pin-to-pin combination. The lower
current limiting resistor coupled with the larger charge
storage capacitor yields a test that is much more severe than
the HBM test. The extra ESD protection built into this
device’s RS-232 pins allows the design of equipment
meeting level 4 criteria without the need for additional board
level protection on the RS-232 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the
IC pin until the voltage arcs to it. The current waveform
delivered to the IC pin depends on approach speed,
humidity, temperature, etc., so it is difficult to obtain
repeatable results.The “E” device RS-232 pins withstand
±15kV air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing de vices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
9
ICL3237E
www.BDTIC.com/Intersil
Typical Performance Curves V
6
4
2
1 TRANSMITTER AT 250kbps
OTHER TRANSMITTERS AT 30kbps
0
MBAUD = GND
-2
-4
TRANSMITTER OUTPUT VOLTAGE (V)
-6
100020003000400050000
LOAD CAPACITANCE (pF)
= 3.3V, TA = 25oC
CC
V
+
OUT
V
-
OUT
FIGURE 8. LOW SPEED TRANSMITTER OUTPUT VOLTA GE
vs LOAD CAPACITANCE
25
20
+SLEW
15
MBAUD = GND
6
4
2
1 TRANSMITTER AT 1Mbps
OTHER TRANSMITTERS AT 30kbps
0
MBAUD = V
-2
-4
TRANSMITTER OUTPUT VOLTAGE (V)
-6
CC
100020003000400050000
LOAD CAPACITANCE (pF)
V
V
OUT
OUT
+
-
FIGURE 9. HIGH SPEED TRANSMITTER OUTPUT VOL TAGE
vs LOAD CAPACITANCE
90
MBAUD = V
70
50
+SLEW
CC
SLEW RATE (V/µs)
-SLEW
10
5
010002000300040005000
LOAD CAPACITANCE (pF)
-SLEW
30
SLEW RATE (V/µs)
10
0
-SLEW
010002000300040005000
LOAD CAPACITANCE (pF)
FIGURE 10. LOW SPEED SLEW RATE vs LOAD CAPACITANCEFIGURE 11. HIGH SPEED SLEW RATE vs LOAD
CAPACITANCE
SUPPLY CURRENT (mA)
90
80
70
60
50
40
30
20
0
MBAUD = V
1000
CC
250kbps
2000
LOAD CAPACITANCE (pF)
3000
1Mbps
120kbps
55
50
45
40
35
30
SUPPLY CURRENT (mA)
25
20
MBAUD = GND
0
1000
250kbps
2000
LOAD CAPACITANCE (pF)
3000
120kbps
20kbps
4000
5000
4000
5000
FIGURE 12. LOW SPEED SUPPLY CURRENT vs LOAD
FIGURE 13. HIGH SPEED SUPPLY CURRENT vs LO AD
CAPACITANCE WHEN TRANSMITTING DATA
10
CAPACITANCE WHEN TRANSMITTING DATA
ICL3237E
www.BDTIC.com/Intersil
Typical Performance Curves V
3.5
3.0
2.5
2.0
1.5
1.0
SUPPLY CURRENT (mA)
0.5
0
2.53.03.54.04.55.05.56.0
FIGURE 14. SUPPLY CURRENT vs SUPPLY VOLTAGE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
619
PROCES
Si Gate CMOS
= 3.3V, TA = 25oC (Continued)
CC
SUPPLY VOLTAGE (V)
NO LOAD
ALL OUTPUTS STATIC
11
ICL3237E
www.BDTIC.com/Intersil
Shrink Small Outline Plastic Packages (SSOP)
N
INDEX
AREA
123
-AD
e
B
0.25(0.010)C AMBS
NOTES:
8. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
9. Dimensioning and tolerancing per ANSI Y14.5M-1982.
10. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
11. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
12. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
13. “L” is the length of terminal for soldering to a substrate.
14. “N” is the number of terminal positions.
15. Terminal numbers are shown for reference only.
16. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of
“B” dimension at maximum material condition.
17. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
E
-B-
SEATING PLANE
A
-C-
M
0.25(0.010)BMM
H
α
µ
A1
0.10(0.004)
GAUGE
PLANE
0.25
0.010
A2
L
C
M28.209 (JEDEC MO-150-AH ISSUE B)
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
INCHESMILLIMETERS
SYMBOL
A-0.078-2.00A10.002-0.05-A20.0650.0721.651.85-
B0.0090.0140.220.389
C0.0040.0090.090.25-
D0.3900.4139.9010.503
E0.1970.2205.005.604
e0.026 BSC0.65 BSC-
H0.2920.3227.408.20-
L0.0220.0370.550.956
N28287
o
α
0
o
8
o
0
o
8
Rev. 1 3/95
NOTESMINMAXMINMAX
-
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted b y implica tion or ot herw ise un der any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
12
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