Datasheet ICL232CBE, ICL232CPE, ICL232lBE, ICL232lPE, ICL232MJE Datasheet (Intersil Corporation)
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June 2001
+5V Powered, Dual RS-232 Transmitter/Receiver
Features
• Meets All RS-232C and V.28 Specifications
• Requires Only Single +5V Power Supply
• Onboard Voltage Doubler/Inverter
• Low Power Consumption
•2Drivers
- ±9V Output Swing for +5V lnput
-300Ω Power-off Source Impedance
- Output Current Limiting
- TTL/CMOS Compatible
-30V/µs Maximum Slew Rate
• 2 Receivers
- ±30V Input Voltage Range
-3kΩ to 7kΩ Input I mpedance
- 0.5V Hysteresis to Improve Noise Rejection
• All Critical Parameters are Guaranteed Over the Entire
Commercial, Industrial and Military Temperature Ranges
Applications
• Any System Requiring RS-232 Communications Port
- Computer - Portable and Mainframe
- Peripheral - Printers and Terminals
- Portable Instrumentation
- Modems
• Dataloggers
Pinout
ICL232 (PDIP, CERDIP, SOIC)
TOP VIEW
C1+
1
V+
2
C1-
3
4
C2+
5
C2-
6
V-
T2
7
OUT
R2
8
IN
16
V
CC
15
GND
14
T1
OUT
13
R1
IN
R1
12
OUT
T1
11
IN
T2
10
IN
9
R2
OUT
Description
The ICL232 is a dual RS-232 transmitter/receiver interface
circuit that meets all ElA RS-232C and V.28 specifications. It
requires a single +5V power supply, and features two
onboard charge pump voltage converters which generate
+10V and -10V supplies from the 5V supply.
The drivers feature true TTL/CMOS input compatibility, slewrate-limited output, and 300Ω power-off source impedance.
The receiverscan handle up to +30V,andhavea3kΩ to 7kΩ
input impedance. The receivers also have hysteresis to
improve noise rejection.
Ordering Information
TEMP.
PART NUMBER
ICL232CPE 0 to 70 16 Ld PDIP E16.3
ICL232CBE 0 to 70 16 Ld SOIC M16.3
ICL232lPE -40 to 85 16 Ld PDIP E16.3
ICL232lBE -40 to 85 16 Ld SOIC M16.3
ICL232MJE -55 to 125 16 Ld CERDIP F16.3
RANGE (oC) PACKAGE
PKG.
NO.
Functional Diagram
+5V
+
R1
R2
1µF
1µF
T1
T2
OUT
OUT
1.0µF
1
C1+
+
3
VOLTAGE INVERTER
C1-
4
C2+
+
5
VOLTAGE INVERTER
C2-
+5V
400kΩ
11
IN
400kΩ
10
IN
16
V
CC
+5V TO 10V
+10V TO -10V
T1
T2+5V
R1
R2
5kΩ
5kΩ
V+
1µF
+
2
6
V-
1µF
+
14
T1
OUT
7
T2
OUT
1312
R1
IN
89
R2
IN
1-888-INTERSIL or 321-724-7143
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
| Intersiland Design is atrademarkof IntersilAmericasInc. | Copyright ©Intersil Americas Inc. 2001
1
15
File Number 3020.6
ICL232
Absolute M axi m um Ratings Thermal Information
VCCtoGround......................(GND-0.3V)<VCC<6V
V+toGround....................... (V
-0.3V)<V+<12V
CC
V-toGround.......................-12V<V-<(GND+0.3V)
Input Voltages
T1
,T2IN....................(V--0.3V)<VIN<(V++0.3V)
IN
R1
,R2IN......................................±30V
IN
OutputVoltages
T1
,T2
OUT
R1
,R2
OUT
Short Circuit Duration
T1
,T2
OUT
R1
,R2
OUT
............(V--0.3V)<V
OUT
.........(GND-0.3V)<V
OUT
..............................Continuous
OUT
..............................Continuous
OUT
RXOUT
TXOUT
<(VCC+0.3V)
<(V++0.3V)
Operating Conditions
Temperature Ranges
ICL232C...................................0
ICL232I..................................-40
ICL232M................................-55
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
is measured with the componentmountedon an evaluation PC board in free air.
1. θ
JA
o
Cto70oC
o
Cto85oC
o
Cto125oC
Thermal Resistance (Typical, Note 1) θ
CERDIPPackage................ 80 18
(oC/W) θJC(oC/W)
JA
PDIPPackage................... 100 N/A
SOICPackage................... 100 N/A
MaximumJunction Temperature
PlasticPackages.................................150
CeramicPackage................................175
MaximumStorageTemperatureRange..........-65
o
Cto150oC
MaximumLeadTemperature(Soldering10s).............300
o
o
o
C
C
C
Electrical Specifications Test Conditions : V
UnlessOtherwise Specified
PARAMETER TEST CONDITIONS M IN TYP MAX UNITS
Transmitter Output Voltage Swing, T
Power Supply Current,I
T
, InputLogic Low, V
IN
T
, InputLogic High, V
IN
LogicPullup Current, I
CC
lL
lH
P
RS-232 Input VoltageRange, V
ReceiverInput Impedance, R
ReceiverInput Low Threshold,V
ReceiverInput H igh Threshold, V
ReceiverInput Hysteresis,V
OUT
IN
IN
(H-L) VCC=5V,TA=25oC0.81.2-V
lN
(L-H) VCC=5V,TA=25oC-1.72.4V
IN
HYST
TTL/CMOS Receiver Output Voltage Low, V
TTL/CMOSReceiver Output Voltage High, V
Propagation Delay, t
PD
Instantaneous Slew Rate, S R C
Transition Region Slew Rate, SR
T
T1
to Ground
Outputs Unloaded, TA=25oC-510mA
T1IN,T2IN= 0V - 15 200 µA
VIN= ±3V 3.0 5.0 7.0 kΩ
OLIOUT
OHIOUT
RS-232 to TTL - 0.5 - µs
(Notes 2, 3)
RL=3kΩ,CL= 2500pF Measured
from +3V to -3V or -3V to +3V
=+5V ±10%, TA= Operating Temperature Range. Test Circuit as in Figure 8
CC
OUT
andT2
Loaded with 3kΩ
OUT
±5 ±9 ±10 V
--0.8V
2.0 - - V
-30-+30V
0.2 0.5 1.0 V
= 3.2mA - 0.1 0.4 V
= -1.0mA 3.5 4.6 - V
=10pF,RL=3kΩ,TA=25oC
L
--30V/µs
-3-V/µs
Output Resistance, R
OUT
RS-232 Output Short Circuit Current, I
NOTES:
2. Guaranteed by design.
3. See Figure 4 for definition.
SC
VCC=V+=V-=0V,V
T1
OUT
or T2
Shorted to GND - ±10 - mA
OUT
2
= ±2V 300 - - Ω
OUT
Test Circuits
ICL232
-
1µF
C3
+
1µF
C1
1µF
1µFC4
3kΩ
T2 OUTPUT
RS-232
±30V INPUT
C2
C1+
1
+
-
+
-
V+
2
C1-
3
C2+
4
C2-
5
-
+
V-
6
T2
7
OUT
8
R2
IN
T1
R1
R2
V
CC
GND
OUT
R1
OUT
T1
T2
OUT
IN
IN
IN
FIGURE 1. GENERAL TEST CIRCUIT FIGURE 2. POWER-OFF SOURCE RESISTANCE
Typical Performance Curves
550
500
TA=25oC
450
EXTERNAL SUPPLY LOAD
400
1kΩ BETWEEN V+ + GND
OR V- + GND
350
TRANSMITTER OUTPUT
OPEN CIRCUIT
300
250
V+, V- SUPPLY IMPEDANCES (Ω)
200
150
3456
V+ SUPPLY
INPUT SUPPLY VOLTAGE V
FIGURE 3. V+, V- OUTPUT IMPEDANCES vs V
GUARANTEED
OPERATING
RANGE
16
15
14
13
12
11
10
9
V- SUPPLY
CC
+4.5V TO
+5.5V INPUT
3kΩ
T1 OUTPUT
RS-232
±30V INPUT
TTL/CMOS
OUTPUT
TTL/CMOS
INPUT
TTL/CMOS
INPUT
TTL/CMOS
OUTPUT
(V)
CC
C1+
1
V+
2
C1-
3
C2+
4
C2-
5
6
VT2
7
R2
8
R
OUT=VIN
VIN= ±2V
OUT
IN
A
16
V
CC
15
GND
14
T1
OUT
13
R1
IN
12
R1
OUT
11
T1
IN
T2
10
IN
9
R2
OUT
T2
/I
OUT
T1
OUT
CONFIGURATION
10
9
8
7
6
5
OUTPUT VOLTAGE (|V|)
4
3
V- (VCC=4.5V)
TA=25oC
TRANSMITTER OUTPUTS
OPEN CIRCUIT
V+ (VCC=4.5V)
|I
|(mA)
LOAD
V+ (VCC=5V)
V- (VCC=5V)
9876543210
10
FIGURE 4. V+, V- OUTPUT VOLTAGES vs LOAD CURRENT
Pin Descriptions
PDIP, CERDI P SOIC PIN NAME DESCRIPTION
1 1 C1+ External capacitor “+” for internal voltage doubler.
2 2 V+ Internally generated +10V (typical) supply.
3 3 C1- External capacitor “-” for internal voltage doubler.
4 4 C2+ External capacitor “+” internal voltage inverter.
5 5 C2- External capacitor “-” internal voltage inverter.
6 6 V- Internallygenerated -10V (typical)supply.
77T2
88R2
OUT
IN
9 9 R2out Receiver 2 TTL/CMOS output.
10 10 T2
IN
RS-232Transmitter 2 output ±10V (typical).
RS-232 Receiver 2 input, with internal 5K pulldown resistor to GND.
Transmitter 2 TTL/CMOS input, with internal 400K pullup resistor to VCC.
3
ICL232
Pin Descriptions (Continued)
PDIP, CERDI P SOIC PIN NAME DESCRIPTION
11 11 T1
12 12 R1
13 13 R1
14 14 T1
15 15 GND SupplyGround.
16 16 V
IN
OUT
IN
OUT
CC
Transmitter 1 TTL/CMOS input, with internal 400K pullup resistor to VCC.
Receiver 1 TTL/CMOS output.
RS-232 Receiver 1 input, with internal 5K pulldown resistor to GND.
RS-232Transmitter 1 output ±10V (typical).
Positive Power Supply +5V ±10%
VOLTAGE DOUBLER
V
CC
GND
RC
OSCILLATOR
S1 S2
S3
C1
C1-
+
+
C1
-
S4
+
C3
-
V
CC
FIGURE 5. DUAL CHARGE PUMP
Detailed Description
The ICL232 is a dual RS-232 transmitter/receiver powered by
a single +5V power supply which meets all ElA RS232C specifications and features low power consumption. The functional
diagram illustrates the major elements of the ICL232. The circuit is divided into three sections: a voltage doubler/inverter,
dual transmitters, and dual receivers Voltage Converter.
An equivalent circuit of the dual charge pump is illustrated in
Figure 5.
The voltage quadrupler contains two charge pumps which use
two phases of an internally generated clock to generate +10V
and -10V. The nominal clock frequency is 16kHz. During
phase one of the clock, capacitor C1 is charged to V
During phase two, the voltage on C1 is added to V
producinga signalacrossC2 equal to twice V
time,C3isalsochargedto2V
, and then during phase one,
CC
.Atthesame
CC
it is inverted with respect to ground to produce a signal across
C4 equal to -2V
. The voltage converter accepts input
CC
voltages up to 5.5V.The output impedance of the doubler (V+)
is approximately 200Ω, and the output impedance of the
inverter (V-) is approximately 450Ω . Typical graphs are
presented which show the voltage converters output vs input
voltage and output voltages vs load characteristics. The test
circuit (Figure 3) uses 1µF capacitors for C1-C4, however, the
value is not critical. Increasing the values of C1 and C2 will
lower the output impedance of the voltage doubler and
inverter, and increasing the values of the reservoir capacitors,
C3 and C4, lowers the ripple on the V+ and V- supplies.
CC
CC
VOLTAGE INVERTER
V+=2V
GND
S5
CC
S7
T1IN,T2
IN
T1
,T2
OUT
OUT
Instantaneous
Slew Rate (SR)
FIGURE 6. SLEW RATE DEFINITION
C2
C2-
t
f
=
+
+
C2
-
90%
(0.8) (V
S6
S8
10%
OH-VOL
t
r
)
or
+
C4
-
t
r
(0.8) (V
GND
V- = -(V+)
OL-VOH
t
f
Transmitters
The transmitters are TTL/CMOS compatible inverters which
.
translate the inputs to RS-232 outputs.The input logicthresh-
,
old is about 26% of V
,or1.3VforVCC=5V.Alogic1at
CC
the input results in a voltage of between -5V and V- at the output, and a logic 0 results in a voltage between +5V and (V+
- 0.6V). Each transmitter input has an internal 400kΩ pullup
resistor so any unused input can be left unconnected and its
output remains in its low sta te. The output voltage swing
meets the RS-232C specification of ±5V minimum with the
worst case conditions of: both transmitters driving 3kΩ minimum load impedance, V
= 4.5V, and maximum allowable
CC
operating temperature. The transmitters have an internally
limited output slew rate which is less than 30V/µs. The outputs
are short circuit protected and can be shortedto ground indefinitely. The powered down output impedance is a minimum of
V
OH
V
OL
)
4
ICL232
300Ω with ±2V applied to the outputs and V
V+
V
CC
GND < T
T
XIN
XIN<VCC
V-
400kΩ
300Ω
CC
V- < V
=0V.
T
OUT
TOUT
<V+
FIGURE 7. TRANSM ITTER
Receivers
The receiver inputs accept up to ±30V while presenting the
required 3kΩ to 7kΩ input impedance even it the power is off
(V
= 0V). The receivers have a typical input threshold of
CC
1.3V which i s within the ±3V limits, known as the transition
region, of the RS-232 specification. The receiver output is
0V to V
. The output will be low whenever the input is
CC
greater than 2.4V and high whenever the input is floating or
driven between +0.8V and -30V. The receivers feature 0.5V
hysteresis to improve noise rejection.
V
CC
R
T1
R1
-30V < R
T1IN,T2
OR
R1
IN
,T2
OUT
OR
,R2
OUT
,R2
OUT
OUT
XIN
< +30V
XIN
GND
FIGURE 8. RECEIVER
IN
IN
t
PHL
5kΩ
t
PLH
GND < V
R
OUT
ROUT<VCC
V
OH
V
OL
connected to V+.
+5V
16
1
+
C1
1µF
3
INPUTS
OUTPUTS
TTL/CMOS
C2
1µF
-
+
-
TD
RTS
RD
CTS
ICL232
4
5
T1
11
R2
T2
R1
10
12
9
FIGURE 10. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS
HANDSHAKING
C3
-
1µF
+
5kΩ
2
6
-
C4
1µF
+
14
TD (2) TRANSMIT DATA
7
RTS (4) REQUEST TO SEND
13
RD (3) RECEIVEDATA
8
CTS (5) CLEAR TO SEND
SIGNAL GROUND (7)15
CTR (20) DATA
TERMINAL READY
5kΩ
DSRS (24) DATA
SIGNALING RATE
SELECT
RS-232
INPUTS AND OUTPUTS
In applications requiring four RS-232 inputs and outputs
(Figure 11), note that each circuit requires two charge pump
capacitors (C1 and C2) but can share common reservoir
capacitors (C3 and C4). The benefit of sharing common reservoir capacitors is the elimination of two capacitors and the
reduction of the charge pump source impedance which
effectively increases the output swing of the transmitters.
t
Average Propagation Delay =
PHL +tPLH
2
FIGURE 9. PROPAGATION DELAY DEFINITION
Applications
The ICL232 may be used for all RS-232 data terminal and
communication links. It is particularly useful in applications
where ±12V power supplies are not available for conventional RS-232 interface circuits. The applications presented
representtypical interface configurations.
A simple duplex RS-232 port with CTS/RTS handshaking is
illustrated in Figure 10. Fixed output signals such as DTR
(data terminal ready) and DSRS (data signaling rate select)
is generated by driving them through a 5kΩ resistor
5
INPUTS
OUTPUTS
TTL/CMOS
INPUTS
OUTPUTS
TTL/CMOS
C1
1µF
TD
RTS
RD
CTS
2µF
C1
1µF
DTR
DSRS
DCD
R1
R1
R1
4
+
C2
5
1µF
-
14
T2
T2
TD (2)TRANSMITDATA
7
RTS (4) REQUEST TO SEND
13
RD (3) RECEIVE DATA
8
CTS (5) CLEAR TO SEND
15
26
C3
+
-
µF
2
2
16
4
+
C2
5
1µF
-
DTR (20) DATA TERMINAL
14
READY
7
DSRS (24) DATASIGNALING
RATE SELECT
13
DCD (8) DATA CARRIER
DETECT
8
R1 (22) RING INDICATOR
+5V
RS-232
INPUTSAND
OUTPUTS
1
+
-
C4
+
+
-
ICL232
3
T1
11
10
12
R2
9
-
V- V+
6
ICL232
1
3
T1
11
10
12
R2
9
SIGNAL GROUND (7)15
FIGURE 11. COMBINING TWO ICL232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS
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