Datasheet HPLR3103 Datasheet (Fairchild Semiconductor)

D

G

S

DRAIN

(FLANGE)

GATE

SOURCE

HPLR3103, HPLU3103

Data Sheet December 2001

52A, 30V, 0.019 Ohm, N-Channel Logic Level, Power MOSFETs

These are N-Channel enhancement mode silicon gate power ﬁeld effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a speciﬁed level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits.

Ordering Information

PART NUMBER PACKAGE BRAND

HPLU3103 TO-251AA HP3103

HPLR3103 TO-252AA HP3103

NOTE: When ordering, use the entire part number. Add the sufﬁx T to obtain the TO-252AA variant in tape and reel, e.g., HPLR3103T.

Packaging

Features

• Logic Level Gate Drive

• 52A † , 30V

• Low On-Resistance, r

• UIS Rating Curve

• Related Literature

- TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”

†

Calculated continuous current based on maximum allowable junction

temperature. Package limited to 20A continuous, see Figure 9.

DS(ON)

= 0.019 Ω

Symbol

DRAIN

(FLANGE)

JEDEC TO-251AA JEDEC TO-252AA

SOURCE

DRAIN

GATE

±

µ

∆

/ ∆

≅

=

≅

HPLR3103, HPLU3103

Absolute Maximum Ratings

o

T

= 25

C, Unless Othewise Speciﬁed

C

HPLR3103, HPLU3103 UNITS

Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (R

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

= 20k Ω ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

GS

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Single Pulse Avalanche Energy (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Derate Above 25

o

C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

DSS

DGR

GS

D

DM

AS

D

, T

J

STG

L

pkg

30 V 30 V 16V V

52 390 240 mj

89

0.71

-55 to 150

300 260

W/

A A

W

o

C

o

C

o

C

o

C

NOTE:

= 25

J

o

1. T

Electrical Speciﬁcations

C to 125

o

C.

o

T

= 25

C, Unless Otherwise Speciﬁed

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV

Gate to Source Threshold Voltage V

GS(TH)

Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I

Breakdown Voltage Temperature Coefficient

Drain to Source On Resistance (Note 3)

Turn-On Delay Time t

V

(BR)DSS

r

DS(ON)

d(ON)

Rise Time t

Turn-Off Delay Time (Note 3) t

d(OFF)

Fall Time t

Total Gate Charge Q

Gate to Source Charge Q

Gate to Drain “Miller” Charge Q

Input Capacitance C

Output Capacitance C

Reverse Transfer Capacitance C

Internal Source Inductance L

Internal Drain Inductance L

DSS

GSS

OSS

RSS

I

DSS

= 250 µ A, V

D

V

= V

GS

DS

V

= 30V, V

DS

V

= 24V, V

DS

V

= ± 16V - - 100 nA

GS

Reference to 25

T

J

I

= 28A, V

D

I

= 23A, V

D

V

= 15V, I

DD

R

=3.4 Ω, I

r

f

g

gs

gd

ISS

GS

V

= 24V

DD

I

34A,

D

V

= 4.5V

GS

(Figure 6)

V

= 25V, V

DS

f = 1MHz (Figure 5)

Measured From the

S

Source Lead, 6mm (0.25in) From Package to Center of Die

Measured From the Drain-

D

Lead, 6mm (0.25in) From

= 0V 30 - - V

GS

, I

= 250 µ A1--V

D

= 0V - - 25

GS

= 0V, T

GS

o

C, I

= 1mA - 0.037 - V

D

= 10V - - 0.019 Ω

GS

= 4.5V - - 0.024 Ω

GS

34A, R

D

g(REF)

L

= 3mA

o

= 125

C

C - - 250

= 0.441 Ω , V

GS

4.5V,

-9 - ns

- 210 - ns

A

-20 - ns

-54 - ns

- - 50 nC

- - 14 nC

- - 28 nC

GS

= 0V,

- 1600 - pF

- 640 - pF

- 320 - pF

Modified MOSFET

- 7.5 - nH Symbol Showing the Internal Devices Inductances

D

L

D

- 4.5 - nH

Package to Center of Die

G

L

S

1

100

1000

0.1 1 10 100

20µs PULSE WIDTH T

C

= 150oC

V

DS

, DRAIN TO SOURCE VOLTAGE (V)

I

D

, DRAIN TO SOURCE CURRENT (A)

12V 10V

8.0V

6.0V

4.0V

3.0V

2.5V

15V

V

GS

IN DECENDING ORDER

10

HPLR3103, HPLU3103

θ

Electrical Speciﬁcations

T

o

= 25

C, Unless Otherwise Speciﬁed

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Thermal Resistance Junction to Case R

Thermal Resistance Junction to Ambient R

JC

JA

(PCB Mount Steady State) - - 50

Source to Drain Diode Speciﬁcations

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I

Pulsed Source to Drain Current (Note 2) I

Source to Drain Diode Voltage (Note 3) V

SD

SDM

SD

Reverse Recovery Time (Note 3) t

Reverse Recovered Charge (Note 3) Q

RR

NOTES:

2. Repetitive rating; pulse width limited by maximum junction temperature (See Figure 11).

3. Pulse width ≤ 300 µ s; duty cycle ≤ 2%.

4. V

= 15V, starting T

DD

o

= 25

C, L = 300 µ H, R

J

= 25 Ω , peak I

G

MOSFET Symbol Showing The Integral Reverse P-N Junction Diode

I

= 28A - - 1.3 V

SD

I

rr

= 34A, dI

SD

I

= 34A, dI

SD

= 34A, (Figure 10).

AS

/dt = 100A/ µ s - 81 120 ns

SD

/dt = 100A/ µ s - 210 310 nC

SD

- - 1.4

- - 110

D

- - 52 (Note 1)A

o

C/W

o

C/W

o

C/W

- - 220 A

G

S

Typical Performance Curves

1000

V

IN DECENDING ORDER

GS

15V 12V 10V

8.0V

100

6.0V

4.0V

3.0V

2.5V

10

, DRAIN TO SOURCE CURRENT (A)

D

I

1

0.1 1.0 10 100

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

FIGURE 1. OUTPUT CHARACTERISTICS FIGURE 2. OUTPUT CHARACTERISTICS

20µs PULSE WIDTH

= 25oC

T

C

VDS = 24V

0

4

8

12

16

20

0

10 20 30 40

Q

G

, TOTAL GATE CHARGE (nC)

V

GS

, GATE TO SOURCE VOLTAGE (V)

ID = 34A

VDS = 15V

1

10

100

1000

1 10 100

LIMITED BY r

DS(ON)

AREA MAY BE

OPERATION IN THIS

V

DSS

MAX = 30V

V

DS

, DRAIN TO SOURCE VOLTAGE (V)

I

D

, DRAIN CURRENT (A)

10ms

1ms

100µs

10µs

HPLR3103, HPLU3103

Typical Performance Curves (Continued)

1000

VDS = 15V

20µs PULSE WIDTH

100

TJ = 25oC

10

TJ = 150oC

2.5 PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

= 46A, VGS = 10V

I

D

2.0

1.5

1.0

ON RESISTANCE

0.5

, DRAIN TO SOURCE CURRENT(A)

D

I

1

24

3

V

, GATE TO SOURCE VOLTAGE (V)

GS

5

79

6

8

NORMALIZED DRAIN TO SOURCE

0

-80 -40 0 40 80 120 160 200

TJ, JUNCTION TEMPERATURE (oC)

FIGURE 3. TRANSFER CHARACTERISTICS FIGURE 4. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

3200

V

= 0V, f = 1MHz

GS

= CGS + C

C

2800

2400

2000

1600

C C

ISS RSS OSS

= C ≈ CDS + C

GD

GS

C

ISS

1200

C

800

C, CAPACITANCE (pF)

400

0

1

C

10 100

VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 5. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 6. GATE CHARGE WAVEFORMS FOR CONSTANT

1000

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX

= 46A, VGS = 10V

I

D

100

TJ = 175oC

TJ = 25oC

, REVERSE DRAIN CURRENT(A)

SD

I

10

0.4 1.2 2.0 2.8

FIGURE 7. SOURCE TO DRAIN DIODE FORWARD VOLTAGE FIGURE 8. FORWARD BIAS SAFE OPERATING AREA

0.8

, SOURCE TO DRAIN VOLTAGE (V)

V

SD

1.6

OSS

RSS

GATE CURRENT

2.4

V

DD

V

DS

BV

DSS

t

P

I

AS

t

AV

0

HPLR3103, HPLU3103

Typical Performance Curves (Continued)

60

45

30

, DRAIN CURRENT (A)

15

D

I

0

25 50

75

100 125 150

TC, CASE TEMPERATURE (oC)

FIGURE 9. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

2

DUTY CYCLE - DESCENDING ORDER

0.5

1

0.2

0.1

0.05

0.02

0.01

0.1

, NORMALIZED

JC

θ

Z

THERMAL IMPEDANCE

0.01

-5

10

SINGLE PULSE

-4

10

-3

10

t, RECTANGULAR PULSE DURATION (s)

1000

If R = 0 tAV = (L)(IAS)/(1.3*RATED IASV

If R ≠ 0 t

= (L/R)ln[(IAS*R)/(1.3*RATED BV

AV

100

DSS

E

AS

- VDD)

DSS

POINT

STARTING TJ = 25oC

10

, AVALANCHE CURRENT (A)

AS

I

1

0.001

STARTING TJ = 150oC

0.01

0.1

1 10 100

tAV, TIME IN AVALANCHE (ms)

FIGURE 10. UNCLAMPED INDUCTIVE SWITCHING

CAPABILITY

P

DM

NOTES: DUTY FACTOR: D = t PEAK TJ = PDM x Z

-2

10

-1

10

1/t2

x R

JC

θ

0

10

- VDD) +1]

t

1

t

2

+ T

JC

C

θ

1

10

FIGURE 11. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

Test Circuits and Waveforms

V

DS

L

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

AS

R

G

DUT

I

AS

0.01Ω

0V

t

P

FIGURE 12. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 13. UNCLAMPED ENERGY WAVEFORMS

+

V

DD

-

Q

g(TOT)

Q

gd

Q

gs

V

DS

0

V

GS

V

DD

I

G(REF)

0

t

ON

t

d(ON)

t

r

90%

10%

V

DS

90%

10%

t

f

t

d(OFF)

t

OFF

90%

50%

10%

PULSE WIDTH

V

GS

0

HPLR3103, HPLU3103

Test Circuits and Waveforms (Continued)

V

DS

R

L

V

GS

DUT

I

G(REF)

FIGURE 14. GATE CHARGE TEST CIRCUIT FIGURE 15. GATE CHARGE WAVEFORMS

V

DS

+

V

-

DD

R

L

V

GS

+

V

DD

-

DUT

R

GS

V

GS

FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOS EnSigna

TM

FACT™ FACT Quiet Series™

STAR*POWER is used under license

FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™



OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench



QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER

SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™



UltraFET

VCX™



DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

PRODUCT STATUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Formative or In Design

First Production

Full Production

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. H4

Datasheet HPLR3103 Datasheet (Fairchild Semiconductor)

Specifications and Main Features

Frequently Asked Questions

User Manual