Page 1
HM628511HI Series
4M High Speed SRAM (512-kword × 8-bit)
ADE-203-1035A (Z)
Rev. 1.0
Apr. 15, 1999
Description
The HM628511HI Series is a 4-Mbit high speed static RAM organized 512-k word × 8-bit. It has realized
high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell)and high
speed circuit designing technology. It is most appropriate for the application which requires high speed, high
density memory and wide bit width configuration, such as cache and buffer memory in system. It is packaged
in 400-mil 36-pin plastic SOJ.
Features
• Single 5.0 V supply : 5.0 V ± 10 %
• Access time 12 /15 ns (max)
• Completely static memory
No clock or timing strobe required
• Equal access and cycle times
• Directly TTL compatible
All inputs and outputs
• Operating current : 160 / 140 mA (max)
• TTL standby current : 60 / 50 mA (max)
• CMOS standby current : 5 mA (max)
• Center VCC and VSS type pinout
• Temperature range: –40 to 85°C
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HM628511HI Series
Ordering Information
Type No. Access time Package
HM628511HJPI-12
HM628511HJPI-15
Pin Arrangement
12 ns
15 ns
400-mil 36-pin plastic SOJ (CP-36D)
HM628511HJPI Series
A0
A1
A2
A3
A4
CS
I/O1
I/O2
V
CC
V
SS
I/O3
I/O4
WE
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
(Top View)
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A18
A17
A16
A15
OE
I/O8
I/O7
V
SS
V
CC
I/O6
I/O5
A14
A13
A12
A11
A10
NC
2
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Pin Description
Pin name Function
A0 to A18 Address input
I/O1 to I/O8 Data input/output
CS Chip select
OE Output enable
WE Write enable
V
CC
V
SS
Power supply
Ground
NC No connection
Block Diagram
HM628511HI Series
(LSB)
A1
A17
A7
A11
A16
A2
A6
A5
(MSB)
I/O1
.
.
.
I/O8
WE
CS
OE
Row
decoder
CS
Input
data
control
(LSB)
Memory matrix
256 rows × 8 columns ×
256 blocks × 8 bit
(4,194,304 bits)
Column I/O
Column decoder
A10 A8 A9 A12 A13 A14 A0 A18 A15 A3 A4
(MSB)
CS
Internal
voltage
generater
V
CC
V
SS
CS
3
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HM628511HI Series
Operation Table
CS OE WE Mode VCC current I/O Ref. cycle
H ××Standby I
L H H Output disable I
L L H Read I
L H L Write I
L L L Write I
, I
SB
SB1
CC
CC
CC
CC
Note: ×: H or L
Absolute Maximum Ratings
Parameter Symbol Value Unit
Supply voltage relative to V
Voltage on any pin relative to V
SS
SS
Power dissipation P
Operating temperature Topr –40 to +85 °C
Storage temperature Tstg –55 to +125 °C
Storage temperature under bias Tbias –40 to +85 °C
Notes: 1. VT (min) = –2.0 V for pulse width (under shoot) ≤ 8 ns
2. V
(max) = VCC+2.0 V for pulse width (over shoot) ≤ 8 ns
T
V
CC
V
T
T
High-Z —
High-Z —
Dout Read cycle (1) to (3)
Din Write cycle (1)
Din Write cycle (2)
–0.5 to +7.0 V
–0.5*1 to VCC+0.5*
2
V
1.0 W
Recommended DC Operating Conditions (Ta = –40 to +85°C)
Parameter Symbol Min Typ Max Unit
3
Supply voltage V
Input voltage V
CC
VSS*
IH
V
IL
*
4
Notes: 1. VIL (min) = –2.0 V for pulse width (under shoot) ≤ 8 ns
2. V
(max) = VCC+2.0 V for pulse width (over shoot) ≤ 8 ns
IH
3. The supply voltage with all V
4. The supply voltage with all V
4
4.5 5.0 5.5 V
000V
2.2 — VCC + 0.5*
1
–0.5*
pins must be on the same level.
CC
pins must be on the same level.
SS
— 0.8 V
2
V
Page 5
HM628511HI Series
DC Characteristics (Ta = –40 to +85°C, VCC = 5.0 V ± 10 %, VSS = 0V)
Parameter Symbol Min Typ*
Input leakage current II
I——2 µA Vin = VSS to V
LI
1
Max Unit Test conditions
Output leakage current IILOI——2 µA Vin = VSS to V
Operation power
supply current
12 ns cycle I
CC
— — 160 mA Min cycle
CS = V
IL
, lout = 0 mA
Other inputs = V
Standby power supply
current
15 ns cycle I
12 ns cycle I
15 ns cycle I
CC
SB
SB
I
SB1
— — 140
— — 60 mA Min cycle, CS = VIH,
Other inputs = V
——50
— 0.1 5 mA f = 0 MHz
V
≥ CS ≥ VCC - 0.2 V,
CC
(1) 0 V ≤ Vin ≤ 0.2 V or
(2) V
≥ Vin ≥ VCC - 0.2 V
CC
Output voltage V
OL
V
OH
— — 0.4 V IOL = 8 mA
2.4 — — V IOH = –4 mA
Notes: 1. Typical values are at VCC = 5.0 V, Ta = +25°C and not guaranteed.
Capacitance (Ta = +25°C, f = 1.0 MHz)
CC
CC
IH/VIL
IH/VIL
Parameter Symbol Min Typ Max Unit Test conditions
Input capacitance*
1
Input/output capacitance*
Cin — — 6 pF Vin = 0 V
1
C
I/O
——8 pFV
= 0 V
I/O
Note: 1. This parameter is sampled and not 100% tested.
5
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HM628511HI Series
AC Characteristics (Ta = –40 to +85°C, VCC = 5.0 V ± 10 %, unless otherwise noted.)
Test Conditions
• Input pulse levels: 3.0 V/0.0 V
• Input rise and fall time: 3 ns
• Input and output timing reference levels: 1.5 V
• Output load: See figures (Including scope and jig)
5 V
1.5 V
480Ω
Dout
RL=50 Ω
Dout
Zo=50 Ω
255Ω
5 pF
Output load (A)
(for t
CLZ
Output load (B)
, t
, t
OLZ
CHZ
, t
, t
WHZ
, and tOW)
OHZ
Read Cycle
HM628511HI
-12 -15
Parameter Symbol Min Max Min Max Unit Notes
Read cycle time t
Address access time t
Chip select access time t
Output enable to outpput valid t
Output hold from address change t
Chip select to output in low-Z t
Output enable to output in low-Z t
Chip deselect to output in high-Z t
Output disable to output in high-Z t
RC
AA
ACS
OE
OH
CLZ
OLZ
CHZ
OHZ
12 — 15 — ns
— 12 — 15 ns
— 12 — 15 ns
—6 —7 ns
3—3—ns
3 — 3 — ns 1
0 — 0 — ns 1
— 6 — 7 ns 1
— 6 — 7 ns 1
6
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HM628511HI Series
Write Cycle
HM628511HI
-12 -15
Parameter Symbol Min Max Min Max Unit Notes
Write cycle time t
Address valid to end of write t
Chip select to end of write t
Write pulse width t
Address setup time t
Write recovery time t
Data to write time overlap t
Data hold from write time t
Write disable to output in low-Z t
Output disable to output in high-Z t
Write enable to output in high-Z t
WC
AW
CW
WP
AS
WR
DW
DH
OW
OHZ
WHZ
Note: 1. Transition is measured ±200 mV from steady voltage with Load (B). This parameter is sampled
and not 100% tested.
2. Address should be valid prior to or coincident with CS transition low.
3. WE and/or CS must be high during address transition time.
4. if CS and OE are low during this period, I/O pins are in the output state. Then, the data input
signals of opposite phase to the outputs must not be applied to them.
5. If the CS low transition occurs simultaneously with the WE low transition or after the WE transition,
output remains a high impedance state.
6. t
is measured from the latest address transition to the later of CS or WE going low.
AS
7. t
is measured from the earlier of CS or WE going high to the first address transition.
WR
8. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition
among CS going low and WE going low. A write ends at the earliest transition among CS going
high and WE going high. t
9. t
is measured from the later of CS going low to the the end of write.
CW
is measured from the beginnig of write to the end of write.
WP
12 — 15 — ns
8 — 10 — ns
8—10—ns9
8—10—ns8
0 — 0 — ns 6
0 — 0 — ns 7
6—7—ns
0—0—ns
3 — 3 — ns 1
— 6 — 7 ns 1
— 6 — 7 ns 1
7
Page 8
HM628511HI Series
Timing Waveforms
Read Timing Waveform (1) (WE = VIH)
t
RC
Address
Valid address
t
AA
t
ACS
CS
t
OE
OE
t
OLZ
t
CLZ
Dout
High Impedance
Read Timing Waveform (2) (WE = VIH, CS = VIL, OE = VIL)
t
RC
Address
t
OH
Valid address
t
AA
t
CHZ
t
OHZ
Valid data
t
OH
t
OH
Dout
Valid data
8
Page 9
HM628511HI Series
Read Timing Waveform (3) (WE = VIH, CS = VIL, OE = VIL)*
t
RC
CS
t
ACS
Dout
t
CLZ
High
Impedance
Write Timing Waveform (1) (WE Controlled)
t
WC
Address
OE
Valid address
t
AW
2
Valid data
t
WR
t
CHZ
High
Impedance
CS*
WE*
Dout
Din
t
CW
3
t
AS
3
t
OHZ
*
t
WP
High impedance*
4
5
t
DW
Valid data
t
DH
4
*
9
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HM628511HI Series
Write Timing Waveform (2) (CS Controlled)
t
WC
Address
3
CS *
3
WE *
Dout
Din
Valid address
t
CW
t
AW
t
WP
t
AS
t
WHZ
High impedance*
t
DW
4
*
Valid data
t
t
WR
t
DH
OW
5
4
*
10
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Package Dimensions
HM628511HJPI Series (CP-36D)
23.25
23.62 Max
36
1
0.74
19
18
10.16 ± 0.13
HM628511HI Series
Unit: mm
11.18 ± 0.13
1.30 Max
0.43 ± 0.10
0.41 ± 0.08
Dimension including the plating thickness
Base material dimension
0.10
1.27
3.50 ± 0.26
+0.25
–0.17
0.80
Hitachi Code
JEDEC
EIAJ
Weight
9.40 ± 0.25
(reference value)
2.85 ± 0.12
CP-36D
Conforms
Conforms
1.4 g
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HM628511HI Series
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual
property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of
bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic,
safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for
maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and
other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the
guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or
failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the
equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage
due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL NorthAmerica : http:semiconductor.hitachi.com/
For further information write to:
Hitachi Semiconductor
(America) Inc.
179 East Tasman Drive,
San Jose,CA 95134
Tel: <1> (408) 433-1990
Fax: <1>(408) 433-0223
Europe : http://www.hitachi-eu.com/hel/ecg
Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm
Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm
Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm
Japan : http://www.hitachi.co.jp/Sicd/indx.htm
Hitachi Europe GmbH
Electronic components Group
Dornacher Straße 3
D-85622 Feldkirchen, Munich
Germany
Tel: <49> (89) 9 9180-0
Fax: <49> (89) 9 29 30 00
Hitachi Europe Ltd.
Electronic Components Group.
Whitebrook Park
Lower Cookham Road
Maidenhead
Berkshire SL6 8YA, United Kingdom
Tel: <44> (1628) 585000
Fax: <44> (1628) 778322
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Hitachi Tower
Singapore 049318
Tel: 535-2100
Fax: 535-1533
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Taipei Branch Office
3F, Hung Kuo Building. No.167,
Tun-Hwa North Road, Taipei (105)
Tel: <886> (2) 2718-3666
Fax: <886> (2) 2718-8180
12
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Group III (Electronic Components)
7/F., North Tower, World Finance Centre,
Harbour City, Canton Road, Tsim Sha Tsui,
Kowloon, Hong Kong
Tel: <852> (2) 735 9218
Fax: <852> (2) 730 0281
Telex: 40815 HITEC HX
Copyright © Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
Page 13
HM628511HI Series
Revision Record
Rev. Date Contents of Modification Drawn by Approved by
1.0 Apr. 15, 1999 Initial issue
13
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