The HIN230-HIN241 family of RS-232 transmitters/receivers
interfacecircuits meet all ElA RS-232E and V.28specifications,
and are particularly suited forthose applications where ±12V is
not available . The y require a single +5V po wer supply (except
HIN231 and HIN239) and feature onboard charge pump
voltage converters which generate +10V and -10V supplies
from the 5V supply. The HIN233 and HIN235 require no
externalcapacitors and are ideally suited for applications where
circuit board space is critical. The family of devices offer a wide
variety of RS-232 transmitter/receiver combinations to
accommodate various applications (see Selection Table).
The drivers feature true TTL/CMOS input compatibility, slewrate-limited output, and 300Ω power-off source impedance.
The receivers can handle up to ±30V, and have a 3kΩ to 7kΩ
input impedance. The receivers also feature hysteresis to
greatly improve noise rejection.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Page 2
Ordering Information
HIN230 thru HIN241
PART
NUMBER
HIN230CB0 to 7020 Ld SOICM20.3
HIN230IB-40 to 8520 Ld SOICM20.3
HIN231CB0 to 7016 Ld SOICM16.3
HIN231CP0 to 7014 Ld PDIPE14.3
HIN231IB-40 to 8516 Ld SOICM16.3
HIN231IP-40 to 8514 Ld PDIPE14.3
HIN232CP0 to 7016 Ld PDIPE16.3
HIN232CB0 to 7016 Ld SOICM16.3
HIN232IP-40 to 8516 Ld PDIPE16.3
HIN232IB-40 to 8516 Ld SOICM16.3
HIN233CP0 to 7020 Ld PDIPE20.3
HIN234CB0 to 7016 Ld SOICM16.3
HIN234IB-40 to 8516 Ld SOICM16.3
HIN235CP0 to 7024 Ld PDIPE24.6
HIN236CP0 to 7024 Ld PDIPE24.3
HIN236CB0 to 7024 Ld SOICM24.3
HIN236IP-40 to 8524 Ld PDIPE24.3
HIN236IB-40 to 8524 Ld SOICM24.3
TEMP.
RANGE (oC)PACKAGEPKG. NO.
PART
NUMBER
HIN237CP0 to 7024 Ld PDIPE24.3
HIN237CB0 to 7024 Ld SOICM24.3
HIN237IP-40 to 8524 Ld PDIPE24.3
HIN237IB-40 to 8524 Ld SOICM24.3
HIN238CP0 to 7024 Ld PDIPE24.3
HIN238CB0 to 7024 Ld SOICM24.3
HIN238IP-40 to 8524 Ld PDIPE24.3
HIN238IB-40 to 8524 Ld SOICM24.3
HIN239CB0 to 7024 Ld SOICM24.3
HIN239CP0 to 7024 Ld PDIPE24.3
HIN239IB-40 to 8524 Ld SOICM24.3
HIN240CN0 to 7044 Ld MQFPQ44.10X10
HIN240IN-40 to 8544 Ld MQFPQ44.10X10
HIN241CB0 to 7028 Ld SOICM28.3
HIN241IB-40 to 8528 Ld SOICM28.3
HIN241CA0 to 7028 Ld SSOPM28.209
HIN241IA-40 to 8528 Ld SSOPM28.209
NOTE: Manyof the surface mountdevicesare availableon tape and
reel; add -T to suffix.
TEMP.
RANGE (oC)PACKAGEPKG. NO.
Pin Descriptions
PINFUNCTION
V
CC
V+Internally generated positive supply (+10V nominal), HIN231 and HIN239 require +7.5V to +13.2V.
C1+External capacitor (+ terminal) is connected to this lead.
C1-External capacitor (- terminal) is connected to this lead.
C2+External capacitor (+ terminal) is connected to this lead.
C2-External capacitor (- terminal) is connected to this lead.
T
IN
T
OUT
R
IN
R
OUT
ENEnable input. This is an active low input which enables the receiver outputs. With EN = 5V,the outputs are placed in a high
SHUTDOWNShutdown Input. With SHUTDOWN = 5V, the charge pump is disabled, the receiver outputs are in a high impedance state
NCNo Connect. No connections are made to these leads.
Power Supply Input 5V±10%.
Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400kΩ pull-up resistor to VCCis connected to each lead.
Transmitter Outputs. These are RS-232 levels (nominally ±10V).
ReceiverInputs. These inputs acceptRS-232 input levels.An internal 5kΩpull-down resistor to GNDis connected to each input.
Receiver Outputs. These are TTL/CMOS levels.
impedance state.
and the transmitters are shut off.
3-2
Page 3
Pinouts
HIN230 (SOIC)
TOP VIEW
HIN230 thru HIN241
HIN231 (SOIC)
TOP VIEW
1
T3
OUT
2
T1
OUT
3
T2
OUT
4
T2
IN
5
T1
IN
6
GND
7
V
CC
8
C1+
9
V+
10
C1-
+5V
8
C1+
+
1µF
10
C1-
11
C2+
+
1µF
12
C2-
+5V
400kΩ
T1
T2
T3
T4
T5
5
IN
+5V
400kΩ
4
IN
+5V
400kΩ
141
IN
+5V
400kΩ
1520
IN
+5V
IN
400kΩ
V
CC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1
T2
T3
T4
T5
20
T4
OUT
19
T5
IN
18
NC
17
SHUTDOWN
16
T5
OUT
15
T4
IN
14
T3
IN
13
V-
12
C2-
11
C2+
R2
T2
OUT
R2
OUT
T2
C+
NC
1
2
C-
3
V-
4
5
IN
6
7
IN
8
16
V+
(14)
V
CC
GND
T1
R1
R1
T1
NC
OUT
IN
OUT
IN
(13)
(12)
(11)
(10)
(9)
(8)
15
14
13
12
11
10
9
NOTE: Pin numbers in parentheses are for PDIP Package.
+5V
7
V+
V-
1µF
+
9
1
C+
+
13
1µF
1µF
+
2
3
T1
T2
T3
T4
OUT
OUT
OUT
OUT
R1
R2
T1
T2
OUT
OUT
2
10
IN
7
IN
VOLTAGE INVERTER
C-
+5V
400kΩ
+5V
400kΩ
15
V
CC
+12V TO -12V
T1
T2
R1
R2
1619
17
T5
OUT
SHUTDOWN
14
6
+7.5V TO +13.2V
V+
V-
5kΩ
5kΩ
16
3
1µF
+
13
4
1211
56
T1
T2
R1
R2
OUT
OUT
IN
IN
NOTE: SOIC pin numbers shown.
3-3
Page 4
Pinouts (Continued)
HIN232 (PDIP, SOIC)
TOP VIEW
HIN230 thru HIN241
HIN233 (PDIP, SOIC)
TOP VIEW
R1
R2
1µF
1µF
T1
T2
OUT
OUT
T2
C1+
C2+
OUT
R2
V+
C1-
C2-
V-
1
1
2
3
4
5
6
7
8
IN
16
V
CC
15
GND
14
T1
OUT
13
R1
IN
12
R1
OUT
11
T1
IN
10
T2
IN
9
R2
OUT
T2
T1
R1
OUT
R1
T1
OUT
GND
V
CC
(V+) C1+
GND
(V-) C2-
IN
2
IN
3
4
IN
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
R2
OUT
R2
IN
T2
OUT
VC2C2+
V+ (C1-)
C1- (C1+)
V- (C2+)
C2+ (C2-)
NOTE: Pin names in parentheses are for SOIC Package.
+5V
+
1µF
1
C1+
+
3
4
+
5
11
IN
10
IN
VOLTAGE DOUBLER
C1C2+
VOLTAGE INVERTER
C2-
+5V
400kΩ
+5V
400kΩ
16
V
CC
+5V TO 10V
+10V TO -10V
T1
T2
R1
R2
5kΩ
5kΩ
V+
1µF
+
2
T1
IN
+5V
2
400kΩ
+5V
IN
20
8 (13)
13 (14)
12 (10)
17
14 (8)
1
3
C1+
C1VVV+
6
V-
1µF
+
14
7
1312
89
T1
T2
R1
R2
OUT
OUT
IN
IN
T2
R1
OUT
R2
OUT
NO
CONNECT
INTERNAL
-10V
SUPPLY
INTERNAL
+10V
SUPPLY
400kΩ
GND
6
R1
R2
+5V
V
CC
+
6
T1
T2
0.1µF
5
18
4
T1
T2
R1
OUT
OUT
IN
5kΩ
5kΩ
C2+
C2+
C2-
C2-
19
11 (12)
15
16
10 (11)
R2
IN
GND
9
3-4
15
NOTE: Pin numbers in parentheses are for SOIC Package.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Propagation Delay, t
Instantaneous Slew Rate SRCL = 10pF, RL = 3kΩ, TA = 25oC
Transition Region Slew Rate, SR
TRANSMITTER OUTPUTS
Output Voltage Swing, T
Output Resistance, R
RS-232 Output Short Circuit Current, I
NOTE:
2. Guaranteed by design.
PD
T
OUT
OUT
SC
= +5V ±10%, TA = Operating Temperature Range (Continued)
CC
RS-232 to TTL-0.5-µs
(Note 2)
RL = 3kΩ, CL = 2500pF Measured
from +3V to -3V or -3V to +3V, 1
Transmitter Switching
Transmitter Outputs, 3kΩ toGround±5±9±10V
VCC = V+ = V- = 0V, V
T
shorted to GND-±10-mA
OUT
= ±2V300--Ω
OUT
--30V/µs
-3-V/µs
3-10
Page 11
HIN230 thru HIN241
VOLTAGE DOUBLER
V
CC
GND
RC
OSCILLATOR
S1
S3
C1
C1-
+
S2
+
C1
-
S4
+
C3
V
CC
FIGURE 1. CHARGE PUMP
Detailed Description
The HIN230 thru HIN241 family of RS-232
transmitters/receivers are powered b y a single +5V po wer
supply (except HIN231 and HIN239), feature lo w pow er
consumption, and meet all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, transmitter, and receiver .
Charge Pump
An equivalent circuit of the charge pump is illustratedin Figure
1. The charge pump contains two sections: the voltage
doubler and the voltage inverter. Each section is driven by a
two phase, internally generated clock to generate +10V and 10V. The nominalclockfrequencyis16kHz.During phase one
of the clock, capacitor C1 is charged to V
two, the v oltage on C1 is added to V
across C3 equal to twice V
charged to 2V
, and then during phase two, it is inv erted
CC
CC
CC
. During phase one, C2 is also
with respect to ground to produce a signal across C4 equal to
-2V
. The charge pump accepts input voltages up to 5.5V.
CC
The output impedance of the voltage doubler section (V+) is
approximately200Ω, and the output impedance of the voltage
inverter section (V-) is approximately 450Ω. A typical
application uses 1µF capacitors for C1-C4, however, the value
is not critical. Increasing the valuesof C1 and C2 will lower the
output impedance of the voltage doubler and inverter,
increasing the values of the reservoir capacitors, C3 and C4,
lowers the ripple on the V+ and V- supplies.
During shutdown mode (HIN230, 235, 236, 240 and 241),
SHUTDOWN control line set to logic “1”, the charge pump is
turned off, V+ is pulled down to V
CC
and the supply current is reduced to less than 10µA. The
transmitter outputs are disabled and the receiver outputs are
placed in the high impedance state.
Transmitters
The transmitters are TTL/CMOS compatible inv erters which
translate the inputs to RS-232 outputs. The input logic
threshold is about 26% of V
at the input results in a voltage of between -5V and V- at the
output, and a logic 0 results in a voltage between +5V and (V+ -
0.6V). Each transmitter input has an internal 400kΩ pullup
, or 1.3V for VCC = 5V. A logic 1
CC
. During phase
CC
, producing a signal
, V- is pulled up to GND,
VOLTAGE INVERTER
V+ = 2V
GND
CC
S5
S7
C2
C2
+
S6
+
C2
-
-
S8
+
C4
-
resistor so any unused input can be left unconnected and its
output remains in its low state. The output voltage swing meets
the RS-232C specifications of ±5V minimum with the worst
case conditions of: all transmitters driving 3kΩ minimum load
impedance, V
= 4.5V, and maximum allowable operating
CC
temperature. The transmitters hav e an internally limited output
slew rate which is less than 30V/µs. The outputs are short
circuit protected and can be shorted to ground indefinitely. The
powered down output impedance is a minimum of 300Ω with
±2V applied to the outputs and V
V+
V
GND < T
CC
T
XIN
XIN
V-
400kΩ
< V
CC
FIGURE 2. TRANSMITTER
CC
= 0V.
300Ω
V- < V
T
TOUT
Receivers
The receiver inputs accept up to ±30V while presenting the
required 3kΩ to 7kΩ input impedance evenif the power is off
(V
= 0V). The receivers have a typical input threshold of
CC
1.3V which is within the ±3V limits, known as the transition
region, of the RS-232 specifications. The receiver output is
0V to V
greater than 2.4V and high whenever the input is floating or
driven between +0.8V and -30V. The receivers feature 0.5V
hysteresis to improve noise rejection. The receiver Enable
line
241) disables the receiver outputs, placing them in the high
impedance mode. The receiver outputs are also placed in
the high impedance state when in shutdown mode.
. The output will be low whenever the input is
CC
EN, when set to logic “1”, (HIN235, 236, 239, 240, and
V
CC
R
-30V < R
XIN
< +30V
XIN
GND
FIGURE 3. RECEIVER
5kΩ
GND < V
R
OUT
ROUT
GND
V- = -(V+)
OUT
< V+
< V
CC
3-11
Page 12
Typical Performance Curves
12
10
8
6
4
V- SUPPLY VOLTAGE
2
HIN230 thru HIN241
T
IN
OR
R
IN
T
OUT
OR
R
OUT
t
PHL
Average Propagation Delay =
FIGURE 4. PROPAGATION DELAY DEFINITION
1µF
0.47µF
0.10µF
t
PLH
t
PHL +tPLH
2
SUPPLY VOLTAGE (|V|)
12
10
8
6
V- (VCC = 4.5V)
4
2
V
OL
V
OL
TA = 25oC
TRANSMITTER OUTPUTS
OPEN CIRCUIT
V+ (VCC = 5V)
V+ (VCC = 4.5V)
V- (VCC = 5V)
0
3.0
3.5
4.04.56.0
V
CC
5.05.5
FIGURE 5. V- SUPPLY VOLTAGE vs VCC, VARYING
CAPACITORS
Test Circuits (HIN232)
-
1µF
C3
1µF
C1
1µF
C2
3kΩ
T2
OUTPUT
RS-232
±30V INPUT
+
C1+
1
+
-
+
-
+
1µF C4
V+
2
C1-
3
C2+
4
C2-
5
-
V-
6
T2
7
8
R2
FIGURE 7. GENERAL TEST CIRCUITFIGURE 8. POWER-OFFSOURCE RESISTANCE
OUT
IN
R1
R2
T1
V
CC
GND
OUT
R1
OUT
T1
T2
OUT
16
15
14
RS-232 ±30V INPUT
13
IN
TTL/CMOS OUTPUT
12
TTL/CMOS INPUT
11
IN
TTL/CMOS INPUT
10
IN
TTL/CMOS OUTPUT
9
+4.5V TO
+5.5V INPUT
3kΩ
T1 OUTPUT
0
0
|I
LOAD
| (mA)
30252015105
FIGURE 6. V+, V- OUTPUT VOLTAGE vs LOAD (HIN232)
C1+
1
V+
2
C1-
3
C2+
4
C2-
5
6
VT2
7
R2
8
R
OUT
VIN = ±2V
OUT
IN
= VIN/1
R1
R2
T2
T1
V
CC
GND
OUT
R1
OUT
T1
T2
OUT
OUT
T1
16
15
14
13
IN
12
11
IN
10
IN
9
OUT
A
CONFIGURATION
35
3-12
Page 13
HIN230 thru HIN241
Applications
The HIN2XX may be used for all RS-232 data terminal and
communication links. It is particularly useful in applications
where ±12V power supplies are not available for
conventional RS-232 interface circuits. The applications
presented represent typical interface configurations.
A simple duplex RS-232 port with CTS/RTS handshaking is
illustrated in Figure 9. Fixed output signals such as DTR
(data terminal ready) and DSRS (data signaling rate select)
is generated by driving them through a 5kΩ resistor
connected to V+.
In applications requiring four RS-232 inputs and outputs
(Figure 10), note that each circuit requires two charge pump
capacitors (C1 and C2) but can share common reservoir
capacitors (C3 and C4). The benefit of sharing common
reservoir capacitors is the elimination of two capacitors and
the reduction of the charge pump source impedance which
effectively increases the output swing of the transmitters.
1
+
TTL/CMOS
INPUTS AND
OUTPUTS
C1
1µF
-
TD
RTS
RD
CTS
HIN232
3
T1
11
R2
T2
R1
10
12
9
TTL/CMOS
INPUTS AND
OUTPUTS
FIGURE 9. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS
4
+
C2
5
1µF
-
14
TD (2) TRANSMIT DATA
7
RTS (4) REQUEST TO SEND
13
RD (3) RECEIVE DATA
8
CTS (5) CLEAR TO SEND
15
+5V
1
+
C1
3
1µF
-
4
+
C2
5
1µF
-
11
TD
10
RTS
12
RD
9
CTS
HANDSHAKING
R2
16
HIN232
T1
R1
T2
-
+
DTR (20) DATA
2
6
-
+
14
TD (2) TRANSMIT DATA
7
RTS (4) REQUEST TO SEND
13
RD (3) RECEIVE DATA
8
CTS (5) CLEAR TO SEND
SIGNAL GROUND (7)15
TERMINAL READY
DSRS (24) DATA
SIGNALING RATE
SELECT
RS-232
INPUTS AND OUTPUTS
16
V- V+
6
HIN232
T1
R1
T2
26
C3
+
2µF
2
16
4
+
C2
5
1µF
-
14
DTR (20) DATA TERMINAL READY
7
DSRS (24) DATA SIGNALING RATE SELECT
13
DCD (8) DATA CARRIER DETECT
8
R1 (22) RING INDICATOR
SIGNAL GROUND (7)15
+5V
-
RS-232
INPUTS AND OUTPUTS
TTL/CMOS
INPUTS AND
OUTPUTS
2µF
C1
1µF
DTR
DSRS
DCD
R1
C4
+
-
1
+
3
-
11
10
12
R2
9
FIGURE 10. COMBINING TWO HIN232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS
3-13
Page 14
Die Characteristics
HIN230 thru HIN241
DIE DIMENSIONS:
160 mils x 140 mils
METALLIZATION:
Type: Al
Thickness: 10k
Å ±1kÅ
SUBSTRATE POTENTIAL
V+
Metallization Mask Layout
R2
IN
R2
OUT
T2
IN
T2
OUT
T1
OUT
T3
OUT
HIN240
T4
OUT
PASSIVATION:
Type: Nitride over Silox
Nitride Thickness: 8k
Silox Thickness: 7kÅ
TRANSISTOR COUNT:
238
PROCESS:
CMOS Metal Gate
R3
IN
R3
OUT
Å
T5
IN
SHUTDOWN
EN
R1
T1
OUT
R1
GND
V
CC
T5
R4
R4
T4
T3
R5
R5
OUT
IN
OUT
IN
IN
OUT
IN
IN
IN
3-14
C1+V+C1-
V-C2-C2+
Page 15
HIN230 thru HIN241
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
3-15
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
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