Datasheet HIN241ECB, HIN241ECA, HIN238ECA-T, HIN237ECP, HIN237ECB-T Datasheet (Intersil Corporation)
...Page 1
3-1
TM
File Number 4315.4
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
HIN202E thru HIN241E
+/-15kV, ESD-Protected, +5V Powered,
RS-232 Transmitters/Receivers
The HIN202E-HIN241E family of RS-232 transmitters/receivers
interface circuits meet all ElA high-speed RS-232E and V.28
specifications, and are particularly suited for those applications
where ±12V is not available. A redesigned transmitter circuit
improves data rate and slew rate, which makes this suitable for
ISDN and high speed modems. The transmitter outputs and
receiver inputs are protected to ±15kV ESD (Electrostatic
Discharge). Theyrequirea single +5V power supply and feature
onboard charge pump voltage converters which generate +10V
and -10V supplies from the 5V supply. The HIN205E and
HIN235E require no external capacitors and are ideally suited
for applications where circuit board space is critical. The family
of devices offers a wide variety of high-speed RS-232
transmitter/receiver combinations to accommodate various
applications (see Selection Table).
The HIN205E, HIN206E, HIN211E, HIN213E, HIN235E,
HIN236E, and HIN241E feature a low power shutdown mode to
conserve energy in battery powered applications. In addition,
the HIN213E provides two active receivers in shutdown mode
allowing for easy “wakeup” capability.
The drivers feature true TTL/CMOS input compatibility, slew
rate-limited output, and 300Ω power-off source impedance. The
receivers can handle up to ±30V input, and have a 3kΩ to 7kΩ
input impedance. The receivers also feature hysteresis to
greatly improve noise rejection.
Applications
• Any System Requiring High-Speed RS-232
Communications Port
- Computer - Portable, Mainframe, Laptop
- Peripheral - Printers and Terminals
- Instrumentation, UPS
- Modems, ISDN Terminal Adaptors
Features
• High Speed ISDN Compatible . . . . . . . . . . . . . 230kbits/s
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC1000)
• Meets All RS-232E and V.28 Specifications
• Requires Only 0.1µF or Greater External Capacitors
HIN205E and HIN235E Require No External Capacitors)
• Two Receivers Active in Shutdown Mode (HIN213E)
• Requires Only Single +5V Power Supply
• Onboard Voltage Doubler/Inverter
• Low Power Consumption (Typ). . . . . . . . . . . . . . . . . . 5mA
• Low Power Shutdown Function (Typ). . . . . . . . . . . . . 1µA
• Three-State TTL/CMOS Receiver Outputs
• Multiple Drivers
- ±10V Output Swing for +5V Input
- 300Ω Power-Off Source Impedance
- Output Current Limiting
- TTL/CMOS Compatible
• Multiple Receivers
- ±30V Input Voltage Range
-3kΩ to 7kΩ Input Impedance
- 0.5V Hysteresis to Improve Noise Rejection
Selection Table
PART
NUMBER
POWER SUPPLY
VOLTAGE
NUMBER OF
RS-232
DRIVERS
NUMBER OF
RS-232
RECEIVERS
NUMBER OF
0.1µF
EXTERNAL
CAPACITORS
LOW POWER
SHUTDOWN/TTL
THREE-ST ATE
NUMBER OF
RECEIVERS
ACTIVE IN
SHUTDOWN
HIN202E +5V 2 2 4 Capacitors No/No 0
HIN205E +5V 5 5 None Yes/Yes 0
HIN206E +5V 4 3 4 Capacitors Yes/Yes 0
HIN207E +5V 5 3 4 Capacitors No/No 0
HIN208E +5V 4 4 4 Capacitors No/No 0
HIN211E +5V 4 5 4 Capacitors Yes/Yes 0
HIN213E +5V 4 5 4 Capacitors Yes/Yes 2
HIN232E +5V 2 2 4 Capacitors No/No 0
HIN235E +5V 5 5 None Yes/Yes 0
HIN236E +5V 4 3 4 Capacitors Yes/Yes 0
HIN237E +5V 5 3 4 Capacitors No/No 0
HIN238E +5V 4 4 4 Capacitors No/No 0
HIN241E +5V 4 5 4 Capacitors Yes/Yes 0
Data Sheet May 2000
Page 2
3-2
Ordering Information
PART NO.
TEMP.
RANGE (oC) PACKAGE PKG. NO.
HIN202ECA 0 to 70 16 Ld SSOP M16.209
HIN202ECB 0 to 70 16 Ld SOIC M16.3
HIN202ECBN 0 to 70 16 Ld SOIC (N) M16.15
HIN202ECP 0 to 70 16 Ld PDIP E16.3
HIN202EIB -40 to 85 16 Ld SOIC M16.3
HIN202EIB-T -40 to 85 Tape and Reel
HIN202EIBN -40 to 85 16 Ld SOIC (N) M16.15
HIN202EIP -40 to 85 16 Ld PDIP E16.3
HIN205ECP 0 to 70 24 Ld PDIP E24.6
HIN206ECA 0 to 70 24 Ld SSOP M24.209
HIN206ECB 0 to 70 24 Ld SOIC (W) M24.3
HIN206ECB-T 0 to 70 Tape and Reel
HIN206ECP 0 to 70 24 Ld PDIP E24.3
HIN206EIA -40 to 85 24 Ld SSOP M24.209
HIN206EIB -40 to 85 24 Ld SOIC (W) M24.3
HIN206EIP -40 to 85 24 Ld PDIP E24.3
HIN207ECA 0 to 70 24 Ld SSOP M24.209
HIN207ECA-T 0 to 70 Tape and Reel
HIN207ECB 0 to 70 24 Ld SOIC M24.3
HIN207ECB-T 0 to 70 Tape and Reel
HIN207ECP 0 to 70 24 Ld PDIP E24.3
HIN207EIA -40 to 85 24 Ld SSOP M24.209
HIN207EIB -40 to 85 24 Ld SOIC (W) M24.3
HIN207EIP -40 to 85 24 Ld PDIP E24.3
HIN208ECA 0 to 70 24 Ld SSOP M24.209
HIN208ECA-T 0 to 70 Tape and Reel
HIN208ECB 0 to 70 24 Ld SOIC M24.3
HIN208ECB-T 0 to 70 Tape and Reel
HIN208ECP 0 to 70 24 Ld PDIP E24.3
HIN208EIA -40 to 85 24 Ld SSOP M24.209
HIN208EIB -40 to 85 24 Ld SOIC M24.3
HIN208EIB-T -40 to 85 Tape and Reel
HIN208EIP -40 to 85 24 Ld PDIP E24.3
HIN211ECA 0 to 70 28 Ld SSOP M28.209
HIN211ECA-T 0 to 70 Tape and Reel
HIN211ECB 0 to 70 28 Ld SOIC M28.3
HIN211EIA -40 to 85 28 Ld SSOP M28.209
HIN211EIB -40 to 85 28 Ld SOIC M28.3
HIN213ECA 0 to 70 24 Ld SSOP M28.209
HIN213ECA-T 0 to 70 Tape and Reel
HIN213ECB 0 to 70 28 Ld SOIC M28.3
HIN213EIA -40 to 85 28 Ld SSOP M28.209
HIN213EIB -40 to 85 28 Ld SOIC M28.3
HIN232ECA 0 to 70 16 Ld SSOP M16.209
HIN232ECB 0 to 70 16 Ld SOIC M16.3
HIN232ECBN 0 to 70 16 Ld SOIC (N) M16.15
HIN232ECP 0 to 70 16 Ld PDIP E16.3
HIN235ECP 0 to 70 24 Ld PDIP E24.6
HIN236ECA 0 to 70 24 Ld SSOP M24.209
HIN236ECB 0 to 70 24 Ld SOIC (W) M24.3
HIN236ECB-T 0 to 70 Tape and Reel
HIN236ECP 0 to 70 24 Ld PDIP E24.3
HIN237ECA 0 to 70 24 Ld SSOP M24.209
HIN237ECA-T 0 to 70 Tape and Reel
HIN237ECB 0 to 70 24 Ld SOIC M24.3
HIN237ECB-T 0 to 70 Tape and Reel
HIN237ECP 0 to 70 24 Ld PDIP E24.3
HIN238ECA 0 to 70 24 Ld SSOP M24.209
HIN238ECA-T 0 to 70 Tape and Reel
HIN238ECB 0 to 70 24 Ld SOIC M24.3
HIN238ECB-T 0 to 70 Tape and Reel
HIN238ECP 0 to 70 24 Ld PDIP E24.3
HIN241ECA 0 to 70 28 Ld SSOP M28.209
HIN241ECB 0 to 70 28 Ld SOIC M28.3
PART NO.
TEMP.
RANGE (oC) PACKAGE PKG. NO.
HIN202E thru HIN241E
Page 3
3-3
Pinouts
HIN202E (PDIP, SOIC)
TOP VIEW
HIN205E (PDIP)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
C1+
V+
C1-
C2+
C2-
R2
IN
T2
OUT
V
CC
T1
OUT
R1
IN
R1
OUT
T1
IN
T2
IN
R2
OUT
GND
V-
1
2
3
4
5
6
7
8
9
10
11
12
T4
OUT
T3
OUT
T1
OUT
T2
OUT
R2
IN
R2
OUT
T2
IN
T1
IN
R1
OUT
R1
IN
GND
V
CC
16
17
18
19
20
21
22
23
24
15
14
13
R3
IN
T5
IN
SD
EN
T5
OUT
R4
OUT
T3
IN
R5
OUT
R5
IN
R3
OUT
R4
IN
T4
IN
V
CC
+5V
2
V+
16
T1
OUT
T2
OUT
T1
IN
T2
IN
T1
T2
11
10
14
7
+5V
400kΩ
+5V
400kΩ
R1
OUT
R1
IN
R1
1312
5kΩ
R2
OUT
R2
IN
R2
89
5kΩ
+10V TO -10V
VOLTAGE INVERTER
0.1µF
6
V-
C2+
C2-
+
0.1µF
4
5
+5V TO 10V
VOLTAGE INVERTER
C1+
C1-
+
0.1µF
1
3
+
0.1µF
+
GND
15
12
V
CC
T1
OUT
T1
IN
T1
+5V
+
0.1µF
6
2
3
18
1
19
24
10
400kΩ
13
14
R1
OUT
R1
IN
R1
4
5
R2
OUT
R2
IN
R2
23
22
R3
OUT
R3
IN
R3
16
17
21
20
+5V
T2
OUT
T2
IN
+5V
T3
OUT
T3
IN
+5V
T4
OUT
T4
IN
+5V
T5
OUT
T5
IN
+5V
400kΩ
400kΩ
400kΩ
400kΩ
T2
T3
T4
T5
GND
9
R4
IN
R5
IN
R4
R5
11
15
7
8
R4
OUT
R5
OUT
EN
SD
5kΩ
5kΩ
5kΩ
5kΩ
5kΩ
HIN202E thru HIN241E
Page 4
3-4
HIN206E (PDIP, SOIC, SSOP)
TOP VIEW
HIN207E (PDIP, SOIC, SSOP)
TOP VIEW
Pinouts (Continued)
T3
OUT
T1
OUT
T2
OUT
R1
IN
R1
OUT
T2
IN
T1
IN
GND
V
CC
C1+
V+
C1-
T4
OUT
R2
OUT
SD
EN
T4
IN
R3
OUT
VC2C2+
R2
IN
T3
IN
R3
IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
T3
OUT
T1
OUT
T2
OUT
R1
IN
R1
OUT
T2
IN
T1
IN
GND
V
CC
C1+
V+
C1-
T4
OUT
R2
OUT
T5
IN
T5
OUT
T4
IN
R3
OUT
VC2C2+
R2
IN
T3
IN
R3
IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
9
V
CC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1
OUT
T2
OUT
T3
OUT
T4
OUT
T4
IN
T1
IN
T2
IN
T3
IN
T1
T2
T3
T4
+5V
+
0.1µF
+
0.1µF
+
0.1µF
7
6
2
3
18 1
19 24
10
12
11
15
V+
V-
C1+
C1C2+
C2-
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+
0.1µF
13
14
R1
OUT
R1
IN
R1
45
5kΩ
R2
OUT
R2
IN
R2
2322
5kΩ
R3
OUT
R3
IN
R3
1617
5kΩ
EN
20
21
SD
GND
8
9
V
CC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1
OUT
T2
OUT
T3
OUT
T4
OUT
T4
IN
T1
IN
T2
IN
T3
IN
T1
T2
T3
T4
+5V
+
0.1µF
+
0.1µF
+
0.1µF
7
6
2
3
18 1
19 24
10
12
11
15
V+
V-
C1+
C1C2+
C2-
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+
0.1µF
13
14
R1
OUT
R1
IN
R1
45
5kΩ
R2
OUT
R2
IN
R2
2322
5kΩ
R3
OUT
R3
IN
R3
1617
5kΩ
T5
OUT
T5
IN
T5
21 20
+5V
400kΩ
GND
8
HIN202E thru HIN241E
Page 5
3-5
HIN208E (PDIP, SOIC, SSOP)
TOP VIEW
HIN211E (SOIC, SSOP)
TOP VIEW
Pinouts (Continued)
T2
OUT
T1
OUT
R2
IN
R2
OUT
T1
IN
R1
OUT
R1
IN
GND
V
CC
C1+
V+
C1-
T3
OUT
R3
OUT
T4
IN
T4
OUT
T3
IN
R4
OUT
VC2C2+
R3
IN
T2
IN
R4
IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
T3
OUT
T1
OUT
T2
OUT
R2
IN
R2
OUT
T2
IN
T1
IN
R1
OUT
R1
IN
GND
V
CC
C1+
V+
C1-
T4
OUT
R3
OUT
SD
EN
R4
IN
T4
IN
R5
OUT
R5
IN
VC2C2+
R3
IN
R4
OUT
T3
IN
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
9
V
CC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1
OUT
T2
OUT
T3
OUT
T4
OUT
T4
IN
T1
IN
T2
IN
T3
IN
T1
T2
T3
T4
+5V
+
0.1µF
+
0.1µF
+
0.1µF
5
18
2
1
19 24
21 20
10
12
11
15
V+
V-
C1+
C1C2+
C2-
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+
0.1µF
13
14
R1
OUT
R1
IN
R1
76
5kΩ
R2
OUT
R2
IN
R2
34
5kΩ
R3
OUT
R3
IN
R3
2322
5kΩ
R4
OUT
R4
IN
R4
1617
5kΩ
GND
8
11
V
CC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1
OUT
T2
OUT
T3
OUT
T1
IN
T2
IN
T3
IN
T1
T2
T3
+5V
+
0.1µF
+
0.1µF
+
0.1µF
7
6
2
3
20 1
12
14
13
17
V+
V-
C1+
C1C2+
C2-
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+
0.1µF
15
16
R1
OUT
R1
IN
R1
9
5kΩ
R2
OUT
R2
IN
R2
45
5kΩ
R3
OUT
R3
IN
R3
2726
5kΩ
R4
OUT
R4
IN
R4
2322
5kΩ
R5
OUT
R5
IN
R5
1819
5kΩ
EN
24
8
T4
OUT
T4
IN
T4
21 28
+5V
400kΩ
SD
25
GND
10
HIN202E thru HIN241E
Page 6
3-6
HIN213E (SOIC, SSOP)
TOP VIEW
NOTE: R4 and R5 active in shutdown.
HIN232E (PDIP, SOIC)
TOP VIEW
Pinouts (Continued)
T3
OUT
T1
OUT
T2
OUT
R2
IN
R2
OUT
T2
IN
T1
IN
R1
OUT
R1
IN
GND
V
CC
C1+
V+
C1-
T4
OUT
R3
OUT
SD
EN
R4
IN
T4
IN
R5
OUT
R5
IN
VC2C2+
R3
IN
R4
OUT
T3
IN
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
C1+
V+
C1-
C2+
C2-
R2
IN
T2
OUT
V
CC
T1
OUT
R1
IN
R1
OUT
T1
IN
T2
IN
R2
OUT
GND
V-
11
V
CC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1
OUT
T2
OUT
T3
OUT
T1
IN
T2
IN
T3
IN
T1
T2
T3
+5V
+
0.1µF
+
0.1µF
+
0.1µF
7
6
2
3
20 1
12
14
13
17
V+
V-
C1+
C1C2+
C2-
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+
0.1µF
15
16
R1
OUT
R1
IN
R1
9
5kΩ
R2
OUT
R2
IN
R2
45
5kΩ
R3
OUT
R3
IN
R3
2726
5kΩ
R4
OUT
R4
IN
R4
2322
5kΩ
R5
OUT
R5
IN
R5
1819
5kΩ
EN
24
8
T4
OUT
T4
IN
T4
21 28
+5V
400kΩ
25
SD
GND
10
V
CC
+5V
2
V+
16
T1
OUT
T2
OUT
T1
IN
T2
IN
T1
T2
11
10
14
7
+5V
400kΩ
+5V
400kΩ
R1
OUT
R1
IN
R1
1312
5kΩ
R2
OUT
R2
IN
R2
89
5kΩ
+10V TO -10V
VOLTAGE INVERTER
0.1µF
6
V-
C2+
C2-
+
0.1µF
4
5
+5V TO 10V
VOLTAGE INVERTER
C1+
C1-
+
0.1µF
1
3
+
0.1µF
+
GND
15
HIN202E thru HIN241E
Page 7
3-7
HIN235E (PDIP)
TOP VIEW
HIN236E (PDIP, SOIC, SSOP)
TOP VIEW
Pinouts (Continued)
1
2
3
4
5
6
7
8
9
10
11
12
T4
OUT
T3
OUT
T1
OUT
T2
OUT
R2
IN
R2
OUT
T2
IN
T1
IN
R1
OUT
R1
IN
GND
V
CC
16
17
18
19
20
21
22
23
24
15
14
13
R3
IN
T5
IN
SD
EN
T5
OUT
R4
OUT
T3
IN
R5
OUT
R5
IN
R3
OUT
R4
IN
T4
IN
T3
OUT
T1
OUT
T2
OUT
R1
IN
R1
OUT
T2
IN
T1
IN
GND
V
CC
C1+
V+
C1-
T4
OUT
R2
OUT
SD
EN
T4
IN
R3
OUT
VC2C2+
R2
IN
T3
IN
R3
IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
12
V
CC
T1
OUT
T1
IN
T1
+5V
+
0.1µF
6
2
3
18
1
19
24
10
400kΩ
13
14
R1
OUT
R1
IN
R1
4
5
R2
OUT
R2
IN
R2
23
22
R3
OUT
R3
IN
R3
16
17
21
20
+5V
T2
OUT
T2
IN
+5V
T3
OUT
T3
IN
+5V
T4
OUT
T4
IN
+5V
T5
OUT
T5
IN
+5V
400kΩ
400kΩ
400kΩ
400kΩ
T2
T3
T4
T5
GND
9
R4
IN
R5
IN
R4
R5
11
15
7
8
R4
OUT
R5
OUT
EN
SD
5kΩ
5kΩ
5kΩ
5kΩ
5kΩ
9
V
CC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1
OUT
T2
OUT
T3
OUT
T4
OUT
T4
IN
T1
IN
T2
IN
T3
IN
T1
T2
T3
T4
+5V
+
0.1µF
+
0.1µF
+
0.1µF
7
6
2
3
18 1
19 24
10
12
11
15
V+
V-
C1+
C1C2+
C2-
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+
0.1µF
13
14
R1
OUT
R1
IN
R1
45
5kΩ
R2
OUT
R2
IN
R2
2322
5kΩ
R3
OUT
R3
IN
R3
1617
5kΩ
EN
20
21
SD
GND
8
HIN202E thru HIN241E
Page 8
3-8
HIN237E (PDIP, SOIC, SSOP)
TOP VIEW
HIN238E (PDIP, SOIC, SSOP)
TOP VIEW
Pinouts (Continued)
T3
OUT
T1
OUT
T2
OUT
R1
IN
R1
OUT
T2
IN
T1
IN
GND
V
CC
C1+
V+
C1-
T4
OUT
R2
OUT
T5
IN
T5
OUT
T4
IN
R3
OUT
VC2C2+
R2
IN
T3
IN
R3
IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
T2
OUT
T1
OUT
R2
IN
R2
OUT
T1
IN
R1
OUT
R1
IN
GND
V
CC
C1+
V+
C1-
T3
OUT
R3
OUT
T4
IN
T4
OUT
T3
IN
R4
OUT
VC2C2+
R3
IN
T2
IN
R4
IN
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
9
V
CC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1
OUT
T2
OUT
T3
OUT
T4
OUT
T4
IN
T1
IN
T2
IN
T3
IN
T1
T2
T3
T4
+5V
+
0.1µF
+
0.1µF
+
0.1µF
7
6
2
3
18 1
19 24
10
12
11
15
V+
V-
C1+
C1C2+
C2-
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+
0.1µF
13
14
R1
OUT
R1
IN
R1
45
5kΩ
R2
OUT
R2
IN
R2
2322
5kΩ
R3
OUT
R3
IN
R3
1617
5kΩ
T5
OUT
T5
IN
T5
21 20
+5V
400kΩ
GND
8
9
V
CC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1
OUT
T2
OUT
T3
OUT
T4
OUT
T4
IN
T1
IN
T2
IN
T3
IN
T1
T2
T3
T4
+5V
+
0.1µF
+
0.1µF
+
0.1µF
5
18
2
1
19 24
21 20
10
12
11
15
V+
V-
C1+
C1C2+
C2-
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+
0.1µF
13
14
R1
OUT
R1
IN
R1
76
5kΩ
R2
OUT
R2
IN
R2
34
5kΩ
R3
OUT
R3
IN
R3
2322
5kΩ
R4
OUT
R4
IN
R4
1617
5kΩ
GND
8
HIN202E thru HIN241E
Page 9
3-9
HIN241E (SOIC, SSOP)
TOP VIEW
Pin Descriptions
PIN FUNCTION
V
CC
Power Supply Input 5V±10%, (5V ±5% HIN207E).
V+ Internally generated positive supply (+10V nominal).
V- Internally generated negative supply (-10V nominal).
GND Ground Lead. Connect to 0V.
C1+ External capacitor (+ terminal) is connected to this lead.
C1- External capacitor (- terminal) is connected to this lead.
C2+ External capacitor (+ terminal) is connected to this lead.
C2- External capacitor (- terminal) is connected to this lead.
T
IN
Transmitter Inputs. These leads accept TTL/CMOS lev els. An internal 400kΩ pull-up resistor to VCCis connected to each lead.
T
OUT
Transmitter Outputs. These are RS-232 levels (nominally ±10V).
R
IN
Receiver Inputs. These inputs accept RS-232 input lev els. An internal 5kΩ pull-down resistor to GND is connected to each input.
R
OUT
Receiver Outputs. These are TTL/CMOS levels.
EN Enable Input. This is an active low input which enables the receiver outputs. With EN = 5V, the outputs are placed in a high
impedance state.
SD,
SD Shutdown Input. With SD = 5V (HIN213E SD = 0V), the charge pump is disabled, the receiver outputs are in a high impedance
state (except R4 and R5 of HIN241E) and the transmitters are shut off.
NC No Connect. No connections are made to these leads.
Pinouts (Continued)
T3
OUT
T1
OUT
T2
OUT
R2
IN
R2
OUT
T2
IN
T1
IN
R1
OUT
R1
IN
GND
V
CC
C1+
V+
C1-
T4
OUT
R3
OUT
SD
EN
R4
IN
T4
IN
R5
OUT
R5
IN
VC2C2+
R3
IN
R4
OUT
T3
IN
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
11
V
CC
+5V TO 10V
VOLTAGE DOUBLER
+10V TO -10V
VOLTAGE INVERTER
T1
OUT
T2
OUT
T3
OUT
T1
IN
T2
IN
T3
IN
T1
T2
T3
+5V
+
0.1µF
+
0.1µF
+
0.1µF
7
6
2
3
20 1
12
14
13
17
V+
V-
C1+
C1C2+
C2-
+5V
400kΩ
+5V
400kΩ
+5V
400kΩ
+
0.1µF
15
16
R1
OUT
R1
IN
R1
9
5kΩ
R2
OUT
R2
IN
R2
45
5kΩ
R3
OUT
R3
IN
R3
2726
5kΩ
R4
OUT
R4
IN
R4
2322
5kΩ
R5
OUT
R5
IN
R5
1819
5kΩ
EN
24
8
T4
OUT
T4
IN
T4
21 28
+5V
400kΩ
SD
25
GND
10
HIN202E thru HIN241E
Page 10
3-10
Absolute Maximum Ratings Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) < VCC < 6V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . .(VCC -0.3V) < V+ < 12V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . .-12V < V- < (GND +0.3V)
Input Voltages
TIN . . . . . . . . . . . . . . . . . . . . . . . . . (V- -0.3V) < VIN < (V+ +0.3V)
RIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V
Output Voltages
T
OUT
. . . . . . . . . . . . . . . . . . . .(V- -0.3V) < V
TXOUT
< (V+ +0.3V)
R
OUT
. . . . . . . . . . . . . . . . . (GND -0.3V) < V
RXOUT
< (V+ +0.3V)
Short Circuit Duration
T
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
R
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
ESD Classification . . . . . . . . . . . . . . . . . . . . See Specification Table
Operating Conditions
Temperature Range
HIN2XXCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
HIN2XXIX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Thermal Resistance (Typical, Note 1) θJA (oC/W)
16 Ld SOIC (N) Package . . . . . . . . . . . . . . . . . . . . . 110
16 Ld SOIC (W) Package. . . . . . . . . . . . . . . . . . . . . 100
16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 155
16 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 90
24 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75
24 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 135
24 Ld PDIP (N) Package . . . . . . . . . . . . . . . . . . . . . 75
24 Ld PDIP (W) Package. . . . . . . . . . . . . . . . . . . . . 55
28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 70
28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 100
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(SOIC and SSOP - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Test Conditions: V
CC
= +5V ±10%, (VCC = +5V ±5% HIN207E); C1-C4 = 0.1µF; TA = Operating Temperature
Range
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
SUPPLY CURRENTS
Power Supply Current, I
CC
No Load,
TA = 25oC
HIN202E - 8 15 mA
HIN205E - HIN208E, HIN211E,
HIN213E, HIN235E - HIN241E
-1120mA
HIN232E - 5 10 mA
Shutdown Supply Current, ICC(SD) TA = 25oC HIN205E, HIN206E, HIN211E,
HIN235E, HIN236E, HIN241E
-110µA
HIN213E - 15 50 µA
LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS
Input Logic Low, V
lL
TIN, EN, SD, EN, SD - - 0.8 V
Input Logic High, V
lH
T
IN
2.0 - - V
EN, SD, EN, SD 2.4 - - V
Transmitter Input Pullup Current, I
P
TIN = 0V - 15 200 µA
TTL/CMOS Receiver Output Voltage Low, V
OLIOUT
= 1.6mA (HIN202E, HIN232E, I
OUT
= 3.2mA) - 0.1 0.4 V
TTL/CMOS Receiver Output V oltage High,V
OHIOUT
= -1mA 3.5 4.6 - V
TTL/CMOS Receiver Output Leakage EN = VCC, EN = 0, 0V < R
OUT
< V
CC
- 0.5 ±10 µA
RECEIVER INPUTS
RS-232 Input Voltage Range, V
IN
-30 - +30 V
Receiver Input Impedance, R
IN
TA = 25oC, VIN = ±3V 3.0 5.0 7.0 kΩ
Receiver Input Low Threshold, VIN (H-L) VCC = 5V,
TA = 25oC
Active Mode - 1.2 - V
Shutdown Mode HIN213E R4 and R5 - 1.5 - V
Receiver Input High Threshold, VIN (L-H) VCC = 5V,
TA = 25oC
Active Mode - 1.7 2.4 V
Shutdown Mode HIN213E R4 and R5 - 1.5 2.4 V
Receiver Input Hysteresis, V
HYST
VCC = 5V, No Hysteresis in Shutdown Mode 0.2 0.5 1.0 V
HIN202E thru HIN241E
Page 11
3-11
TIMING CHARACTERISTICS
Output Enable Time, t
EN
HIN205E, HIN206E, HIN211E, HIN213E, HIN235E,
HIN236E, HIN241E
- 600 - ns
Output Disable Time, t
DIS
HIN205E, HIN206E, HIN211E, HIN213E, HIN235E,
HIN236E, HIN241E
- 200 - ns
Transmitter, Receiver Propagation Delay, t
PD
HIN213E SD = 0V, R4, R5 - 4.0 40 µs
HIN213E SD = VCC, R1 - R5 - 0.5 10 µs
All except HIN213E - 0.5 10 µs
Transition Region Slew Rate, SR
T
RL = 3kΩ, CL = 1000pF Measured from +3V to -3V
or -3V to +3V, 1 Transmitter Switching (Note 2)
32045V/µs
TRANSMITTER OUTPUTS
Output Voltage Swing, T
OUT
Transmitter Outputs, 3kΩ to Ground ±5 ±9 ±10 V
Output Resistance, R
OUT
VCC = V+ = V- = 0V, V
OUT
= ±2V 300 - - Ω
RS-232 Output Short Circuit Current, I
SC
T
OUT
Shorted to GND - ±10 - mA
ESD PERFORMANCE
RS-232 Pins
(T
OUT
, RIN)
Human Body Model - ±15 - kV
IEC1000-4-2 Contact Discharge - ±8-kV
IEC1000-4-2 Air Gap (Note 3) - ±15 - kV
All Other Pins Human Body Model - ±2-kV
NOTES:
2. Guaranteed by design.
3. Meets Level 4 with the exception of HIN205E T5
OUT
= ±12kV.
Electrical Specifications Test Conditions: V
CC
= +5V ±10%, (VCC = +5V ±5% HIN207E); C1-C4 = 0.1µF; TA = Operating Temperature
Range (Continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
HIN202E thru HIN241E
Page 12
3-12
Detailed Description
The HIN2XXE family of high-speed RS-232
transmitters/receivers are powered by a single +5V power
supply, feature low power consumption, and meet all ElA
RS232C and V.28 specifications. The circuit is divided into
three sections: the charge pump, transmitter, and receiver.
Charge Pump
An equivalent circuit of the charge pump is illustrated in
Figure 3. The charge pump contains two sections: the
voltage doubler and the voltage inverter. Each section is
driven by a two phase, internally generatedclock to generate
+10V and -10V. The nominal clock frequency is 125kHz.
During phase one of the clock, capacitor C1 is charged to
V
CC
. During phase two, the voltage on C1 isadded to VCC,
producing a signal across C3 equal to twice V
CC
. During
phase two, C2 is also charged to 2V
CC
, and then during
phase one, it is inverted with respect to ground to produce a
signal across C4 equal to -2V
CC
. The charge pump accepts
input voltages up to 5.5V. The output impedance of the
voltage doubler section (V+) is approximately 200Ω, and the
output impedance of the voltage inverter section (V-) is
approximately 450Ω. A typical application uses 0.1µF
capacitors for C1-C4, however, the value is not critical.
Increasing the values of C1 and C2 will lower the output
impedance of the voltage doubler and inverter, increasing
the valuesof the reservoir capacitors, C3 and C4, lowers the
ripple on the V+ and V- supplies.
During shutdown mode (HIN205E, HIN206E, HIN211E,
HIN213E, HIN235E, HIN236E and HIN241E) the charge
pump is turned off, V+ is pulled down to V
CC
, V- is pulled up
to GND, and the supply current is reduced to less than 10µA.
The transmitter outputs are disabled and the receiver
outputs (except for HIN213E, R4 and R5) are placed in the
high impedance state.
Transmitters
The transmitters are TTL/CMOS compatible inverters which
translate the inputs to RS-232 outputs. The input logic
threshold is about 26% of V
CC
, or 1.3V for VCC= 5V.A logic
Test Circuits (HIN232E)
FIGURE 1. GENERAL TEST CIRCUIT FIGURE 2. POWER-OFF SOURCE RESISTANCE
CONFIGURATION
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
C1+
V+
C1C2+
C2V-
R2
IN
T2
OUT
V
CC
T1
OUT
R1
IN
R1
OUT
T1
IN
T2
IN
R2
OUT
GND
+4.5V TO
+5.5V INPUT
3kΩ
T1 OUTPUT
RS-232 ±30V INPUT
TTL/CMOS OUTPUT
TTL/CMOS INPUT
TTL/CMOS INPUT
TTL/CMOS OUTPUT
+
-
0.1µF
C3
+
-
0.1µF
C1
+
-
0.1µF
C2
+
-
0.1µF C4
3kΩ
OUTPUT
RS-232
±30V INPUT
T2
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
C1+
V+
C1C2+
C2V-
R2
IN
T2
OUT
V
CC
T1
OUT
R1
IN
R1
OUT
T1
IN
T2
IN
R2
OUT
GND
T2
OUT
T1
OUT
VIN = ±2V
A
R
OUT
= VIN/I
+
-
C1
+
-
C3
+
-
C2
+
-
C4
S1
S2
S5
S6
S3
S4
S7
S8
V
CC
GND
RC
OSCILLATOR
V
CC
GND
V+ = 2V
CC
GND
V
- = - (V+)
C1+
C1
-
C2-
C2+
VOLTAGE INVERTER
VOLTAGE DOUBLER
FIGURE 3. CHARGE PUMP
HIN202E thru HIN241E
Page 13
3-13
1 at the input results in a voltage of between -5V and V- at
the output, and a logic 0 results in a voltage between +5V
and (V+ -0.6V). Each transmitter input has an internal 400kΩ
pullup resistor so any unused input can be left unconnected
and its output remains in its low state. The output voltage
swing meets the RS-232C specifications of ±5V minimum
with the worst case conditions of: all transmitters driving 3kΩ
minimum load impedance, V
CC
= 4.5V, and maximum
allowable operating temperature. The transmitters have an
internally limited output slew rate which is less than 30V/µs.
The outputs are short circuit protected and can be shorted to
ground indefinitely. The powered down output impedance is
a minimum of 300Ω with ±2V applied to the outputs and
V
CC
= 0V.
Receivers
The receiver inputs accept up to ±30V while presenting the
required 3kΩ to 7kΩ input impedance evenif the power is off
(V
CC
= 0V). The receivers have a typical input threshold of
1.3V which is within the ±3V limits, known as the transition
region, of the RS-232 specifications. The receiver output is
0V to V
CC
. The output will be low whenever the input is
greater than 2.4V and high whenever the input is floating or
driven between +0.8V and -30V. The receivers feature 0.5V
hysteresis (except during shutdown) to improve noise
rejection. The receiver Enable line
EN, (EN on HIN213E)
when unasserted, disables the receiver outputs, placing
them in the high impedance mode. The receiver outputs are
also placed in the high impedance state when in shutdown
mode (except HIN213E R4 and R5).
HIN213E Operation in Shutdown
The HIN213E features two receivers, R4 and R5, which
remain active in shutdown mode. During normal operation
the receivers propagation delay is typically 0.5µs. This
propagation delay may increase slightly during shutdown.
When entering shut down mode, receivers R4 and R5 are
not valid for 80µs after
SD = VIL. When exiting shutdown
mode, all receiver outputs will be invalid until the charge
pump circuitry reaches normal operating voltage. This is
typically less than 2ms when using 0.1µF capacitors.
Application Information
The HIN2XXE maybe used for all RS-232 data terminal and
communication links. It is particularly useful in applications
where ±12V power supplies are not available for
conventional RS-232 interface circuits. The applications
presented represent typical interface configurations.
A simple duplex RS-232 port with CTS/RTS handshaking is
illustrated in Figure 7. Fixed output signals such as DTR
(data terminal ready) and DSRS (data signaling rate select)
is generated by driving them through a 5kΩ resistor
connected to V+.
In applications requiring four RS-232 inputs and outputs
(Figure 8), note that each circuit requires two charge pump
capacitors (C1 and C2) but can share common reservoir
capacitors (C3 and C4). The benefit of sharing common
reservoir capacitors is the elimination of two capacitors and
the reduction of the charge pump source impedance which
effectively increases the output swing of the transmitters.
T
OUT
V- < V
TOUT
< V+
300Ω
400kΩ
T
XIN
GND < T
XIN
< V
CC
V-
V+
V
CC
FIGURE 4. TRANSMITTER
R
OUT
GND < V
ROUT
< V
CC
5kΩ
R
XIN
-30V < R
XIN
< +30V
GND
V
CC
FIGURE 5. RECEIVER
T
IN
V
OL
V
OL
t
PLH
t
PHL
AVERAGE PROPAGATION DELAY =
t
PHL +tPLH
2
OR
R
IN
T
OUT
OR
R
OUT
FIGURE 6. PROPAGATION DELAY DEFINITION
-
+
-
+
-
+
CTR (20) DATA
TERMINAL READY
DSRS (24) DATA
SIGNALING RATE
RS-232
INPUTS AND OUTPUTS
TD (2) TRANSMIT DATA
RTS (4) REQUEST TO SEND
RD (3) RECEIVE DATA
CTS (5) CLEAR TO SEND
SIGNAL GROUND (7)15
8
13
7
14
16
-
+
6
R2
R1
T2
T1
9
12
10
11
4
5
3
1
HIN232E
C1
0.1µF
C2
0.1µF
TD
RTS
RD
CTS
SELECT
+5V
INPUTS
OUTPUTS
TTL/CMOS
FIGURE 7. SIMPLEDUPLEX RS-232 PORT WITH CTS/RTS
HANDSHAKING
HIN202E thru HIN241E
Page 14
3-14
Typical Performance Curves
FIGURE 9. V- SUPPLY VOLTAGE vs V
CC
FIGURE 10. V+, V- OUTPUT VOLTAGE vs LOAD
-
+
RS-232
INPUTS AND OUTPUTS
DTR (20) DATA TERMINAL READY
DSRS (24) DATA SIGNALING RATE SELECT
DCD (8) DATA CARRIER DETECT
R1 (22) RING INDICATOR
SIGNAL GROUND (7)15
8
13
7
14
2
-
+
4
R2
R1
T2
T1
9
12
10
11
3
1
HIN232E
C1
0.1µF
DTR
DSRS
DCD
R1
+5V
INPUTS
OUTPUTS
TTL/CMOS
-
+
-
+
TD (2) TRANSMIT DATA
RTS (4) REQUEST TO SEND
RD (3) RECEIVE DATA
CTS (5) CLEAR TO SEND
8
13
7
14
15
R2
R1
T2
T1
9
12
10
11
4
5
3
1
HIN232E
C1
0.1µF
C2
0.1µF
TD
RTS
RD
CTS
INPUTS
OUTPUTS
TTL/CMOS
-
+
5
C2
0.1µF
16
C3
0.2µF
6
26
V- V+
-
+
C4
0.2µF
16
V
CC
V
CC
FIGURE 8. COMBINING TWO HIN232Es FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS
12
10
8
6
4
2
0
3.5 4.0 4.5 6.0
V
CC
V- SUPPLY VOLTAGE (V)
5.0 5.53.0
0.1µF
35
|I
LOAD
| (mA)
V+ (VCC = 4V)
V+ (VCC = 5V)
V- (VCC = 5V)
V- (VCC = 4V)
TA = 25oC
TRANSMITTER OUTPUTS
OPEN CIRCUIT
302520151050
SUPPLY VOLTAGE (|V|)
0
12
10
8
6
4
2
HIN202E thru HIN241E
Page 15
3-15
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However,no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see website www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
Die Characteristics
DIE DIMENSIONS:
128 mils x 77 mils
METALLIZATION:
Type: Al
Thickness: 10k
Å ±1kÅ
SUBSTRATE POTENTIAL
GND
PASSIVATION:
Type: Nitride over Silox
Nitride Thickness: 8k
Å
Silox Thickness: 7kÅ
TRANSISTOR COUNT:
185
PROCESS:
CMOS Metal Gate
Metallization Mask Layout
HIN232E
PIN 1 C1+
PIN 2 V+
C1-
PIN 7
PIN 17 V
CC
PIN 3
C2+
PIN 4
C2-
PIN 5
V-
PIN 6
T2
IN
PIN 11
T1
IN
PIN 12
R1
OUT
PIN 13
R1
IN
PIN 14
T1
OUT
PIN 15
GND
PIN 16
T2
OUT
PIN 8R2
IN
PIN 9T3
OUT
PIN 10R2
OUT
HIN202E thru HIN241E
Loading...