600V, SMPS Series N-Channel IGBT with
Anti-Parallel Hyperfast Diode
The HGTG7N60A4D, HGTP7N60A4D and
HGT1S7N60A4DS are MOS gated high voltage switching
devices combining the best features of MOSFETs and
bipolar transistors. These devices have the high input
impedance of a MOSFET and the low on-state conduction
loss of a bipolar transistor. The much lower on-state voltage
drop varies only moderately between 25
o
C and 150oC. The
IGBT used is the development type TA49331. The diode
used in anti-parallel is the development type TA49370.
This IGBT is ideal for many high voltage switching
applications operating at high frequencies where low
conduction losses are essential. This device has been
optimized for high frequency switch mode power
supplies.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
PKG
300
260
o
C
o
C
o
C
NOTE:
1. Pulse width limited by maximum junction temperature.
Electrical SpecificationsT
= 25oC, Unless Otherwise Specified
J
PARAMETERSYMBOLTEST CONDITIONSMINTYPMAXUNITS
Collector to Emitter Breakdown VoltageBV
Collector to Emitter Leakage CurrentI
2. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. E
is the turn-on loss of the IGBT only. E
ON1
is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in
Figure 24.
3. Turn-Off Energy Loss (E
) is defined as the integral of the instantaneouspower loss starting at the trailing edge of the input pulse and ending
OFF
at the point where the collector current equals zero (ICE= 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement
of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
FIGURE 23. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
Test Circuit and Waveforms
DUTY FACTOR, D = t1 / t
PEAK TJ = (PDX Z
-1
10
t
1
P
D
t
2
2
X R
θJC
) + T
C
1
10
θJC
0
10
HGTG7N60A4D
L = 1mH
RG = 25Ω
DUT
+
= 390V
V
DD
-
FIGURE 24. INDUCTIVE SWITCHING TEST CIRCUIT
90%
V
GE
E
V
CE
90%
I
CE
t
d(OFF)I
10%
OFF
t
fI
10%
E
ON2
t
rI
t
d(ON)I
FIGURE 25. SWITCHING TEST WAVEFORMS
2-7
Page 8
HGTG7N60A4D, HGTP7N60A4D, HGT1S7N60A4DS
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to gateinsulation damage by the electrostatic discharge of energy
through the devices. When handling these devices, care
should be exercised to assure that the static charge built in
the handler’s body capacitance is not discharged through
the device.With proper handling and application procedures,
however, IGBTs are currently being extensively used in
production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD™ LD26” or equivalent.
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devicesshould never be inserted into or removed from
circuits with power on.
5. Gate Voltage Rating - Neverexceedthe gate-voltage
rating of V
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate opencircuited or floating should be avoided. These conditions
can result in turn-on of the device due to voltage buildup
on the input capacitor due to leakage currents or pickup.
7. GateProtection - These devices do not have an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an externalZener is recommended.
. Exceeding the rated VGE can result in
GEM
Operating Frequency Information
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (I
the information shown for a typical unit in Figures 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows f
MAX1
or f
MAX2
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
f
is defined by f
MAX1
MAX1
= 0.05/(t
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
are possible. t
d(OFF)I
and t
d(ON)I
Device turn-off delay can establish an additional frequency
limiting condition for an application other than T
is important when controlling output ripple under a lightly
loaded condition.
f
is defined by f
MAX2
allowabledissipation (P
= (PD - PC)/(E
MAX2
)is defined by PD=(TJM-TC)/R
D
The sum of device switching and conduction losses must
not exceed P
the conduction losses (P
P
=(VCExICE)/2.
C
E
and E
ON2
shown in Figure 25. E
. A 50% duty factor was used (Figure 3) and
D
are defined in the switching waveforms
OFF
) are approximated by
C
is the integral of the
ON2
instantaneous power loss (I
E
is the integral of the instantaneous power loss
OFF
(I
CExVCE
calculation for E
(I
CE
) during turn-off. All tail losses are included in the
; i.e., the collector current equals zero
OFF
= 0).
) plots are possible using
CE
; whichever is smaller at each
d(OFF)I
+ t
d(ON)I
).
are defined in Figure 25.
. t
JM
d(OFF)I
+ E
OFF
x VCE) during turn-on and
CE
ON2
). The
θJC
.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
2-8
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
ECCOSORBD™ is a trademark of Emerson and Cumming, Inc.
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