Datasheet hgtd8p50 Datasheet

SEMICONDUCTOR

HGTD8P50G1,

HGTD8P50G1S

May 1996

Features

• 8A, 500V

• 3.7V V

CE(SAT)

• Typical Fall Time - 1800ns

• High Input Impedance
= +150oC

•T

J

Description

The HGTD8P50G1 and the HGTD8P50G1S are P-channel
enhancement-mode insulated gate bipolar transistors (IGBTs)
designed for high voltage, low on-dissipation applications such
as switching regulators and motor drives. This P- channel IGBT
can be paired with N-Channel IGBTs to form a complementary
power switch and it is ideal for half bridge circuit configurations.
These types can be operated directly from low power integrated
circuits.

PACKAGING AVAILABILITY

PART NUMBER PACKAGE BRAND

HGTD8P50G1 TO-251AA G8P50G
HGTD8P50G1S TO-252AA G8P50G

NOTE: When ordering, use the entire part number. Add the suffix 9A
to obtain the TO-252AA variant in the tape and reel, i.e.,
HGTD8P50G1S9A.

The development type number for these devices is TA49015.

Package

Symbol

8A, 500V P-Channel IGBTs

JEDEC TO-251AA

EMITTER

COLLECTOR

GATE

(FLANGE)

COLLECTOR

JEDEC TO-252AA

(FLANGE)

GATE
COLLECTOR
EMITTER

G

COLLECTOR

C

E

Absolute Maximum Ratings T

Collector-Emitter Breakdown Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BV

Emitter-Collector Breakdown Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BV

Collector Current Continuous

At TC = +25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

At TC = +90oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate-Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Gate-Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Switching SOA at TC = +25oC, VCL = -350V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .SSOA

No Snubber, Figure 17 - Circuit 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

With 0.1µF Capacitor, Figure 17 - Circuit 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power Dissipation Total at TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

Power Dissipation Derating TC > +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.53 W/oC

Operating and Storage Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

(0.125" from case for 5s)
NOTE:

1. TJ = 25oC, VCL = 350V, RGE = 25Ω, Figure 17 - Circuit 2 (C1 = 0.1µF)

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright

© Harris Corporation 1996

= +25oC, Unless Otherwise Specified

C

1

CES
ECS

C25
C90

CM

GES

GEM

STG

HGTD8P50G1/G1S UNITS

-500 V
10 V

-12

-8

-18 A

±20 V
±30 V

-3

-18

D

L

66 W

-40 to +150
+260

File Number 3649.2

A
A

A
A

o

C

o

C

Specifications HGTD8P50G1, HGTD8P50G1S

Electrical Specifications T

= +25oC, Unless Otherwise Specified

C

PARAMETERS SYMBOL TEST CONDITIONS MIN TYP MAX UNIT

Collector-Emitter Breakdown Voltage BV

Emitter-Collector Breakdown Voltage BV

Collector-Emitter Leakage Current I

Collector-Emitter Saturation Voltage V

Gate-Emitter Threshold Voltage V

Gate-Emitter Leakage Current I

Gate-Emitter Plateau Voltage V

On-State Gate Charge Q

CES

ICE = -250µA
VCL = -600V

ECS

CES

IEC= 1mA VGE= 0V 10 - - V

VCE = BV

VCE = 0.8 BV

CE(SAT)ICE

VGE = -15V

ICE = I
VGE = -15V

GE(TH)ICE

GES

GE(PL)IC

G(ON)IC

VGE = ±20V - - ±100 nA

VCE = 0.5 BV

VGE = 0V -500 - - V

CES

CES

= -3.0A

TC = +25oC - - -250 µA

TC = +150oC - - -1.0 mA

TC = +25oC - -2.5 -2.9 V

TC = +150oC - -2.3 -2.8 V

C90

TC = +25oC - -3.0 -3.7 V

TC = +150oC - -3.3 -4.0 V

= -1.0mA VCE = V

GE

= 3A VCE = 0.5 BV

= 3A,

CES

VGE = -15V - 16 25 nC

VGE = -20V - 22 30 nC

CES

-4.5 -6.0 -7.5 V

- -7.0 - V

Current Turn-On Delay Time t

D(ON)I

RL = 113Ω ICE = -3A,

-45-ns

VGE = -15V

Current Rise Time t

RI

VCE = -350V

-85-ns

RG = 25Ω

Current Turn-off Delay Time t

D(OFF)I

L = 100µH - 480 680 ns

TJ = +150oC
Fig. 17, Circuit 1

Current Fall Time t

Turn-Off Energy (Note 1) E

Current Turn-Off Delay Time t

D(OFF)I

FI

OFF

L = 100µHI

CE

= -8A,

- 1800 2500 ns

- 0.8 - mJ

- 100 200 ns

VGE = -15V

Current Fall Time t

FI

VCE = -350V

- 3500 4000 ns

RG = 25Ω

Turn-Off Energy (Note 1) E

OFF

TJ = +150oC

- 1.3 - mJ
Fig. 17, Circuit 2
C1 = .022µF

Latching Current I

L

L = 100µHV

GE

= -15V

-3 - - A

RG = 25Ω

T

= +25oC

J

VCE = -350V
Fig. 17, Circuit 1

Thermal Resistance R

θJC

- 1.75 1.90oC/W

NOTE:

1. T urn-Off Energy Loss (E

) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and

OFF

ending at the point where the collector current equals zero (ICE = 0A). The HGTD8P50G1 and HGTD8P50G1S were tested per JEDEC
standard No. 24-1 Method for Measurement of Power Device Tur n-Off Switching Loss. This test method produces the true total Turn-Off
Energy Loss. Turn-On losses include diode losses.

2

Typical Performance Curves

HGTD8P50G1, HGTD8P50G1S

PULSE DURATION = 250µs, DUTY CYCLE < 0.5%, VCE = -10V

-20

-16
TC = -40oC

-12

= +25oC

T

C

TC = +150oC

-8

-4

, COLLECTOR-EMITTER CURRENT (A)

0

CE

I

-4

-6

V

GE

-8 -10

, GATE-TO-EMITTER VOLTAGE (V)

-12

-14

-20

-16

-12

-8

-4

, COLLECTOR-EMITTER CURRENT (A)

CE

0

I

0

PULSE DURATION = 250µs, DUTY CYCLE < 0.5%

VGE = -15V

-2
VCE, COLLECTOR-EMITTER VOLTAGE (V)

-4 -6

-12V

FIGURE 1. TRANSFER CHARACTERISTICS FIGURE 2. SATURATION CHARACTERISTICS

-14

-12

-10

-8

-6

-4

-2

, DC COLLECTOR CURRENT (A)

CE

I

0

25 50 75

TC, CASE TEMPERATURE (oC)

VGE = -15V

100 125 150

PULSE DURATION = 250µs, DUTY CYCLE < 0.5%, VGE = -15V

-20

-16
TC = -40oC

-12

TC = +150oC

-8

-4

, COLLECTOR-EMITTER CURRENT (A)

0

CE

0-1

I

V

, COLLECTOR-EMITTER VOLTAGE (V)

CE

-3 -4 -5 -6 -7

-2

-10V

-9.0V

-8.0V

-7.0V

-6.5V

-8

TC = +25oC

-10

FIGURE 3. MAXIMUM DC COLLECTOR CURRENT AS A

FUNCTION OF CASE TEMPERATURE

FREQUENCY = 1MHz

700

600

C

IES

500

400

300

C, CAPACITANCE (pF)

200

C

OES

100

C

RES

0

0

-5

-10

-15

-20

-25

VCE, COLLECTOR-EMITTER VOLTAGE (V)

FIGURE 5. CAPACITANCE AS A FUNCTION OF COLLECTOR-

EMITTER VOLTAGE

FIGURE 4. COLLECTOR-EMITTER SATURATION VOLTAGE

-400

-200

COLLECTOR-EMITTER VOLTAGE (V)

CE,

V

0

VCE = -400V

I

G(REF)

20

I

G(ACT)

= +25oC, VGE = -15V, I

T

J

GATE-EMITTER VOLTAGE

VCE = -100V

COLLECTOR-EMITTER VOLTAGE

TIME (µs)

= -0.391mA

G(REF)

VCE = -400V

80

I

G(REF)

I

G(ACT)

-15

-7.5

0

FIGURE 6. NORMALIZED SWITCHING WAVEFORMS AT

CONSTANT GATE CURRENT. (REFER TO
APPLICATION NOTES AN7254 AND AN7260)

, GATE-EMITTER VOLTAGE (V)

GE

V

3

HGTD8P50G1, HGTD8P50G1S

Typical Performance Curves

(Continued)

TJ = +150oC

-10

-5
VGE = -10V

VGE = -15V

, SATURATION VOLTAGE (V)

CE(SAT)

V

-1

0 -2 -4 -6 -8 -10 -12 -14

I

, COLLECTOR-EMITTER CURRENT (A)

CE

FIGURE 7. SATURATION VOLTAGE AS A FUNCTION OF

COLLECTOR-EMITTER CURRENT

TJ = +150oC, VCE = -350V, VGE = -15V, L = 100µH

1.0

R

= 50Ω

GE

10

TJ= +150oC, RG = 25Ω, L = 100µH

FIG. 17, CIRCUIT 1

VCE = -350V, VGE = -15V

1.0

VCE = -200V, VGE = -15V

, TURN-OFF SWITCHING LOSS (mJ)

OFF

0.1

W

-1 -2 -3 -4 -5
, PEAK COLLECTOR-EMITTER CURRENT (A)

I

CE

FIGURE 8. TURN-OFF SWITCHING LOSS AS A FUNCTION OF

COLLECTOR-EMITTER CURRENT

TJ = +150oC, TC = +75oC, VGE = -15V, RGE = 25Ω, L = 100µH

100

FIG. 17, CIRCUIT 1

0.5

RGE = 25Ω

, TURN-OFF DELAY TIME (µs)

FIG. 17, CIRCUIT 1

D(OFF)I

t

0.1

-1

-2 -3 -4 -5

, PEAK COLLECTOR-EMITTER CURRENT (A)

I

CE

FIGURE 9. TURN-OFF DELA Y AS A FUNCTION OF COLLECTOR-

EMITTER CURRENT

= +150oC, VGE = -15V, RG = 25Ω, L = 100µH

T

5

4

3

2

, FALL TIME (µs)

FI

t

FIG. 17, CIRCUIT 1

J

VCE = -200V

VCE = -350V

50

VCE = -350V

f

= 0.05/t

MAX1

f

MAX2

PD = ALLOWABLE DISSIPATION

= CONDUCTION DISSIPATION

P

MAX

C

R

θJC

10

-1

, OPERATING FREQUENCY (kHz)
f

D(OFF)I

= (PD - PC)/E

OFF

(DUTY FACTOR = 50%)

= 1.9oC/W

-5 -10

ICE, PEAK COLLECTOR-EMITTER CURRENT (A)

FIGURE 10. OPERATING FREQUENCY AS A FUNCTION OF

COLLECTOR-EMITTER CURRENT AND VOLTAGE

T

= 25oC, VGE = -15V, RG = 25Ω, L = 100µH

-25
FIG. 17, CIRCUIT 2

-20

-15

-10

-5

J

VCE = -350V

1

-1 -3 -4 -5

-2

, COLLECTOR-EMITTER CURRENT (A)

I

CE

FIGURE 11. FALL TIME AS A FUNCTION OF COLLECTOR-

EMITTER CURRENT

0

, PEAK COLLECTOR-EMITTER CURRENT (A)

-5

10

CE

I

-4

10

C1, SNUBBER CAPACITANCE (µF)

-3

10

-2

10

FIGURE 12. LATCHING CURRENT AS A FUNCTION OF

SNUBBER CAPACITANCE

4

-1

10

0

10

HGTD8P50G1, HGTD8P50G1S

Typical Performance Curves

= -350V, VGE= -15V, RG = 25Ω, L = 100µH

V

CE

(Continued)

-7
FIG. 17, CIRCUIT 1

-6

-5

CURRENT (A)

-4

, PEAK COLLECTOR-EMITTER

CE

I

-3

-50 0 50 100 150
, CASE TEMPERATURE (oC)

T

C

FIGURE 13. LATCHING CURRENT AS A FUNCTION OF

JUNCTION TEMPERATURE

0

10

0.5

0.2

0.1

-1

10

0.05

C/W)

o

0.02

0.01

-2

10

RESPONSE (

-3

10

10

SINGLE PULSE

-4

-5

10

t

, RECTANGULAR PULSE DURATION (s)

1

, NORMALIZED THERMAL

θJC

Z

NOTES:

1. DUTY FACTOR, D =

2.PEAK TJ= (PDS x Z

-3

10

-2

10

t

1

P

DS

t

2

t

1/t2

x R

θJC

-1

10

10

θJC

0

) + T

V

= VGE, ICE = 1.0mA

CE

6.5

6.0

5.5

5.0

, GATE THRESHOLD VOLTAGE (V)

TH

V

4.5

-40 0 40 80
, CASE TEMPERATURE (oC)

T

C

FIGURE 14. GATE THRESHOLD VOLTAGE AS A FUNCTION OF

JUNCTION TEMPERATURE

TC = 25oC, VGE = -15V, RG = 25Ω, L = 100µH

15

12

9

FIG. 17, CIRCUIT 1

6

CURRENT (A)

A

1

10

3

, PEAK COLLECTOR-EMITTER

CE

I

0

0

200100 300

VCE, COLLECTOR-EMITTER (V)

120

160

400 500

FIGURE 15. IGBT NORMALIZED TRANSIENT THERMAL

IMPEDANCE, JUNCTION TO CASE

Test Circuits

CIRCUIT 1

RG = 25Ω

L = 100µH

­V

CC

+

FIGURE 17. INDUCTIVE SWITCHING TEST CIRCUITS

= 350V

FIGURE 16. LATCHING CURRENT AS A FUNCTION OF

COLLECTOR-EMITTER VOLTAGE

CIRCUIT 2

D

= GSI TranZorb

1

RG = 25Ω

L = 100µH

D

1

C

1

5

-

VCC = 350V

+

HGTD8P50G1, HGTD8P50G1S

Operating Frequency Information

Operating frequency information for a typical device (Figure

10) is presented as a guide for estimating device performance
for a specific application. Other typical frequency vs collector
current (I
for a typical unit in Figure 7, Figure 8 and Figure 9. The oper­ating frequency plot (Figure 10) of a typical device shows
f

MAX1

mation is based on measurements of a typical device and is
bounded by the maximum rated junction temperature.

f

MAX1

(the denominator) has been arbitrarily held to 10% of the on­state time for a 50% duty factor. Other definitions are
possible. t
point of the trailing edge of the input pulse and the point
where the collector current falls to 90% of its maximum
value. Device Turn-Off delay can establish an additional fre­quency limiting condition for an application other than T
t

D(OFF)I

lightly loaded condition. f
P

)/E

C

(T

JMAX

tion losses must not exceed Pd. A 50% duty factor was used
(Figure 10) and the conduction losses (Pc) are approximated
by Pc = (V
instantaneous power loss starting at the trailing edge of the
input pulse and ending at the point where the collector
current equals zero (I

The switching power loss (Figure 10) is defined as f
E

OFF

they can be greatly influenced by external circuit conditions
and components.

) plots are possible using the information shown

CE

or f

is defined by f

whichever is smaller at each point. The infor-

MAX2

= 0.05/t

MAX1

is defined as the time between the 90%

D(OFF)I

D(OFF)I

. t

D(OFF)I

deadtime

JMAX

is important when controlling output ripple under a

is defined by f

. The allowable dissipation (PD) is defined by PD =

OFF

- TC)/R

. The sum of device switching and conduc-

θJC

• ICE)/2. E

CE

MAX2

is defined as the integral of the

OFF

= 0A).

CE

MAX2

= (PD -

MAX2

. Turn-On switching losses are not included because

Handling Precautions for IGBTs

Insulated Gate Bipolar Transistors are susceptible to gate­insulation damage by the electrostatic discharge of energy
through the devices. When handling these devices, care
should be exercised to assure that the static charge built in
the handler’s body capacitance is not discharged through
the device. With proper handling and application procedures,
however, IGBTs are currently being extensively used in
production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:

1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “†ECCOSORBD LD26” or equivalent.

2. When devices are removed by hand from their carriers,

.

the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.

3. Tips of soldering irons should be grounded.

4. Devices should never be inserted into or removed from
circuits with power on.

5. Gate Voltage Rating - Never exceed the gate-voltage
rating of V
manent damage to the oxide layer in the gate region.

6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate open-

•

circuited or floating should be avoided. These conditions
can result in Turn-On of the device due to voltage buildup
on the input capacitor due to leakage currents or pickup.

7. Gate Protection - These devices do not have an internal
monolithic zener diode from gate to emitter. If gate
protection is required an external zener is recommended.

†

Trademark Emerson and Cumming, Inc.

. Exceeding the rated VGE can result in per-

GEM

HARRIS SEMICONDUCTOR IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS:

4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,567,641
4,587,713 4,598,461 4,605,948 4,618,872 4,620,211 4,631,564 4,639,754 4,639,762
4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690
4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606
4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951
4,969,027

6

HGTD8P50G1, HGTD8P50G1S

TO-251AA

3 LEAD JEDEC TO-251AA PLASTIC PACKAGE

D

L

H

1

L

1

E

b

2

b

123

e

e

1

Lead 1 Gate

Lead 2 Collector

Lead 3 Emitter

Term. 4 Collector

b

1

A

A

1

TERM. 4

SEATING
PLANE

SYMBOL

A 0.086 0.094 2.19 2.38 -

A

1

b 0.028 0.032 0.72 0.81 3, 4

b

1

b

2

INCHES MILLIMETERS

NOTESMIN MAX MIN MAX

0.018 0.022 0.46 0.55 3, 4

0.033 0.040 0.84 1.01 3

0.205 0.215 5.21 5.46 3, 4

c 0.018 0.022 0.46 0.55 3, 4
D 0.270 0.290 6.86 7.36 ­E 0.250 0.265 6.35 6.73 -

c

J

1

e 0.090 TYP 2.28 TYP 5

e

1

H

1

J

1

0.180 BSC 4.57 BSC 5

0.035 0.045 0.89 1.14 -

0.040 0.045 1.02 1.14 6

L 0.355 0.375 9.02 9.52 -

L

1

0.075 0.090 1.91 2.28 2

NOTES:

1. These dimensions are within allowable dimensions of Rev. C of
JEDEC TO-251AA outline dated 9-88.

2. Solder finish uncontrolled in this area.

3. Dimension (without solder).

4. Add typically 0.002 inches (0.05mm) for solder plating.

5. Position of lead to be measured 0.250 inches (6.35mm) from bot­tom of dimension D.

6. Position of lead to be measured 0.100 inches (2.54mm) from bot­tom of dimension D.

7. Controlling dimension: Inch.

8. Revision 2 dated 10-95.

7

HGTD8P50G1, HGTD8P50G1S

TO-252AA

SURFACE MOUNT JEDEC TO-252AA PLASTIC PACKAGE

H

1

D

13

b

TERM. 4

b

3

BACK VIEW

E

b

2

L

2

b

1

e

e

1

L

3

0.070 (1.8)

0.063 (1.6)

0.090 (2.3)

MINIMUM PAD SIZE RECOMMENDED FOR
SURFACE-MOUNTED APPLICATIONS

Lead 1 Gate

Lead 3 Source

A

A

1

L

c

J

1

0.265
(6.7)

SEATING
PLANE

L

1

0.265 (6.7)

0.118 (3.0)

0.063 (1.6)

0.090 (2.3)

INCHES MILLIMETERS

SYMBOL

NOTESMIN MAX MIN MAX

A 0.086 0.094 2.19 2.38 -

A

1

0.018 0.022 0.46 0.55 4, 5

b 0.028 0.032 0.72 0.81 4, 5

b

1

b

2

b

3

0.033 0.040 0.84 1.01 4

0.205 0.215 5.21 5.46 4, 5

0.190 - 4.83 - 2

c 0.018 0.022 0.46 0.55 4, 5
D 0.270 0.290 6.86 7.36 ­E 0.250 0.265 6.35 6.73 -

e 0.090 TYP 2.28 TYP 7

e

1

H

1

J

1

0.180 BSC 4.57 BSC 7

0.035 0.045 0.89 1.14 -

0.040 0.045 1.02 1.14 -

L 0.100 0.115 2.54 2.92 -

L

1

L

2

L

3

0.020 - 0.51 - 4, 6

0.025 0.040 0.64 1.01 3

0.170 - 4.32 - 2

NOTES:

1. These dimensions are within allowable dimensions of Rev. B of
JEDEC TO-252AA outline dated 9-88.

2. L3 and b3 dimensions establish a minimum mounting surface for
terminal 4.

3. Solder finish uncontrolled in this area.

4. Dimension (without solder).

5. Add typically 0.002 inches (0.05mm) for solder plating.

6. L1 is the terminal length for soldering.

7. Position of lead to be measured 0.090 inches (2.28mm) from bottom
of dimension D.

8. Controlling dimension: Inch.

9. Revision 5 dated 10-95.

Term. 4 Collector

8

TO-252AA

16mm TAPE AND REEL

HGTD8P50G1, HGTD8P50G1S

330mm

22.4mm

13mm

50mm

16.4mm

COVER TAPE

1.5mm

DIA. HOLE

16mm

4.0mm

8.0mm

USER DIRECTION OF FEED

GENERAL INFORMATION

1. USE "9A" SUFFIX ON PART NUMBER.

2. 2500 PIECES PER REEL.

3. ORDER IN MULTIPLES OF FULL REELS ONLY.

4. MEETS EIA-481 REVISION "A" SPECIFICATIONS.

2.0mm

1.75mm

C

L

Revision 5 dated 10-95

All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Harris Semiconductor products are sold by description only. Harris Semiconductor reser ves the right to make changes in circuit design and/or specifications at
any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is
believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other
rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.

Sales Office Headquarters

For general information regarding Harris Semiconductor and its products, call 1-800-4-HARRIS

NORTH AMERICA

Harris Semiconductor
P. O. Box 883, Mail Stop 53-210
Melbourne, FL 32902
TEL: [phone]
[phone]
FAX: [phone]

EUROPE

Harris Semiconductor
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: [phone]
FAX: [phone]

SEMICONDUCTOR

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ASIA

Harris Semiconductor PTE Ltd.
No. 1 Tannery Road
Cencon 1, #09-01
Singapore 1334
TEL: [phone]
FAX: [phone]