Datasheet HGTP7N60A4, HGTG7N60A4, HGTD7N60A4S, HGT1S7N60A4S Datasheet (Intersil Corporation)

TM

HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4,

HGTP7N60A4

Data Sheet June 2000

600V, SMPS Series N-Channel IGBT

The HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4 and
HGTP7N60A4 are MOS gated high voltage switching
devices combining the best features of MOSFETs and
bipolar transistors. These devices have the high input
impedance of a MOSFET and the low on-state conduction
loss of a bipolar transistor. The much lower on-state voltage
drop varies only moderately between 25

o

C and 150oC.

This IGBT is ideal for many high voltage switching
applications operating at high frequencies where low
conduction losses are essential. This device has been
optimized for high frequency switch mode power supplies.

Formerly Developmental Type TA49331.

Ordering Information

PART NUMBER PACKAGE BRAND

HGTD7N60A4S TO-252AA 7N60A4
HGT1S7N60A4S TO-263AB 7N60A4
HGTG7N60A4 TO-247 7N60A4
HGTP7N60A4 TO-220AB 7N60A4

NOTE: When ordering, use the entirepart number.Addthesuffix9A
to obtain the TO-252AA and TO-263AB variant in tape and reel,
e.g., HGTD7N60A4S9A.

File Number 4826.2

Features

• >100kHz Operation at 390V, 7A

• 200kHz Operation at 390V, 5A

• 600V Switching SOA Capability

• Typical Fall Time

. . . . . . . . . . . . . . . . . . . .75ns at T

• Low Conduction Loss

• Temperature Compensating SABER™ Model
www.intersil.com

Symbol

C

G

E

= 125oC

J

Packaging

JEDEC STYLE TO-247 JEDEC TO-220AB

E

C

G

COLLECTOR
(FLANGE)

JEDEC TO-252AA JEDEC TO-263AB

G

E

INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS

4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713
4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637
4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986
4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767
4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027

COLLECTOR
(FLANGE)

G

E

E

C

COLLECTOR
(FLANGE)

COLLECTOR
(FLANGE)

G

2-1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000

SABER™ is a trademark of Analogy, Inc. | 1-888-INTERSIL or 321-724-7143

HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

ALL TYPES UNITS

Collector to Emitter Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BV

CES

600 V

Collector Current Continuous

At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

C25

C110

CM

GES

GEM

34 A
14 A
56 A

±20 V
±30 V

Switching Safe Operating Area at TJ = 150oC, Figure 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . .SSOA 35A at 600V

Single Pulse Avalanche Energy at TC = 25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E

Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P

AS

D

25mJ at 7A

125 W

Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 W/oC

Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

STG

-55 to 150

Maximum Lead Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

Package Body for 10s, See Tech Brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

PKG

300

260

o

C

o

C

o

C

NOTE:

1. Pulse width limited by maximum junction temperature.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

J

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Collector to Emitter Breakdown Voltage BV
Emitter to Collector Breakdown Voltage BV
Collector to Emitter Leakage Current I

Collector to Emitter Saturation Voltage V

Gate to Emitter Threshold Voltage V
Gate to Emitter Leakage Current I

CES
ECS

CES

CE(SAT)IC

GE(TH)

GES

Switching SOA SSOA T

IC = 250µA, VGE = 0V 600 - - V
IC = 10mA, VGE= 0V 20 - - V
VCE = 600V TJ = 25oC - - 250 µA

= 125oC--2mA

T

J

= 7A,

VGE = 15V

TJ = 25oC - 1.9 2.7 V

= 125oC - 1.6 2.2 V

T

J

IC = 250µA, VCE = 600V 4.5 5.9 7.0 V
VGE = ±20V - - ±250 nA

= 150oC, RG = 25Ω, VGE = 15V

J

35 - - A

L = 100µH, VCE= 600V
Pulsed Avalanche Energy E
Gate to Emitter Plateau Voltage V
On-State Gate Charge Q

Current Turn-On Delay Time t

d(ON)I

Current Rise Time t
Current Turn-Off Delay Time t

d(OFF)I

Current Fall Time t
Turn-On Energy (Note 2) E
Turn-On Energy (Note 2) E
Turn-Off Energy (Note 3) E

AS

GEP

g(ON)

rI

fI
ON1
ON2
OFF

ICE = 7A, L = 500µH25--mJ
IC = 7A, VCE = 300V - 9.0 - V
IC = 7A,

VCE = 300V
IGBT and Diode at TJ = 25oC

ICE = 7A
VCE = 390V
VGE = 15V
RG= 25Ω
L = 1mH
Test Circuit (Figure 20)

VGE = 15V - 37 45 nC
V

= 20V - 48 60 nC

GE

-11- ns

-11- ns

- 100 - ns

-45- ns

-55- µJ

- 120 150 µJ

-6075µJ

2-2

HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4

Electrical Specifications T

= 25oC, Unless Otherwise Specified (Continued)

J

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Current Turn-On Delay Time t

d(ON)I

Current Rise Time t
Current Turn-Off Delay Time t

d(OFF)I

Current Fall Time t
Turn-On Energy (Note 2) E
Turn-On Energy (Note 2) E
Turn-Off Energy (Note 3) E
Thermal Resistance Junction To Case R

rI

fI
ON1
ON2
OFF

θJC

IGBT and Diode at TJ = 125oC
ICE = 7A
VCE = 390V
VGE = 15V
RG= 25Ω
L = 1mH
Test Circuit (Figure 20)

-10- ns

-7-ns

- 130 150 ns

-7585ns

-50- µJ

- 200 215 µJ

- 125 170 µJ

- - 1.0

NOTES:

2. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. E

is the turn-on loss of the IGBT only. E

ON1

is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in
Figure 20.

3. Turn-Off Energy Loss (E

) is defined as the integral of the instantaneouspower loss starting at the trailing edge of the input pulse and ending

OFF

at the point where the collector current equals zero (ICE= 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement
of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.

Typical Performance Curves Unless Otherwise Specified

35

VGE= 15V

30

25

40

TJ= 150oC, RG = 25Ω, VGE= 15V, L = 100µH

30

o

C/W

ON2

20

15

10

, DC COLLECTOR CURRENT (A)

5

CE

I

0

25 75 100 125 150

50

TC, CASE TEMPERATURE (oC)

FIGURE 1. DC COLLECTOR CURRENT vs CASE

TEMPERATURE

500

200

100

f

= 0.05 / (t

MAX1

= (PD- PC) / (E

f

MAX2

PC = CONDUCTION DISSIPATION

, OPERATING FREQUENCY (kHz)

MAX

f

30

(DUTY FACTOR = 50%)

R

= 1.0oC/W, SEE NOTES

ØJC

TJ= 125oC, RG = 25Ω, L = 2mH, VCE= 390V

1

, COLLECTOR TO EMITTER CURRENT (A)

I

CE

d(OFF)I

+ t

ON2

d(ON)I

+ E

OFF

)

)

TCV

o

75

C

15V

FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO

EMITTER CURRENT

GE

20

10

, COLLECTOR TO EMITTER CURRENT (A)

CE

0

I

0

VCE, COLLECTOR TO EMITTER VOLTAGE (V)

300 400200100 500 600

700

FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA

VCE = 390V, RG = 25Ω, TJ= 125oC

14

I

12

10

8

6

20510

, SHORT CIRCUIT WITHSTAND TIME (µs)

4

SC

t

10

11 12 15

VGE, GATE TO EMITTER VOLTAGE (V)

SC

t

SC

13 14

14016

120

100

80

60

40

, PEAK SHORT CIRCUIT CURRENT (A)

SC

I

20

FIGURE 4. SHORT CIRCUIT WITHSTAND TIME

2-3

HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4

Typical Performance Curves Unless Otherwise Specified (Continued)

30

DUTY CYCLE < 0.5%, V
PULSE DURATION = 250µs

25

20

15

10

5

, COLLECTOR TO EMITTER CURRENT (A)

CE

I

0

0 1.0

0.5 2.5

V

, COLLECTOR TO EMITTER VOLTAGE (V)

CE

GE

TJ = 150oC

= 12V

TJ = 125oC

TJ = 25oC

1.5 2.0 3.0

30

DUTY CYCLE < 0.5%, VGE = 15V
PULSE DURATION = 250µs

25

20

15

10

5

, COLLECTOR TO EMITTER CURRENT (A)

CE

0

I

0 1.0 1.5 2.0 3.00.5 2.5

VCE, COLLECTOR TO EMITTER VOLTAGE (V)

TJ = 125oC

TJ = 150oC TJ = 25oC

FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE

, TURN-ON ENERGY LOSS (µJ)

ON2

E

500

RG = 25Ω, L = 1mH, VCE = 390V

400

TJ = 125oC, VGE = 12V, VGE = 15V

300

200

100

0

0

ICE, COLLECTOR TO EMITTER CURRENT (A)

4268101214

TJ = 25oC, VGE = 12V, VGE = 15V

350

RG = 25Ω, L = 1mH, VCE = 390V

300

250

200

TJ = 125oC, VGE = 12V OR 15V

150

100

, TURN-OFF ENERGY LOSS (µJ)

50

OFF

E

0

I

, COLLECTOR TO EMITTER CURRENT (A)

CE

TJ = 25oC, VGE = 12V OR 15V

42 6 8 1012140

FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO

EMITTER CURRENT

16

RG = 25Ω, L = 1mH, VCE = 390V

TJ = 25oC, VGE = 12V

14

12

, TURN-ON DELAY TIME (ns)

10

d(ON)I

t

8

ICE, COLLECTOR TO EMITTER CURRENT (A)

42 6 8 1012140

TJ = 125oC, VGE = 12V

TJ = 25oC, VGE = 15V

TJ = 125oC, VGE = 15V

FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO

EMITTER CURRENT

2-4

FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO

EMITTER CURRENT

40

RG = 25Ω, L = 1mH, VCE = 390V

TJ = 25oC, VGE= 12V, VGE= 15V

TJ = 125oC, VGE= 12V, VGE= 15V

42681012140

ICE, COLLECTOR TO EMITTER CURRENT (A)

, RISE TIME (ns)

rI

t

30

20

10

0

FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO

EMITTER CURRENT

HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4

Typical Performance Curves Unless Otherwise Specified (Continued)

180

RG = 25Ω, L = 1mH,

160

140

120

100

, TURN-OFF DELAY TIME (ns)

80

d(OFF)I

t

60

, COLLECTOR TO EMITTER CURRENT (A)

I

CE

VCE = 390V

VGE = 15V, TJ = 125oC

VGE = 12V, TJ = 125oC

VGE = 15V, TJ = 25oC

VGE = 12V, TJ = 25oC

42 6 8 1012140

FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO

EMITTER CURRENT

120

DUTY CYCLE < 0.5%, VCE = 10V
PULSE DURATION = 250µs

100

TJ = 25oC

80

60

40

TJ = 125oC TJ = -55oC

90

RG = 25Ω, L = 1mH, VCE = 390V

80

, FALL TIME (ns)

fI

t

70

60

50

40

30

20

ICE, COLLECTOR TO EMITTER CURRENT (A)

TJ = 125oC, VGE = 12V OR 15V

TJ = 25oC, VGE = 12V OR 15V

42 6 8 1012140

FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER

CURRENT

15

I

= 1mA, RL = 43Ω, TJ = 25oC

G(REF)

12

9

6

VCE = 600V

VCE = 400V

VCE = 200V

20

, COLLECTOR TO EMITTER CURRENT (A)

0

CE

I

7

8 9 11 12 15

, GATE TO EMITTER VOLTAGE (V)

V

GE

FIGURE 13. TRANSFER CHARACTERISTIC FIGURE 14. GATE CHARGE WAVEFORMS

800

RG = 25Ω, L = 1mH, VCE = 390V, VGE = 15V

E

= E

TOTAL

600

400

200

, TOTAL SWITCHING ENERGY LOSS (µJ)

0

TOTAL

E

+ E

ON2

OFF

ICE = 14A

ICE = 7A

ICE = 3.5A

50 75 100

, CASE TEMPERATURE (oC)

T

C

FIGURE 15. TOTAL SWITCHING LOSS vs CASE

TEMPERATURE

1310

14

12525 150

3

, GATE TO EMITTER VOLTAGE (V)

GE

V

0

, TOTAL SWITCHING ENERGY LOSS (mJ)

0.1

TOTAL

E

5101520 3025 35 40

0

QG, GATE CHARGE (nC)

10

TJ = 125oC, L = 1mH, VCE = 390V, VGE = 15V

E

= E

TOTAL

1

10 1000

+ E

ON2

OFF

ICE = 14A

ICE = 7A

ICE = 3.5A

100

, GATE RESISTANCE (Ω)

R

G

FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE

2-5

HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4

Typical Performance Curves Unless Otherwise Specified (Continued)

1.4
FREQUENCY = 1MHz

1.2

1.0

0.8

0.6

0.4

C, CAPACITANCE (nF)

0.2

0

0 20406080100

C

IES

C

OES

C

RES

VCE, COLLECTOR TO EMITTER VOLTAGE (V)

FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER

VOLTAGE

0

10

0.5

2.8

2.6

2.4

2.2

2.0

, COLLECTOR TO EMITTER VOL TAGE (V)

CE

1.8

V

9

10 12

11 13 14 15 16

VGE, GATE TO EMITTER VOLTAGE (V)

DUTY CYCLE < 0.5%, TJ = 25oC
PULSE DURATION = 250µs,

ICE = 14A

ICE = 7A

ICE = 3.5A

FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE

vs GATE TO EMITTER VOLTAGE

0.2

0.1

-1

10

0.05

0.02

0.01

, NORMALIZED THERMAL RESPONSE

θJC

Z

-2

10

-5

10

SINGLE PULSE

-4

10

FIGURE 19. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE

Test Circuit and Waveforms

RHRP660

L = 1mH

RG = 25Ω

-3

10

t1, RECTANGULAR PULSE DURATION (s)

+

= 390V

V

DD

-

10

t

1

P

D

t

2

DUTY FACTOR, D = t1 / t
PEAK TJ = (PDX Z

-2

V

GE

V

CE

I

CE

-1

10

90%

t

d(OFF)I

10%

10

90%

E

OFF

t

fI

2

X R

10%

θJC

t

d(ON)I

t

rI

) + T

C

1

10

θJC

0

E

ON2

FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 21. SWITCHING TEST WAVEFORMS

2-6

HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4

Handling Precautions for IGBTs

Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
built in the handler’s body capacitance is not discharged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production bynumerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:

1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD LD26” or equivalent.

2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.

3. Tips of soldering irons should be grounded.

4. Devicesshould never be inserted into or removed from
circuits with power on.

5. Gate Voltage Rating - Neverexceedthe gate-voltage
rating of V
permanent damage to the oxide layer in the gate region.

6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate
open-circuited or floating should be avoided. These
conditions can result in turn-on of the device due to
voltage buildup on the input capacitor due to leakage
currents or pickup.

7. GateProtection - These devices do not have an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an externalZener is recommended.

. Exceeding the rated VGE can result in

GEM

Operating Frequency Information

Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (I
the information shown for a typical unit in Figures 5, 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows f

MAX1

or f

MAX2

point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.

f

is defined by f

MAX1

MAX1

= 0.05/(t
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
are possible. t

d(OFF)I

and t
Device turn-off delay can establish an additional frequency
limiting condition for an application other than T

f

is defined by f

MAX2

allowabledissipation (P

= (PD - PC)/(E

MAX2

) is defined by PD=(TJM-TC)/R

D

The sum of device switching and conduction losses must
not exceed P
the conduction losses (P
P

=(VCEx ICE)/2.

C

E

and E

ON2

shown in Figure 21. E

. A 50% duty factor was used (Figure 3) and

D

are defined in the switching waveforms

OFF

) are approximated by

C

is the integral of the

ON2

instantaneous power loss (I
E

is the integral of the instantaneous power loss

OFF

(I

CExVCE

calculation for E
(I

CE

) during turn-off. All tail losses are included in the

; i.e., the collector current equals zero

OFF

= 0).

) plots are possible using

CE

; whichever is smaller at each

+ t

d(OFF)I

are defined in Figure 21.

d(ON)I

OFF

x VCE) during turn-on and

CE

d(ON)I

JM

+ E

).

.

ON2

). The

θJC

.

2-7

ECCOSORBD™ is a trademark of Emerson and Cumming, Inc.

HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4

TO-247

3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE

E

Q

ØR

D

A

ØS

TERM. 4

ØP

SYMBOL

A 0.180 0.190 4.58 4.82 ­b 0.046 0.051 1.17 1.29 2, 3

b

1

b

2

INCHES MILLIMETERS

NOTESMIN MAX MIN MAX

0.060 0.070 1.53 1.77 1, 2

0.095 0.105 2.42 2.66 1, 2
c 0.020 0.026 0.51 0.66 1, 2, 3
D 0.800 0.820 20.32 20.82 -

L

1

L

b

1

b

2

c

b

2

1

e

3

e

1

J

1

3

BACK VIEW

2

1

E 0.605 0.625 15.37 15.87 ­e 0.219 TYP 5.56 TYP 4

e

1

J

1

0.438 BSC 11.12 BSC 4

0.090 0.105 2.29 2.66 5
L 0.620 0.640 15.75 16.25 -

L

1

0.145 0.155 3.69 3.93 1

ØP 0.138 0.144 3.51 3.65 -

Q 0.210 0.220 5.34 5.58 -

ØR 0.195 0.205 4.96 5.20 -

ØS 0.260 0.270 6.61 6.85 -

NOTES:

1. Lead dimension and finish uncontrolled in L1.

2. Lead dimension (without solder).

3. Add typically 0.002 inches (0.05mm) for solder coating.

4. Positionof lead tobemeasured 0.250inches(6.35mm) from bottom
of dimension D.

5. Positionof lead tobemeasured 0.100inches(2.54mm) from bottom
of dimension D.

6. Controlling dimension: Inch.

7. Revision 1 dated 1-93.

2-8

HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4

TO-252AA

SURFACE MOUNT JEDEC TO-252AA PLASTIC PACKAGE

H

1

D

13

b

TERM. 4

b

3

BACK VIEW

E

b

2

e

e

1

L

3

0.063 (1.6) TYP

0.090 (2.3) TYP
MINIMUM PAD SIZE RECOMMENDED FOR

SURFACE-MOUNTED APPLICATIONS

L

b

1

0.070 (1.8)

A

A

1

SEATING
PLANE

2

L

L

1

c

J

1

0.265
(6.7)

0.265 (6.7)

0.118 (3.0)

INCHES MILLIMETERS

SYMBOL

NOTESMIN MAX MIN MAX

A 0.086 0.094 2.19 2.38 -

A

1

0.018 0.022 0.46 0.55 4, 5

b 0.028 0.032 0.72 0.81 4, 5

b

1

b

2

b

3

0.033 0.045 0.84 1.14 4

0.205 0.215 5.21 5.46 4, 5

0.190 - 4.83 - 2
c 0.018 0.022 0.46 0.55 4, 5
D 0.270 0.295 6.86 7.49 ­E 0.250 0.265 6.35 6.73 ­e 0.090 TYP 2.28 TYP 7

e

1

H

1

J

1

0.180 BSC 4.57 BSC 7

0.035 0.045 0.89 1.14 -

0.040 0.045 1.02 1.14 ­L 0.100 0.115 2.54 2.92 -

L

1

L

2

L

3

0.020 - 0.51 - 4, 6

0.025 0.040 0.64 1.01 3

0.170 - 4.32 - 2

NOTES:

1. These dimensions are within allowable dimensions of Rev.B of
JEDEC TO-252AA outline dated 9-88.

2. L3and b3dimensions establish a minimum mounting surface for
terminal 4.

3. Solder finish uncontrolled in this area.

4. Dimension (without solder).

5. Add typically 0.002 inches (0.05mm) for solder plating.

6. L1 is the terminal length for soldering.

7. Positionof lead tobe measured 0.090inches (2.28mm) frombottom
of dimension D.

8. Controlling dimension: Inch.

9. Revision 11 dated 1-00.

TO-252AA

16mm TAPE AND REEL

DIA. HOLE

16mm

COVER TAPE

GENERAL INFORMATION

1. 2500 PIECES PER REEL.

2. ORDER IN MULTIPLES OF FULL REELS ONLY.

3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.

USER DIRECTION OF FEED

8.0mm

4.0mm1.5mm

2.0mm

330mm

1.75mm

C

L

22.4mm

13mm

50mm

16.4mm

2-9

HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4

TO-263AB SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE

D

L

H

1

13

b

TERM. 4

b

2

13

E

e

e1

L

3

(17.78)

0.080 TYP (2.03)

0.062 TYP (1.58)

MINIMUM PAD SIZE RECOMMENDED FOR

L

2

b

1

0.700

SURFACE-MOUNTED APPLICATIONS

A

0.450

(11.43)

A

1

TERM. 4

L

1

c

J

1

0.350
(8.89)

NOTES:

0.150
(3.81)

INCHES MILLIMETERS

SYMBOL

NOTESMIN MAX MIN MAX

A 0.170 0.180 4.32 4.57 -

A

1

0.048 0.052 1.22 1.32 4, 5

b 0.030 0.034 0.77 0.86 4, 5

b

1

b

2

0.045 0.055 1.15 1.39 4, 5

0.310 - 7.88 - 2
c 0.018 0.022 0.46 0.55 4, 5
D 0.405 0.425 10.29 10.79 ­E 0.395 0.405 10.04 10.28 ­e 0.100 TYP 2.54 TYP 7

e

1

H

1

J

1

0.200 BSC 5.08 BSC 7

0.045 0.055 1.15 1.39 -

0.095 0.105 2.42 2.66 ­L 0.175 0.195 4.45 4.95 -

L

1

L

2

L

3

0.090 0.110 2.29 2.79 4, 6

0.050 0.070 1.27 1.77 3

0.315 - 8.01 - 2

1. These dimensions are within allowable dimensions of Rev.C of
JEDEC TO-263AB outline dated 2-92.

2. L3and b2dimensions established a minimum mounting surface
for terminal 4.

3. Solder finish uncontrolled in this area.

4. Dimension (without solder).

5. Add typically 0.002 inches (0.05mm) for solder plating.

6. L1 is the terminal length for soldering.

7. Positionof leadtobe measured 0.120inches(3.05mm) frombottom
of dimension D.

8. Controlling dimension: Inch.

9. Revision 10 dated 5-99.

TO-263AB

24mm TAPE AND REEL

1.5mm

DIA. HOLE

24mm

GENERAL INFORMATION

1. 800 PIECES PER REEL.

2. ORDER IN MULTIPLES OF FULL REELS ONLY.

3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.

USER DIRECTION OF FEED

COVER TAPE

4.0mm

16mm

2.0mm

40mm MIN.
ACCESS HOLE

330mm

1.75mm

C

L

30.4mm

13mm

100mm

24.4mm

2-10

HGTD7N60A4S, HGT1S7N60A4S, HGTG7N60A4, HGTP7N60A4

TO-220AB

3 LEAD JEDEC TO-220AB PLASTIC PACKAGE

ØP

Q

D

E

1

L

1

E

H

1

D

1

b

1

A

A

1

SYMBOL

A 0.170 0.180 4.32 4.57 -

A

1

TERM. 4

o

45

b 0.030 0.034 0.77 0.86 3, 4

b

1

c 0.014 0.019 0.36 0.48 2, 3 , 4
D 0.590 0.610 14.99 15.49 -

D

1

INCHES MILLIMETERS

NOTESMIN MAX MIN MAX

0.048 0.052 1.22 1.32 -

0.045 0.055 1.15 1.39 2, 3

- 0.160 - 4.06 -

E 0.395 0.410 10.04 10.41 -

L

o

60

1

e

1

b

c

E

1

- 0.030 - 0.76 -

e 0.100 TYP 2.54 TYP 5

3

2

e

J

1

e

1

H

1

J

1

0.200 BSC 5.08 BSC 5

0.235 0.255 5.97 6.47 -

0.100 0.110 2.54 2.79 6

L 0.530 0.550 13.47 13.97 -

L

1

0.130 0.150 3.31 3.81 2

ØP 0.149 0.153 3.79 3.88 -

Q 0.102 0.112 2.60 2.84 -

NOTES:

1. These dimensions are within allowable dimensions of Rev.J of
JEDEC TO-220AB outline dated 3-24-87.

2. Lead dimension and finish uncontrolled in L1.

3. Lead dimension (without solder).

4. Add typically 0.002 inches (0.05mm) for solder coating.

5. Position of lead to be measured 0.250 inches (6.35mm) from bot­tom of dimension D.

6. Position of lead to be measured 0.100 inches (2.54mm) from bot­tom of dimension D.

7. Controlling dimension: Inch.

8. Revision 2 dated 7-97.

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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TEL: [phone]
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2-11

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