• Replaces DLT/R1040-ST1
Model Transmitters and
Receivers
Description
The HFBR-1116/-2116 series of
data links are high-performance,
cost-efficient, transmitter and
receiver modules for serial
optical data communication
applications specified at 155 MBd
for ATM UNI applications.
These modules are designed for
50 or 62.5 µm core multimode
optical fiber and operate at a
nominal wavelength of 1300 nm.
They incorporate our highperformance, reliable, longwavelength, optical devices and
proven circuit technology to give
long life and consistent
performance.
Transmitter
The transmitter utilizes a 1300 nm
surface-emitting InGaAsP LED,
packaged in an optical subassembly. The LED is dc-coupled to a
custom IC which converts
differential-input, PECL logic
signals, ECL-referenced (shifted)
to a +5 V power supply, into an
analog LED drive current.
Receiver
The receiver utilizes an InGaAs
PIN photodiode coupled to a
custom silicon transimpedance
preamplifier IC. The PINpreamplifier combination is accoupled to a custom quantizer IC
which provides the final pulse
shaping for the logic output and
the Signal Detect function. Both
the Data and Signal Detect
Outputs are differential. Also,
both Data and Signal Detect
Outputs are PECL compatible,
ECL-referenced (shifted) to a
+5 V power supply.
Package
The overall package concept for
the Data Links consists of the
following basic elements: two
optical subassemblies, two
electrical subassemblies, and the
outer housings as illustrated in
Figure 1.
*ST is a registered trademark of AT&T Lightguide Cable Connectors.
5965-3482E (8/96)
189
Page 2
DIFFERENTIAL
DATA IN
DIFFERENTIAL
SIGNAL
DETECT OUT
DIFFERENTIAL
DATA IN
V
BB
RECEIVER
QUANTIZER
IC
ELECTRICAL
SUBASSEMBLIES
TRANSMITTER
DRIVER IC
PREAMP IC
PIN PHOTODIODE
OPTICAL
SUBASSEMBLIES
LED
SIMPLEX ST
RECEPTACLE
The package outline drawing and
pinout are shown in Figures 2
and 3. The details of this package
outline and pinout are compatible
with other data-link modules from
®
other vendors.
The optical subassemblies consist
of a transmitter subassembly in
which the LED resides and a
receiver subassembly housing the
PIN-preamplifier combination.
TOP VIEW
Figure 1. Transmitter and Receiver Block Diagram.
8.31
41 MAX.
5.05
5.0
7.01
2.45
19.72
THREADS
3/8 – 32 UNEF-2A
HFBR-111X/211XT
DATE CODE (YYWW)
SINGAPORE
12.19
MAX.
0.9
The electrical subassemblies consist of a multi-layer printed circuit
board on which the IC chips and
various surface-mounted, passive
circuit elements are attached.
9.8 MAX.
3
NOTES:
1. MATERIAL ALLOY 194 1/2H – 0.38 THK
FINISH MATTE TIN PLATE 7.6 µm MIN.
2. MATERIAL PHOSPHOR BRONZE WITH
120 MICROINCHES TIN LEAD (90/10)
OVER 50 MICROINCHES NICKEL.
3. UNITS = mm
Figure 2. Package Outline Drawing.
190
12
17.78
(7 x 2.54)
8 x 7.62
HOUSING PINS 0.38 x 0.5 mm
NOTE 1
PCB PINS
DIA. 0.46 mm
NOTE 2
Page 3
NC
GND
V
CC
V
CC
GND
DATA
DATA
NC
OPTICAL PORT
9NC
8
10NO PIN
7
11GND
6
12GND
5
13GND
4
14GND
3
15V
2
BB
16NC
1
NC
NO PIN
GND
GND
GND
SD
SD
NO PIN
OPTICAL PORT
9NC
8
10GND
7
11V
6
CC
12V
5
CC
13V
4
CC
14DATA
3
15DATA
2
16NC
1
12
10
8
6
4
2
OPTICAL POWER BUDGET (dB)
0
Figure 4. Optical Power Budget at
BOL vs. Fiber Optic Cable Length.
62.5/125 µm
50/125 µm
0.5
01.01.5
0.32.0
FIBER OPTIC CABLE LENGTH (km)
2.5
TRANSMITTER
Figure 3. Pinout Drawing.
Each transmitter and receiver
package includes an internal shield
for the electrical subassembly to
ensure low EMI emissions and high
immunity to external EMI fields.
The outer housing, including the
ST* port, is molded of filled, nonconductive plastic to provide
mechanical strength and electrical
isolation. For other port styles,
please contact your HewlettPackard Sales Representative.
Each data-link module is attached
to a printed circuit board via the
16-pin DIP interface. Pins 8 and 9
provide mechanical strength for
these plastic-port devices and will
provide port-ground for forthcoming metal-port modules.
Application Information
The Applications Engineering
group of the Optical Communication Division is available to assist
you with the technical understanding and design tradeoffs associated
with these transmitter and receiver
modules. You can contact them
through your Hewlett-Packard
sales representative.
RECEIVER
The following information is
provided to answer some of the
most common questions about the
use of these parts.
Transmitter and Receiver
Optical Power Budget
versus Link Length
The Optical Power Budget (OPB)
is the available optical power for a
fiber-optic link to accommodate
fiber cable losses plus losses due to
in-line connectors, splices, optical
switches, and to provide margin for
link aging and unplanned losses
due to cable plant reconfiguration
or repair.
Figure 4 illustrates the predicted
OPB associated with the transmitter and receiver specified in this
data sheet at the Beginning of Life
(BOL). This curve represents the
attenuation and chromatic plus
modal dispersion losses associated
with 62.5/125 µm and 50/125 µm
fiber cables only. The area under
the curve represents the remaining
OPB at any link length, which is
available for overcoming non-fiber
cable related losses.
*ST is a registered trademark of AT&T Lightguide Cable Connectors.
191
Page 4
Transmitter and Receiver
Signaling Rate Range and
BER Performance
For purposes of definition, the
symbol rate (Baud), also called
signaling rate, is the reciprocal of
the symbol time. Data rate (bits/
sec) is the symbol rate divided by
the encoding factor used to encode
the data (symbols/bit).
When used in 115 Mbps SONET
OC-3 applications, the performance of Hewlett-Packard’s
1300 nm data link modules, HFBR1116/-2116, is guaranteed to the
full conditions listed in the individual product specification tables.
The data link modules may be used
for other applications at signaling
rates different than the 155 Mbps
with some variation in the link
optical power budget. Figure 5
gives an indication of the typical
performance of these 1300 nm
products at different rates.
2.5
2.0
1.5
1.0
0.5
0
0.5
0200
2575 100 125
POWER BUDGET AT CONSTANT BER (dB)
TRANSMITTER/RECEIVER RELATIVE OPTICAL
CONDITIONS:
1. PRBS 2
2. DATA SAMPLED AT CENTER OF DATA SYMBOL.
3. BER = 10
4. TA = 25° C
5. V
= 5 Vdc
CC
6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
Figure 5. Transmitter/Receiver
Relative Optical Power Budget at
Constant BER vs. Signaling Rate.
50150
SIGNAL RATE (MBd)
7
-1
-6
175
These data link modules can also
be used for applications which
require different bit-error-ratio
(BER) performance. Figure 6
illustrates the typical trade-off
between link BER and the receiver
input optical power level.
-2
1 x 10
-3
1 x 10
-4
1 x 10
-5
1 x 10
-6
1 x 10
-7
1 x 10
-8
1 x 10
BIT ERROR RATIO
-9
1 x 10
-10
1 x 10
-11
1 x 10
-12
1 x 10
-64
RELATIVE INPUT OPTICAL POWER – dB
CONDITIONS:
1. 155 MBd
2. PRBS 2
= 25° C
3. T
A
4. V
CC
5. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
Figure 6. Bit Error Ratio vs. Relative
Receiver Input Optical Power.
CENTER OF SYMBOL
-42-2
7
-1
= 5 Vdc
0
Data Link Jitter
Performance
The Hewlett-Packard 1300 nm data
link modules are designed to
operate per the system jitter
allocations stated in Table B1 of
Annex B of the ANSI T1E1.2
Revision 3 standard.
The 1300 nm transmitter will
tolerate the worst-case input
electrical jitter allowed in Annex B
without violating the worst-case
output jitter requirements.
The 1300 nm receiver will tolerate
the worst-case input optical jitter
allowed in Annex B without
violating the worst-case output
electrical jitter allowed.
The jitter specifications stated in
the following transmitter and
receiver specification table are
derived from the values in Table
B1 of Annex B. They represent the
worst-case jitter contribution that
the transmitter and receiver are
allowed to make to the overall
system jitter without violating the
Annex B allocation example. In
practice, the typical jitter
contribution of the HewlettPackard data link modules is well
below the maximum allowed
amounts.
Recommended Handling
Precautions
It is advised that normal static precautions be taken in the handling
and assembly of these data link
modules to prevent damage which
may be induced by electrostatic
discharge (ESD). The HFBR-1116/2116 series meets MIL-STD-883C
Method 3015.4 Class 2.
Care should be taken to avoid
shorting the receiver Data or
Signal Detect Outputs directly to
ground without proper currentlimiting impedance.
Solder and Wash Process
Compatibility
The transmitter and receiver are
delivered with protective process
caps covering the individual ST*
ports. These process caps protect
the optical subassemblies during
wave solder and aqueous wash
processing and act as dust covers
during shipping.
These data link modules are
compatible with either industry
standard wave- or hand-solder
processes.
192
Page 5
Shipping Container
The data link modules are
packaged in a shipping container
designed to protect it from
mechanical and ESD damage
during shipment or storage.
Board Layout–Interface
Circuit and Layout
Guidelines
It is important to take care in the
layout of your circuit board to
achieve optimum performance
from these data link modules.
Figure 7 provides a good example
of a power supply filter circuit that
works well with these parts. Also,
suggested signal terminations for
the Data, Data-bar, Signal Detect
and Signal Detect-bar lines are
shown. Use of a multilayer,
ground-plane printed circuit board
will provide good high-frequency
circuit performance with a low
inductance ground return path. See
additional recommendations noted
in the interface schematic shown in
Figure 7.
Tx
*
130
9 NC
10 GND
11 V
12 V
13 GND
14 D
15 D
R1
16 NC
A
L2
R3
R2
82
82
C5
0.1
TERMINATE D, D
AT Tx INPUTS
1
C2
0.1
R4
130
+5 Vdc
GND
DATA
DATA
NOTES:
1. RESISTANCE IS IN OHMS. CAPACITANCE IS IN MICROFARADS. INDUCTANCE IS IN MICROHENRIES.
2. TERMINATE TRANSMITTER INPUT DATA AND DATA-BAR AT THE TRANSMITTER INPUT PINS. TERMINATE THE RECEIVER OUTPUT DATA, DATA-BAR, AND SIGNAL DETECTBAR AT THE FOLLOW-ON DEVICE INPUT PINS. FOR LOWER POWER DISSIPATION IN THE SIGNAL DETECT TERMINATION CIRCUITRY WITH SMALL COMPROMISE TO THE
SIGNAL QUALITY, EACH SIGNAL DETECT OUTPUT CAN BE LOADED WITH 510 OHMS TO GROUND INSTEAD OF THE TWO RESISTOR, SPLIT-LOAD PECL TERMINATION
SHOWN IN THIS SCHEMATIC.
3. MAKE DIFFERENTIAL SIGNAL PATHS SHORT AND OF SAME LENGTH WITH EQUAL TERMINATION IMPEDANCE.
4. SIGNAL TRACES SHOULD BE 50 OHMS MICROSTRIP OR STRIPLINE TRANSMISSION LINES. USE MULTILAYER, GROUND-PLANE PRINTED CIRCUIT BOARD FOR BEST HIGHFREQUENCY PERFORMANCE.
5. USE HIGH-FREQUENCY, MONOLITHIC CERAMIC BYPASS CAPACITORS AND LOW SERIES DC RESISTANCE INDUCTORS. RECOMMEND USE OF SURFACE-MOUNT COIL
INDUCTORS AND CAPACITORS. IN LOW NOISE POWER SUPPLY SYSTEMS, FERRITE BEAD INDUCTORS CAN BE SUBSTITUTED FOR COIL INDUCTORS. LOCATE POWER
SUPPLY FILTER COMPONENTS CLOSE TO THEIR RESPECTIVE POWER SUPPLY PINS. C7 IS AN OPTIONAL BYPASS CAPACITOR FOR IMPROVED, LOW-FREQUENCY NOISE
POWER SUPPLY FILTER PERFORMANCE.
6. DEVICE GROUND PINS SHOULD BE DIRECTLY AND INDIVIDUALLY CONNECTED TO GROUND.
7. CAUTION: DO NOT DIRECTLY CONNECT THE FIBER-OPTIC MODULE PECL OUTPUTS (DATA, DATA-BAR, SIGNAL DETECT, SIGNAL DETECT-BAR, V
PROPER CURRENT LIMITING IMPEDANCE.
8. (*) OPTIONAL METAL ST OPTICAL PORT TRANSMITTER AND RECEIVER MODULES WILL HAVE PINS 8 AND 9 ELECTRICALLY CONNECTED TO THE METAL PORT ONLY AND
NOT CONNECTED TO THE INTERNAL SIGNAL GROUND.
CC
CC
NC 8
PIN
GND 6
GND 5
GND 4
GND 3
V
NO
BB
NC 1
*
7
2
*
TOP VIEWS
9 NC
NO
10
PIN
11 GND
12 GND
13 GND
14 SD
15 SD
NO
16
PIN
Rx
CC
CC
CC
D 3
D
NC 1
*
6
0.1
C1
0.1
C6
R10
130
5
4
2
L1
1
C7
10
(OPTIONAL)
R9
82
R11
82
R12
130
TERMINATE D, D, SD, SD AT
INPUTS OF FOLLOW-ON DEVICES
C3
0.1C410
R8
R5
R7
82
130
82
) TO GROUND WITHOUT
BB
SD
NC 8
GND 7
V
V
V
130
A
DATA
DATA
R6
SD
Figure 7. Recommended Interface Circuitry and Power Supply Filter Circuits.
193
Page 6
Board Layout–Hole
Pattern
The Hewlett-Packard transmitter
and receiver hole pattern is
compatible with other data link
modules from other vendors. The
drawing shown in Figure 8 can be
used as a guide in the mechanical
layout of your circuit board.
17.78
.700
(16X)
0.8 ± 0.1
ø
.032 ± .004
Ø 0.000
–A–
MA
(7X)
7.62
.300
Figure 8. Recommended Board Layout Hole Pattern.
TOP VIEW
2.54
.100
UNITS = mm/INCH
194
Page 7
Regulatory Compliance
These data link modules are
intended to enable commercial
system designers to develop
equipment that complies with the
various international regulations
governing certification of Information Technology Equipment.
Additional information is available
from your Hewlett-Packard sales
representative.
All HFBR-1116T LED transmitters
are classified as IEC-825-1
Accessible Emission Limit (AEL)
Class 1 based upon the current
proposed draft scheduled to go
into effect on January 1, 1997. AEL
Class 1 LED devices are
considered eye safe. See
Application Note 1094, LED
Device Classifications with
Respect to AEL Values as
Defined in the IEC 825-1
Standard and the European
EN60825-1 Directive.
The material used for the housing
in the HFBR-1116/-2116 series is
Ultem 2100 (GE). Ultem 2100 is
recognized for a UL flammability
rating of 94V-0 (UL File Number
E121562) and the CSA (Canadian
Standards Association) equivalent
(File Number LS88480).
200
180
1.0
160
1.5
140
2.0
2.5
120
3.0
SPECTRAL WIDTH (FWHM) –nm
100
∆λ – TRANSMITTER OUTPUT OPTICAL
1260
λC – TRANSMITTER OUTPUT OPTICAL
CENTER WAVELENGTH –nm
HFBR-1116T TRANSMITTER TEST RESULTS
, ∆λ AND t
OF λ
C
COMPLY WITH THE ALLOWED SPECTRAL WIDTH
AS A FUNCTION OF CENTER WAVELENGTH FOR
VARIOUS RISE AND FALL TIMES.
t
– TRANSMITTER
r/f
OUTPUT OPTICAL
RISE/FALL TIMES – ns
1280 1300 1320
ARE CORRELATED AND
r/f
3.0
Figure 9. HFBR-1116T Transmitter
Output Optical Spectral Width
(FWHM) vs. Transmitter Output
Optical Center Wavelength and Rise/
Fall Times.
5
4
3
2
1
0
RELATIVE INPUT OPTICAL POWER (dB)
-3-101
-22
EYE SAMPLING TIME POSITION (ns)
CONDITIONS:
= 25° C
1.T
A
= 5 Vdc
2. V
CC
3. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.
4. INPUT OPTICAL POWER IS NORMALIZED TO
CENTER OF DATA SYMBOL.
5. NOTE 15 AND 16 APPLY.
13601340
3
Figure 10. HFBR-2116T Receiver
Input Optical Power vs. Eye Sampling
Time Position.
195
Page 8
HFBR-1116T Transmitter Pin-Out Table
PinSymbolFunctional DescriptionReference
1NCNo internal connect, used for mechanical strength only
2VBBVBB Bias output
3GNDGroundNote 3
4GNDGroundNote 3
5GNDGroundNote 3
6GNDGroundNote 3
7OMITNo pin
8NCNo internal connect, used for mechanical strength onlyNote 5
9NCNo internal connect, used for mechanical strength onlyNote 5
10GNDGroundNote 3
11V
12V
CC
CC
Common supply voltageNote 1
Common supply voltageNote 1
13GNDGroundNote 3
14DATAData inputNote 4
15DATAInverted Data inputNote 4
16NCNo internal connect, used for mechanical strength only
HFBR-2116T Receiver Pin-Out Table
PinSymbolFunctional DescriptionReference
1NCNo internal connect, used for mechanical strength only
2DATAInverted Data inputNote 4
3DATAData inputNote 4
4VCCCommon supply voltageNote 1
5VCCCommon supply voltageNote 1
6VCCCommon supply voltageNote 1
7GNDGroundNote 3
8NCNo internal connect, used for mechanical strength onlyNote 5
9NCNo internal connect, used for mechanical strength onlyNote 5
10OMITNo pin
11GNDGroundNote 3
12GNDGroundNote 3
13GNDGroundNote 3
14SDSignal DetectNote 2, 4
15SDInverted Signal DetectNote 2, 4
16OMITNo pin
Notes:
1. Voltages on VCC must be from the same power supply (they are connected together internally).
2. Signal Detect is a logic signal that indicates the presence or absence of an input optical signal. A logic-high, VOH, on Signal Detect
indicates presence of an input optical signal. A logic-low, VOL, on Signal Detect indicates an absence of input optical signal.
3. All GNDs are connected together internally and to the internal shield.
4. DATA, DATA, SD, SD are open-emitter output circuits.
5. On metal-port modules, these pins are redefined as “Port Connection.”
196
Page 9
Specifications–Absolute Maximum Ratings
ParameterSymbolMin.Typ.Max.UnitReference
Storage TemperatureT
Lead Soldering TemperatureT
Lead Soldering Timet
SOLD
SOLD
Supply VoltageV
Data Input VoltageV
Differential Input VoltageV
Output CurrentI
S
CC
I
D
O
-40100°C
-0.57.0V
-0.5V
Recommended Operating Conditions
ParameterSymbolMin.Typ.Max.UnitReference
Ambient Operating TemperatureT
Supply VoltageV
A
CC
Data Input Voltage–LowVIL - V
Data Input Voltage–HighVIH - V
Data and Signal Detect Output LoadR
L
CC
CC
070°C
4.55.5V
-1.810-1.475V
-1.165-0.880V
HFBR-1116T Transmitter Electrical Characteristics
(TA = 0°C to 70°C, VCC = 4.5 V to 5.5 V)
ParameterSymbolMin.Typ.Max.UnitReference
Supply CurrentI
Power DissipationP
Threshold VoltageVBB - V
Data Input Current–LowI
Data Input Current–HighI
CC
DISS
IL
IH
-1.42-1.3-1.24VNote 24
CC
-3500µs
260°C
10sec.
CC
V
1.4VNote 1
50mA
50ΩNote 2
145185mANote 3
0.761.1WNote 5
14350µs
HFBR-2116T Receiver Electrical Characteristics
(TA = 0°C to 70°C, VCC = 4.5 V to 5.5 V)
ParameterSymbolMin.Typ.Max.UnitReference
Supply CurrentI
Power DissipationP
Data Output Voltage–LowVOL - V
Data Output Voltage–HighVOH - V
Data Output Rise Timet
Data Output Fall Timet
Signal Detect OutputVOL - V
Voltage–Low (De-asserted)
Signal Detect OutputVOH - V
Voltage–High (Asserted)
Signal Detect Output Rise Timet
Signal Detect Output Fall Timet
the Receiver
Random Jitter Contributed by theRJ11.91ns p-pNote 18
Receiver
Signal Detect–AssertedP
Signal Detect–DeassertedP
Signal Detect–HysteresisPA-P
Signal Detect Assert Timet
SDA
(off to on)
Signal Detect De-assert Timet
SDD
(on to off)
A
D
D
PD+1.5 dB-31dBmNote 19
avg.
-45dBmNote 20
avg.
1.5dB
055100µsNote 21
0110350µsNote 22
198
Page 11
Notes:
1. This is the maximum voltage that can
be applied across the Differential
Transmitter Data Inputs to prevent
damage to the input ESD protection
circuit.
2. The outputs are terminated with 50 Ω
connected to VCC - 2 V.
3. The power supply current needed to
operate the transmitter is provided to
differential ECL circuitry. This
circuitry maintains a nearly constant
current flow from the power supply.
Constant current operation helps to
prevent unwanted electrical noise
from being generated and conducted
or emitted to neighboring circuitry.
4. This value is measured with the outputs terminated into 50 Ω connected
to VCC - 2 V and an Input Optical
Power level of -14 dBm average.
5. The power dissipation value is the
power dissipated in the transmitter
and receiver itself. Power dissipation
is calculated as the sum of the products of supply voltage and currents,
minus the sum of the products of the
output voltages and currents.
6. This value is measured with respect to
VCC with the output terminated into
50 Ω connected to VCC - 2 V.
7. The output rise and fall times are
measured between 20% and 80%
levels with the output connected to
VCC - 2 V through 50 Ω.
8. These optical power values are
measured with the following
conditions:
• The Beginning of Life (BOL) to the
End of Life (EOL) optical power
degradation is typically 1.5 dB per
the industry convention for long
wavelength LEDs. The actual
degradation observed in HewlettPackard’s 1300 nm LED products
is < 1 dB, as specified in this data
sheet.
• Over the specified operating
voltage and temperature ranges.
• With 25 MBd (12.5 MHz squarewave) input signal.
• At the end of one meter of noted
optical fiber with cladding modes
removed.
The average power value can be
converted to a peak power value by
adding 3 dB. Higher output optical
power transmitters are available on
special request.
9. The Extinction Ratio is a measure of
the modulation depth of the optical
signal. The data “0” output optical
power is compared to the data “1”
peak output optical power and
expressed as a percentage. With the
transmitter driven by a 25 MBd
(12.5 MHz square-wave) signal, the
average optical power is measured.
The data “1” peak power is then
calculated by adding 3 dB to the
measured average optical power. The
data “0” output optical power is found
by measuring the optical power when
the transmitter is driven by a logic “0”
input. The extinction ratio is the ratio
of the optical power at the “0” level
compared to the optical power at the
“1” level expressed as a percentage or
in decibels.
10. The transmitter will provide this low
level of Output Optical Power when
driven by a logic “0” input. This can
be useful in link troubleshooting.
11. The relationship between Full Width
Half Maximum and RMS values for
Spectral Width is derived from the
assumption of a Gaussian shaped
spectrum which results in a 2.35 X
RMS = FWHM relationship.
12. The optical rise and fall times are
measured from 10% to 90% when the
transmitter is driven by a 25 MBd
(12.5 MHz square-wave) input signal.
The ANSI T1E1.2 committee has
designated the possibility of defining
an eye pattern mask for the transmitter output optical power as an
item for further study. HP will
incorporate this requirement into the
specifications for these products if it
is defined. The HFBR-1116T
transmitter typically complies with
the template requirements of CCITT
(now ITU-T) G.957 Section 3.25,
Figure 2 for the STM-1 rate,
excluding the optical receiver filter
normally associatd with single-mode
fiber measurements which is the
likely source for the ANSI T1E1.2
committee to follow in this matter.
13. Systematic Jitter contributed by the
transmitter is defined as the
combination of Duty Cycle Distortion
and Data Dependent Jitter.
Systematic Jitter is measured at 50%
threshold using a 155.52, 27 - 1
pseudo-random bit stream data
pattern input signal.
14. Random Jitter contributed the the
transmitter is specified with a 155.52
MBd (77.5 MHz square-wave) input
signal.
15. This specification is intended to
indicate the performance of the
receiver when Input Optical Power
signal characteristics are present per
the following definitions. The Input
Optical Power dynamic range from
the minimum level (with a window
time-width) to the maximum level is
the range over which the receiver is
guaranteed to provide output data
with a Bit-Error-Ratio (BER) better
than or equal to 2.5 x 10
• At the Beginning of Life (BOL).
• Over the specified operating
voltage and temperature ranges.
• Input is a 155.52 MBd, 223 - 1
PRBS data pattern with a 72 “1”s
and 72 “0”s inserted per the CCITT
(now ITU-T) recommendation
G.958 Appendix 1.
• Receiver data window time-width is
1.23 ns or greater for the clock
recovery circuit to operate in. The
actual test window time-width is set
to simulate the effect of worst-case
input optical jitter based on the
transmitter jitter values from the
specification tables. The test
window time-width is 3.32 ns.
16. All conditions of Note 15 apply
except that the measurement is made
at the center of the symbol with now
window time-width.
17. Systematic Jitter contributed by the
receiver is defined as the combination
of Duty Cycle Distortion and Data
Dependent Jitter. The input optical
power level is at the maximum of
“PINMin. (W).” Systematic Jitter is
measured at 50% threshold using a
155.52 MBd (77.5 MHz square-wave),
27 - 1 pseudo-random bit stream data
pattern input signal.
18. Random Jitter contributed by the
receiver is specified with a 155.52
MBd (77.5 MHz square-wave) input
signal.
19. This value is measured during the
transition from low to high levels of
input optical power.
20. This value is measured during the
transition from high to low levels of
input optical power.
21. The Signal Detect output shall be
asserted, logic-high (VOH), within
100 µs after a step increase of the
Input Optical Power.
22. Signal Detect output shall be
deasserted, logic-low (VOL), within
350 µs after a step decrease in the
Input Optical Power.
23. The HFBR-1116T transmitter complies with the requirements for the
tradeoffs between center wavelength,
spectral width, and rise/fall times
shown in Figure 9. This figure is
derived from the FDDI PMD standard
(ISO/IEC 9314-3: 1990 and ANSI
X3.166 - 1990) per the description in
ANSI T1E1.2 Revision 3. The
interpretation of this figure is that
values of Center Wavelength and
Spectral Width must lie along the
appropriate Optical Rise/Fall Time
curve.
24. This value is measured with an
output load RL = 10 kΩ.
-10
.
199
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