Datasheet HFA1114 Datasheet (Intersil Corporation)

HFA1114

November 1996

Features

• Access to Summing Node Allows Circuit Customization

• User Programmable For Closed-Loop Gains of +1, -1
or +2 Without Use of External Resistors

• Wide -3dB Bandwidth . . . . . . . . . . . . . . . . . . . . 850MHz

• Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . 2400V/µs

• Fast Settling Time (0.1%) . . . . . . . . . . . . . . . . . . . 11ns

• High Output Current . . . . . . . . . . . . . . . . . . . . . . . 60mA

• Excellent Gain Accuracy. . . . . . . . . . . . . . . . . . 0.99V/V

• Overdrive Recovery. . . . . . . . . . . . . . . . . . . . . . . <10ns

• Standard Operational Amplifier Pinout

Applications

• RF/IF Processors

• Driving Flash A/D Converters

• High Speed Communications

• Impedance Transformation

• Line Driving

• Video Switching and Routing

• Radar Systems

• Medical Imaging Systems

850MHz Video Cable Driving Buffer

Description

The HFA1114 is a closed loop Buffer featuring user
programmable gain and ultra high speed performance.
Manufactured on Intersil’ proprietary complementary bipolar
UHF-1 process, the HFA1114 offers a wide -3dB bandwidth
of 850MHz, very fast slew rate, excellent gain flatness, low
distortion and high output current.

A unique feature of the pinout allows the user to select a
voltage gain of +1, -1, or +2, without the use of any external
components. Gain selection is accomplished via connections
to the inputs, as described in the “Application Information”
section. The result is a more flexible product, fewer part types
in inventory, and more efficient use of board space.

Compatibility with existing op amp pinouts provides flexibility
to upgrade low gain amplifiers, while decreasing component
count. Unlike most buffers, the standard pinout provides an
upgrade path should a higher closed loop gain be needed at
a future date.

For applications requiring a standard buffer pinout, please
refer to the HFA1110 datasheet.

Ordering Information

PART NUMBER

(BRAND)

HFA1114IP -40 to 85 8 Ld PDIP E8.3
HFA1114IB

(H1114I)

TEMP. RANGE

(oC) PACKAGE

-40 to 85 8 Ld SOIC M8.15

PKG.

NO.

HFA11XXEVAL DIP Evaluation Board for High Speed

Pinout

HFA1114

(PDIP, SOIC)

TOP VIEW

300

300

-

+

8

NC

V+

7

OUT

6

5

SN

NC

1

-IN

2

+IN

3

V-

4

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

Pin Descriptions

NAME

NC 1, 8 No Connection

-IN 2 Inverting Input
+IN 3 Non-Inverting Input

V- 4 Negative Supply

SN 5 Summing Node

OUT 6 Output

V+ 7 Positive Supply

5-1

Op Amps

PIN

NUMBER DESCRIPTION

File Number 3151.3

HFA1114

Absolute Maximum Ratings Thermal Information

Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V

DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V

Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA

SUPPLY

Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

Thermal Resistance (Typical, Note 1) θJA (oC/W)

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170

Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . . 175oC

Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . 300oC

(SOIC - Lead Tips Only)

Electrical Specifications V

PARAMETER

INPUT CHARACTERISTICS

Output Offset Voltage 25 - 8 25 mV

Output Offset Voltage Drift Full - 10 - µV/oC
PSRR 25 39 45 - dB

Input Noise Voltage 100kHz 25 - 9 - nV/√Hz
Non-Inverting Input Noise Current 100kHz 25 - 37 - pA/√Hz
Non-Inverting Input Bias Current 25 - 25 40 µA

Non-Inverting Input Resistance 25 25 50 - kΩ
Inverting Input Resistance 25 240 300 360 Ω
Input Capacitance Either Input 25 - 2 - pF
Input Common Mode Range Full ±2.5 ±2.8 - V

= ±5V, AV = +1, RL = 100Ω, Unless Otherwise Specified

SUPPLY

TEST

CONDITIONS

TEMP.

o

(

C) MIN TYP MAX UNITS

Full - - 35 mV

Full 35 - - dB

Full - - 65 µA

TRANSFER CHARACTERISTICS

Gain AV = +1, VIN = +2V 25 0.980 0.990 1.02 V/V

Full 0.975 - 1.025 V/V

AV = +2, VIN = +1V 25 1.96 1.98 2.04 V/V

Full 1.95 - 2.05 V/V

DC Non-Linearity AV = +2, ±2V Full Scale 25 - 0.02 - %

OUTPUT CHARACTERISTICS

Output Voltage AV = -1 25 ±3.0 ±3.3 - V

Full ±2.5 ±3.0 - V

Output Current AV = -1, RL = 50Ω 25, 85 50 60 - mA

-40oC35 50 - mA

Closed Loop Output Impedance AV= +2, DC 25 - 0.3 - Ω

5-2

HFA1114

Electrical Specifications V

PARAMETER

= ±5V, AV = +1, RL = 100Ω, Unless Otherwise Specified (Continued)

SUPPLY

TEST

CONDITIONS

TEMP.

(oC) MIN TYP MAX UNITS

POWER SUPPLY CHARACTERISTICS

Supply Voltage Range Full ±4.5 - ±5.5 V
Supply Current 25 - 21 26 mA

Full - - 33 mA

AC CHARACTERISTICS

-3dB Bandwidth (V

OUT

= 0.2V

)AV = -1 25 - 800 - MHz

P-P

AV = +1 25 - 850 - MHz
AV = +2 25 - 550 - MHz

Slew Rate (V

OUT

= 5V

)A

P-P

= -1 25 - 2400 - V/µs

V

AV = +1 25 - 1500 - V/µs
AV = +2 25 - 1900 - V/µs

Full Power BW 5V

, AV = +2 25 - 220 - MHz

P-P

Gain Flatness To 30MHz, AV = +2 25 - ±0.015 - dB
Gain Flatness To 100MHz, AV = +2 25 - ±0.07 - dB
2nd Harmonic Distortion 50MHz, V
3rd Harmonic Distortion 50MHz, V

OUT
OUT

= 2V

= 2V

P-P

P-P

25 - -53 - dBc

25 - -68 - dBc
3rd Order Intercept 100MHz, AV = +2 25 - 28 - dBm
1dB Compression 100MHz, AV = +2 25 - 19 - dBm
Rise Time (V

= 0.5V Step) AV = +2 25 - 700 - ps

OUT

AV = +1 25 - 480 - ps

Overshoot V

0.1% Settling Time V

0.05% Settling Time V

= 0.5V Step, AV = +2 25 - 6 - %

OUT

= 2V to 0V 25 - 11 - ns

OUT

= 2V to 0V 25 - 15 - ns

OUT

Overdrive Recovery Time 25 - 8.5 - ns
Differential Gain AV = +1, 3.58MHz, RL = 150Ω 25 - 0.03 - %

AV = +2, 3.58MHz, RL = 150Ω 25 - 0.02 - %

Differential Phase AV = +1, 3.58MHz, RL = 150Ω 25 - 0.05 - Degrees

AV = +2, 3.58MHz, RL = 150Ω 25 - 0.04 - Degrees

5-3

HFA1114

Application Information

Closed Loop Gain Selection

The HFA1114 features a novel design which allows the user
to select from three closed loop gains, without any external
components. The result is a more flexible product, fewer part
types in inventory, and more efficient use of board space.

This “buffer” operates in closed loop gains of -1, +1, or +2, and
gain selection is accomplished via connections to the ±inputs.
Applying the input signal to +IN and floating -IN selects a gain
of +1, while grounding -IN selects a gain of +2. A gain of -1 is
obtained by applying the input signal to -IN with +IN grounded.

The table below summarizes these connections:

GAIN
(ACL)

-1 GND Input
+1 Input NC (Floating)
+2 Input GND

+INPUT (PIN 3) -INPUT (PIN 2)

CONNECTIONS

PC Board Layout

The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The

use of low inductance components such as chip resis­tors and chip capacitors is strongly recommended,
while a solid ground plane is a must!

Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.

Terminated microstrip signal lines are recommended at the input
and output of the device. Capacitance directly on the output must
be minimized, or isolated as discussed in the next section.

For unity gain applications, care must also be taken to minimiz e
the capacitance to ground seen by the amplifier’s inverting
input. At higher frequencies this capacitance will tend to short
the -INPUT to GND, resulting in a closed loop gain which
increases with frequency. This will cause excessive high
frequency peaking and potentially other problems as well.

An example of a good high frequency layout is the Evaluation
Board shown in Figure 2.

Driving Capacitive Loads

Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s phase
margin resulting in frequency response peaking and possible oscil­lations. In most cases, the oscillation can be avoided by placing a
resistor (R

) in series with the output prior to the capacitance.

S

Figure 1 details starting points for the selection of this resis­tor. The points on the curve indicate the R

and CL combina-

S

tions for the optimum bandwidth, stability, and settling time,
but experimental fine tuning is recommended. Picking a
point above or to the right of the curve yields an overdamped
response, while points below or left of the curve indicate
areas of underdamped performance.

R

and CLform a low pass network at the output, thus

S

limiting system bandwidth well below the amplifier band­width of 850MHz. By decreasing R

as CLincreases (as

S

illustrated in the curves), the maximum bandwidth is
obtained without sacrificing stability. Even so, bandwidth
does decrease as you move to the right along the curve.
For example, at A

= +1, RS = 50Ω, CL = 30pF, the overall

V

bandwidth is limited to 300MHz, and bandwidth drops to
100MHz at A

50
45
40
35
30

(Ω)

25

S

20

R

15
10

5
0

FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs

= +1, RS = 5Ω, CL = 340pF.

V

AV = +1

AV = +2

0 40 80 120 160 200 240 280 320 360 400

LOAD CAPACITANCE (pF)

LOAD CAPACITANCE

Evaluation Board

The performance of the HFA1114 may be evaluated using
the HFA11XX Evaluation Board, slightly modified as follows:

2. Remove the 500Ω feedback resistor (R
connection open.

3. a. For A
b. For A

= +1 evaluation, remove the 500Ω gain setting

V

resistor (R

), and leave pin 2 floating.

1

= +2, replace the 500Ω gain setting resistor with

V

a 0Ω resistor to GND.

4. Isolate Pin 5 from the stray board capacitance to minimize
peaking and overshoot.

The layout and modified schematic of the board are shown in
Figure 2.

To order evaluation boards (part number HFA11XXEVAL),
please contact your local sales office.

), and leave the

2

10µF

IN

∞ (A

or 0Ω (A

0.1µF

V

R

50Ω

= +1)

= +2)

V

1

-5V

V

H

1
2
3
4

8
7

50Ω

6
5

X

GND

GND

FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT

OUT
V

L

10µF0.1µF

+5V

TOP LAYOUT BOTTOM LAYOUT

V

H

1

+IN

OUT

V+

V

L

V-

GND

5-4

Die Characteristics

HFA1114

DIE DIMENSIONS:

63 mils x 44 mils x 19 mils
1600µm x 1130µm x 483µm

METALLIZATION:

Type: Metal 1: AICu(2%)/TiW
Thickness: Metal 1: 8k

Å ±0.4kÅ

Type: Metal 2: AICu(2%)
Thickness: Metal 2: 16k

Å ±0.8kÅ

Metallization Mask Layout

PASSIVATION:

Type: Nitride
Thickness: 4k

Å ±0.5kÅ

TRANSISTOR COUNT:

52

SUBSTRATE POTENTIAL (Powered Up):

Floating (Recommend Connection to V-)

HFA1114

NC

+IN

V-

NC

SN

OUT

-IN

NC

V+

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under an y patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

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5-5