850MHz, Low Distortion Programmable
Gain Buffer Amplifier
The HFA1112 is a closed loop Buffer featuring user
programmable gain and ultra high speed performance.
Manufactured on Intersil’s proprietary complementary
bipolar UHF-1 process, the HFA1112 offers a wide -3dB
bandwidth of 850MHz, very fast slew rate, excellent gain
flatness, low distortion and high output current.
A unique feature of the pinout allows the user to select a
voltage gain of +1, -1, or +2, without the use of any external
components. Gain selection is accomplished via
connections to the inputs, as described in the “Application
Information” section. The result is a more flexible product,
fewerpart types in inventory, and more efficient use of board
space.
Compatibility with existing op amp pinouts provides flexibility
to upgrade low gain amplifiers, while decreasing component
count. Unlike most buffers, the standard pinout provides an
upgrade path should a higher closed loop gain be needed at
a future date.
This amplifier is available with programmable output limiting
as the HFA1113.Forapplications requiring a standard buffer
pinout, please refer to the HFA1110 datasheet. For Military
product, refer to the HFA1112/883 data sheet.
Pinout
HFA1112
(PDIP, SOIC)
TOP VIEW
300
300
-
+
8
NC
V+
7
OUT
6
NC
5
NC
-IN
+IN
1
2
3
V-
4
Features
• User Programmable for Closed-Loop Gains of +1, -1 or +2
without Use of External Resistors
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
AV = -125450800-MHz
AV = +125500850-MHz
AV = +225350550-MHz
AV = -12515002400-V/µs
AV = +1258001500-V/µs
AV = +22511001900-V/µs
AV = -125-300-MHz
AV = +125-150-MHz
AV = +225-220-MHz
AV = -125-±0.02-dB
AV = +125-±0.1-dB
AV = +225-±0.015±0.04dB
AV = -125-±0.05-dB
AV = +125-±0.2-dB
AV = +225-±0.036±0.08dB
AV = -125-±0.10-dB
AV = +225-±0.07±0.22dB
AV = -125-±0.13-Degrees
AV = +125-±0.83-Degrees
AV = +225-±0.05-Degrees
AV = -125--52-dBc
AV = +125--57-dBc
AV = +225--52-45dBc
AV = -125--71-dBc
AV = +125--73-dBc
AV = +225--72-65dBc
AV = -125--47-dBc
AV = +125--53-dBc
AV = +225--47-40dBc
AV = -125--63-dBc
AV = +125--68-dBc
AV = +225--65-55dBc
AV = -125--41-dBc
AV = +125--50-dBc
AV = +225--42-35dBc
AV = -125--55-dBc
AV = +125--49-dBc
AV = +225--62-45dBc
AV = -125-500800ps
AV = +125-480750ps
AV = +225-7001000ps
AV = -125-0.82-ns
AV = +125-1.06-ns
AV = +225-1.00-ns
AV = -125-1230%
AV = +125-4565%
AV = +225-620%
= 2V to 0V25-11-ns
OUT
= 2V to 0V25-15-ns
OUT
P-P
AV = +2, 3.58MHz, RL = 150Ω25-0.02-%
AV = +2, 3.58MHz, RL = 150Ω25-0.04-Degrees
25-8.5-ns
Application Information
Closed Loop Gain Selection
The HFA1112 features a novel design which allows the user
to select from three closed loop gains, without any external
components. The result is a more flexibleproduct, fewer part
types in inventory, and more efficient use of board space.
This “buffer” operates in closed loop gains of -1, +1, or +2, and
gain selection is accomplished via connections to the ±inputs.
Applying the input signal to +IN and floating -IN selects a gain
of +1, while grounding -IN selects a gain of +2. A gain of -1 is
obtained by applying the input signal to -IN with +IN grounded.
4
The table below summarizes these connections:
GAIN
(ACL)
-1GNDInput
+1InputNC (Floating)
+2InputGND
+INPUT (PIN 3)-INPUT (PIN 2)
CONNECTIONS
Page 5
HFA1112
PC Board Layout
The frequency response of this amplifier depends greatly on
the amount of care taken in designing the PC board. The
use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
For unity gain applications, care must also be taken to
minimize the capacitance to ground seen by the amplifier’s
inverting input. At higher frequencies this capacitance will
tend to short the -INPUT to GND, resulting in a closed loop
gain which increases with frequency. This will cause
excessive high frequency peaking and potentially other
problems as well.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 2.
overdampedresponse, while pointsbelow or left of the curve
indicate areas of underdamped performance.
R
and CLform a low pass network at the output, thus
S
limiting system bandwidth well below the amplifier
bandwidth of 850MHz. By decreasing R
as CLincreases
S
(as illustrated in the curves), the maximum bandwidth is
obtained without sacrificing stability. Even so, bandwidth
does decrease as you move to the right along the curve.
For example, at A
= +1, RS=50Ω,CL= 30pF, the overall
V
bandwidth is limited to 300MHz, and bandwidth drops to
100MHz at A
50
45
40
35
30
(Ω)
25
S
20
R
15
10
5
0
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
= +1, RS = 5Ω, CL = 340pF.
V
AV = +1
AV = +2
04080120 160 200 240 280 320 360 400
LOAD CAPACITANCE
LOAD CAPACITANCE (pF)
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
∞ (A
= +1)
V
or 0Ω (A
IN
10µF
R
0.1µF
1
50Ω
= +2)
V
1
2
3
4
-5V
) in series with the output
S
and C
S
V
H
8
7
50Ω
6
5
GND
GND
OUT
V
L
L
10µF0.1µF
+5V
Evaluation Board
The performance of the HFA1112 may be evaluated using
the HFA11XX Evaluation Board, slightly modified as follows:
FIGURE 33. OVERSHOOT vs INPUT RISE TIMEFIGURE 34. OVERSHOOT vs INPUT RISE TIME
22
21
20
19
18
17
16
15
14
13
12
11
10
SUPPLY CURRENT (mA)
9
8
7
6
5
59
67810
TOTAL SUPPLY VOLTAGE (V+ - V-, V)
60
V
= 2V
OUT
50
40
AV = +2
AV = -1
AV = +1
o
C)
30
20
OVERSHOOT (%)
10
0
10030050070090011001300
INPUT RISE TIME (ps)
25
24
23
22
21
20
19
18
SUPPLY CURRENT (mA)
17
16
15
-50-250255075100125
TEMPERATURE (
FIGURE 35. SUPPLY CURRENT vs SUPPLY VOLTAGEFIGURE 36. SUPPLY CURRENT vs TEMPERATURE
3.6
3.5
3.4
3.3
3.2
3.1
3.0
2.9
OUTPUT VOLTAGE (V)
2.8
2.7
2.6
AV = -1
+V
(RL= 50Ω)
OUT
+V
(RL= 100Ω)
OUT
|-V
| (RL= 100Ω)
OUT
|-V
| (RL= 50Ω)
OUT
-50-250255075100125
TEMPERATURE (
o
C)
50
40
30
20
E
NOISE VOLTAGE (nV/√Hz)
10
0
0.1110100
FREQUENCY (kHz)
NI
I
NI
FIGURE 37. OUTPUT VOLTAGE vs TEMPERATUREFIGURE 38. INPUT NOISE CHARACTERISTICS
11
130
110
90
70
50
30
NOISE CURRENT (pA/√Hz)
Page 12
Die Characteristics
HFA1112
DIE DIMENSIONS:
63 mils x 44 mils x 19 mils
1600µm x 1130µm 483µm
METALLIZATION:
Type: Metal 1: AlCu (2%)/TiW
Thickness: Metal 1: 8k
Å ±0.4kÅ
Type: Metal 2: AlCu (2%)
Thickness: Metal 2: 16k
Å ±0.8kÅ
Metallization Mask Layout
PASSIVATION:
Type: Nitride
Thickness: 4k
Å ±0.5kÅ
TRANSISTOR COUNT:
52
SUBSTRATE POTENTIAL (Powered Up):
Floating (Recommend Connection to V-)
HFA1112
NC
+IN
V-
NC
NC
OUT
-IN
NC
V+
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
12
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