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HFA1110

Datasheet HFA1110 Datasheet (Intersil Corporation)

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Page 1
HFA1110
Data Sheet February 1999 File Number 2944.7
750MHz, Low Distortion Unity Gain, Closed Loop Buffer
The HFA1110 is a unity gain closed loop bufferthatachieves
The HFA1110’s settling time of 11ns to 0.1%, low distortion and ability to drive capacitive loads make it an ideal flash A/D driver.
The HFA1110 is an enhanced, pin compatible upgrade for the AD9620, AD9630, CLC110, EL2072, BUF600 and BUF601.
For buffer applications requiring a standard op amp pinout, or selectable gain (-1, +1, +2), see the HFA1112 data sheet. For output limiting see the HFA1113 data sheet.
For military grade product please refer to the HFA1110/883 data sheet.
Pinout
HFA1110
(SOIC)
TOP VIEW
V+
OPT V+
NC
1
2
3
4
IN
-
8
OUT
NC
7
+
OPT V-
6
5
V-
Features
• Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . . . . . .750MHz
• Very Fast Slew Rate. . . . . . . . . . . . . . . . . . . . . . 1300V/µs
• Fast Settling Time (0.2%). . . . . . . . . . . . . . . . . . . . . . 7ns
• High Output Current. . . . . . . . . . . . . . . . . . . . . . . . .60mA
• Fixed Gain of +1
• Gain Flatness (100MHz) . . . . . . . . . . . . . . . . . . . . 0.03dB
• Differential Phase. . . . . . . . . . . . . . . . . . . 0.025 Degrees
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.04%
• 3rd Harmonic Distortion (50MHz). . . . . . . . . . . . . . -80dBc
• 3rd Order Intercept (100MHz) . . . . . . . . . . . . . . . . 30dBm
Applications
• Video Switching and Routing
• RF/IF Processors
• Driving Flash A/D Converters
• High-Speed Communications
• Impedance Transformation
• Line Driving
• Radar Systems
Ordering Information
PART NUMBER
(BRAND)
HFA1110IB (H1110I)
HFA1110EVAL High Speed Buffer DIP Evaluation Board
TEMP.
RANGE (oC) PACKAGE
-40 to 85 8 Ld SOIC M8.15
PKG.
NO.
Pin Descriptions
PIN
NAME
V+ 1 Positive Supply
Opt V+ 2 Optional Positive Supply
NC 3 No Connection
IN 4 Input V- 5 Negative Supply
Opt V- 6 Optional Negative Supply
NC 7 No Connection
OUT 8 Output
NUMBER DESCRIPTION
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
| Copyright © Intersil Corporation 1999
Page 2
HFA1110
Absolute Maximum Ratings Thermal Information
Voltage Between V+ and V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
SUPPLY
Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60mA
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Thermal Resistance (Typical, Note 1) θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Electrical Specifications V
PARAMETER TEST CONDITIONS TEMP (
= ±5V, RL = 100Ω, Unless Otherwise Specified
SUPPLY
o
C) MIN TYP MAX UNITS
INPUT CHARACTERISTICS
Output Offset Voltage (Note 2) 25 - 8 25 mV
Full - - 35 mV Output Offset Voltage Drift Full - 10 - µV/oC PSRR 25 39 45 - dB
Full 35 - - dB Input Noise Voltage (Note 2) 100kHz 25 - 14 - nV/√Hz Input Noise Current (Note 2) 100kHz 25 - 51 - pA/√Hz Input Bias Current (Note 2) 25 - 10 40 µA
Full - - 65 µA Input Resistance 25 25 50 - kΩ Input Capacitance 25 - 2 - pF
TRANSFER CHARACTERISTICS
Gain V
OUT
= 2V
P-P
25 0.980 0.990 1.02 V/V
Full 0.975 - 1.025 V/V DC Non-Linearity (Note 2) ±2V Full Scale 25 - 0.003 - %
OUTPUT CHARACTERISTICS
Output Voltage (Note 2) 25 3.0 3.3 - ±V
Full 2.5 3.0 - ±V Output Current (Note 2) RL = 50Ω 25, 85 50 60 - mA
-40 35 50 - mA
POWER SUPPLY CHARACTERISTICS
Supply Voltage Range Full 4.5 - 5.5 ±V Supply Current (Note 2) 25 - 21 26 mA
Full - - 33 mA
AC CHARACTERISTICS
-3dB Bandwidth (Note 2) V Slew Rate V Full Power Bandwidth (Note 2) V
OUT OUT OUT
= 0.2V = 5V = 4V
P-P P-P
P-P
25 - 750 - MHz 25 - 1300 - V/µs 25 - 150 - MHz
Gain Flatness (Note 2) To 100MHz 25 - ±0.03 - dB
To 30MHz 25 - ±0.01 - dB Linear Phase Deviation (Note 2) DC to 100MHz 25 - ±0.3 - Degrees 2nd Harmonic Distortion (Note 2) 50MHz, V 3rd Harmonic Distortion (Note 2) 50MHz, V
OUT OUT
= 2V = 2V
P-P P-P
25 - -60 - dBc 25 - -80 - dBc
3rd Order Intercept (Note 2) 100MHz 25 - 30 - dBm
2
Page 3
HFA1110
Electrical Specifications V
PARAMETER TEST CONDITIONS TEMP (oC) MIN TYP MAX UNITS
-1dB Gain Compression 100MHz 25 - 14 - dBm Reverse Gain (S12, Note 2) 100MHz, V
TRANSIENT RESPONSE
Rise Time V Overshoot (Note 2) V
0.2% Settling Time (Note 2) V
0.1% Settling Time (Note 2) V Overdrive Recovery Time 25 - 15 - ns Differential Gain 3.58MHz, RL = 75Ω 25 - 0.04 - % Differential Phase 3.58MHz, RL = 75Ω 25 - 0.025 - Degrees
NOTE:
2. See Typical Performance Curves for more information.
Application Information
PC Board Layout
The frequency performance of this amplifier depends a great deal on the amount of care taken in designing the PC board.
The use of low inductance components such as chip resistors and chip capacitors is strongly recommended,
= ±5V, RL = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY
= 1V
OUT
= 0.5V Step 25 - 0.5 - ns
OUT
= 1.0V Step, Input Signal
OUT
Rise/Fall = 1ns
= 1V to 0V 25 - 7 - ns
OUT
= 1V to 0V 25 - 11 - ns
OUT
P-P
25 - -60 - dB
25 - 2.5 - %
+5V
0.1µF10µF
IN
50Ω
1 2 3 4
HFA1110
8 7 6 5
50Ω
R
S
0.1µF10µF
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
SCHEMATIC DIAGRAM
A large value (10µF) tantalum in parallel with a small value chip (0.1µF) capacitor works well in most cases.
BOTTOM LAYOUT
OUT
-5V
Terminated microstrip signal lines are recommended at the input and output of the device. Output capacitance, such as that resulting from an improperly terminated transmission line will degrade the frequency response of the amplifier and may cause oscillations. In most cases, the oscillation can be avoided by placing a resistor (R See the “Recommended R
) in series with the output.
S
vs Load Capacitance” graph for
S
specific recommendations. An example of a good high frequency layout is the
Evaluation Board shown below.
Evaluation Board
An evaluation board is available for the HFA1110 (part number HFA1110EVAL). Please contact your local sales office for information.
The layout and schematic of the board are shown here:
NOTE: The SOIC version may be evaluated in the DIP board by using a SOIC-to-DIP adapter such as Aries Electronics Part Number 08-350000-10.
TOP LAYOUT
1
3
Page 4
HFA1110
Typical Performance Curves V
120
80
40
0
-40
OUTPUT VOLTAGE (mV)
-80
-120
TIME (5ns/DIV.)
FIGURE 1. SMALL SIGNAL PULSE RESPONSE FIGURE 2. LARGE SIGNAL PULSE RESPONSE
2 1 0
-1
-2
-3
-4
GAIN (dB)
-5
-6
-7
-8 0 200M 400M 600M 800M 1G
PHASE V
OUT
= 200mV
P-P
FREQUENCY (Hz)
GAIN V
OUT
V
OUT
SUPPLY
= 200mV = 1V
P-P
= ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified
1.2
0.8
0.4
0
-0.4
OUTPUT VOLTAGE (V)
-0.8
-1.2
TIME (5ns/DIV.)
P-P
0
-45
-90
-135
-180 PHASE (DEGREES)
-225
-270
6 3 0
-3
GAIN (dB)
-6
1M 10M 100M 1G
FREQUENCY (Hz)
RL = 1kΩ
RL = 100Ω
RL = 50Ω
RL = 1kΩ
0
-90
-180
-270 PHASE (DEGREES)
-360
FIGURE 3. FREQUENCY RESPONSE FIGURE 4. FREQUENCY RESPONSE FOR VARIOUS LOAD
2 1 0
-1
-2
-3
GAIN (dB)
-4
-5
-6
-7
-8 1M 10M 100M 1G
V
= 200mV
OUT
V
OUT
V
OUT
FREQUENCY (Hz)
= 2.5V = 4V
P-P
P-P
P-P
FIGURE5. FREQUENCY RESPONSEFORVARIOUSOUTPUT
VOLTAGES
4
RESISTORS
890 870 850 830 810 790 770
BANDWIDTH (MHz)
750 730
710
-50 -30 -10 10 30 50 70 90 110 130
o
TEMPERATURE (
C)
FIGURE 6. -3dB BANDWIDTH vs TEMPERATURE
Page 5
HFA1110
Typical Performance Curves V
0.25
0.20
0.15
0.10
0.05
GAIN (dB)
0
-0.05
-0.10
1M 10M 100M 200M
FREQUENCY (Hz)
FIGURE 7. GAIN FLATNESS FIGURE 8. DEVIATION FROM LINEAR PHASE
-20
-30
-40
GAIN (dB)
-50
-60
0 200M 400M 600M 800M 1G
GAIN
V
= 1V
OUT
FREQUENCY (Hz)
P-P
SUPPLY
PHASE
= ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
2.0
1.5
1.0
0.5 0
-0.5
-1.0
DEVIATION (DEGREES)
-1.5
-2.0
0 15M 30M 45M 60M 75M 90M105M 120M 135M 150M
FREQUENCY (Hz)
50
+135
40
+90
30
+45
20
0
PHASE (DEGREES)
INTERCEPT POINT (dBm)
10
0
0 50 100 150 200 250 300 350 400
FREQUENCY (MHz)
FIGURE 9. REVERSE GAIN AND PHASE (S12) FIGURE 10. TWO-TONE, THIRD ORDER INTERMODULATION
INTERCEPT
-30
-40
-50
-60
-70
DISTORTION (dBc)
-80
-90
-100
-5 -3 -1 1 3 5 7 9 11 13 OUTPUT POWER (dBm)
100 MHz
50 MHz
30 MHz
FIGURE 11. SECOND HARMONIC DISTORTION vs P
OUT
-30
-40
-50
-60
-70
-80
DISTORTION (dBc)
-90
-100
-5 -3 -1 1 3 5 7 9 11 13 OUTPUT POWER (dBm)
100 MHz
50 MHz
30 MHz
FIGURE 12. THIRD HARMONIC DISTORTION vs P
5
OUT
Page 6
HFA1110
Typical Performance Curves V
0.8
0.4
0.2 0
-0.2
-0.4
-0.8
SETTLING ERROR (%)
-5 0 5 10 15 20 25 30 35 40 45 TIME (ns)
FIGURE 13. SETTLING RESPONSE FIGURE 14. RECOMMENDED SERIES OUTPUT RESISTORvs
21
18
15
12
9
OVERSHOOT (%)
6
3
VO = 0.5V
= ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY
V
= 1V
OUT
50 45 40 35 30
(Ω)
25
S
R
20 15 10
5 0
0 40 80 120 160 200 240 280 320 360
C
LOAD
0.04
0.02
VO = 2.0V
VO = 1.0V
P-P
P-P
P-P
0
ERROR (%)
-0.02
CL (pF)
= 200Ω
R
L
RL = 100Ω
RL = 1kΩ
0
200 300 400 500 600 700 800 900 1000
INPUT RISE TIME (ps)
-0.04
-3.0 -2.0 -1.0 0 1.0 2.0 3.0 INPUT VOLTAGE (V)
FIGURE 15. OVERSHOOT vs INPUT RISETIME FIGURE 16. INTEGRAL LINEARITY ERROR
22 21 20 19 18 17 16 15 14 13 12 11 10
SUPPLY CURRENT (mA)
9 8 7 6 5
59
678 10
TOTAL SUPPLY VOLTAGE (V+ - V-, V)
25
24
23
22
21
20
19
SUPPLY CURRENT (mA)
18
17
-60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (
o
C)
FIGURE 17. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 18. SUPPLY CURRENT vs TEMPERATURE
6
Page 7
HFA1110
Typical Performance Curves V
32 30 28 26 24 22 20 18 16 14 12
BIAS CURRENT (µA)
10
8 6 4
-60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC)
= ±5V, TA = 25oC, RL = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY
10
9.8
9.6
9.4
9.2 9
8.8
8.6
8.4
8.2
OUTPUT OFFSET VOLTAGE (mV)
8
7.8
-60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (
FIGURE 19. BIAS CURRENT vs TEMPERATURE FIGURE 20. OFFSET VOLTAGE vs TEMPERATURE
3.8
3.7
3.6
3.5
+V
(RL = 100Ω)
OUT
3.4
3.3
|-V
|(RL = 100Ω)
OUT
3.2 |-V
|(RL = 50Ω)
3.1
OUTPUT VOLTAGE (V)
2.9
2.8
OUT
3
-60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC)
+V
(RL = 50Ω)
OUT
100
80
60
40
20
NOISE VOLTAGE (nV/√Hz)
0
100 1K 10K 100K
FREQUENCY (Hz)
o
C)
200
160
120
80
I
NI
40
NOISE CURRENT (pA/√Hz)
E
NI
0
FIGURE 21. OUTPUT VOLTAGE vs TEMPERATURE FIGURE 22. INPUT NOISE vs FREQUENCY
7
Page 8
Die Characteristics
HFA1110
DIE DIMENSIONS:
63 mils x 44 mils x 19 mils 1600µm x 1130µm x 483µm
METALLIZATION:
Type: Metal 1: AlCu(2%)/TiW Thickness: Metal 1: 8k
Å ±0.4kÅ
Type: Metal 2: AlCu(2%) Thickness: Metal 2: 16k
Å ±0.8kÅ
Metallization Mask Layout
V-
NC
HFA1110
PASSIVATION:
Type: Nitride Thickness: 4k
Å ±0.5kÅ
TRANSISTOR COUNT:
52
SUBSTRATE POTENTIAL (POWERED UP):
Floating (Recommend Connection to V-)
IN
NC
NC
NC
NC
V+
OUT
8
Page 9
Small Outline Plastic Packages (SOIC)
HFA1110
N
INDEX AREA
123
-A-
E
-B-
SEATING PLANE
D
A
-C-
0.25(0.010) BM M
H
L
h x 45
o
α
e
B
0.25(0.010) C AM BS
M
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension“D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrsshall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter­lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. Thechamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controllingdimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
A1
C
0.10(0.004)
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES MILLIMETERS
SYMBOL
A 0.0532 0.0688 1.35 1.75 -
A1 0.0040 0.0098 0.10 0.25 -
B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 ­D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 e 0.050 BSC 1.27 BSC ­H 0.2284 0.2440 5.80 6.20 ­h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N8 87
o
α
0
o
8
o
0
o
8
Rev. 0 12/93
NOTESMIN MAX MIN MAX
-
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240
9
EUROPE
Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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