
INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4520B
MSI
Dual binary counter
Product specification
File under Integrated Circuits, IC04
January 1995

Philips Semiconductors Product specification
Dual binary counter
DESCRIPTION
The HEF4520B is a dual 4-bit internally synchronous
binary counter. The counter has an active HIGH clock
input (CP0) and an active LOW clock input (CP1), buffered
outputs from all four bit positions (O0to O3) and an active
HIGH overriding asynchronous master reset input (MR).
The counter advances on either the LOW to HIGH
transition of the CP0input if CP1is HIGH or the HIGH to
HEF4520B
MSI
LOW transition of the
CP1may be used as the clock input to the counter and the
other clock input may be used as a clock enable input. A
HIGH on MR resets the counter (O0to O3= LOW)
independent of CP0, CP1.
Schmitt-trigger action in the clock input makes the circuit
highly tolerant to slower clock rise and fall times.
CP1input if CP0 is low. Either CP0or
Fig.2 Pinning diagram.
Fig.1 Functional diagram.
PINNING
,CP
CP
0A
0B
CP1A, CP
MR
O
0A
O
0B
,MR
A
to O
to O
1B
B
3A
3B
FAMILY DATA, I
clock inputs (L to H triggered)
clock inputs (H to L triggered)
master reset inputs
outputs
outputs
LIMITS category MSI
DD
See Family Specifications
HEF4520BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4520BD(F): 16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4520BT(D): 16-lead SO; plastic (SOT109-1)
(SOT109-1)
( ): Package Designator North America
January 1995 2

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January 1995 3
Fig.3 Logic diagram (one counter).
FUNCTION TABLE
Philips Semiconductors Product specification
Dual binary counter
CP
L L counter advances
X L no change
H L no change
XXHO
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
CP
0
H L counter advances
X L no change
L L no change
= positive-going transition
= negative-going transition
MR MODE
1
to O3= LOW
0
HEF4520B
MSI

Philips Semiconductors Product specification
Dual binary counter
AC CHARACTERISTICS
V
= 0 V; T
SS
Propagation delays
CP0, CP1→ O
HIGH to LOW 10 t
LOW to HIGH 10 t
MR → O
HIGH to LOW 10 t
Output transition
times 5 60 120 ns 10 ns + (1,0 ns/pF) C
HIGH to LOW 10 t
LOW to HIGH 10 t
Minimum CP
pulse width; LOW 10 t
Minimum CP
pulse width; HIGH 10 t
Minimum MR 5 30 15 ns
pulse width; HIGH 10 t
Recovery time 5 50 25 ns
for MR 10 t
Set-up times 5 50 25 ns
CP
→ CP
0
CP1→ CP
Maximum clock 5 8 16 MHz
pulse frequency 10 f
=25°C; CL= 50 pF; input transition times ≤ 20 ns
amb
V
DD
V
n
SYMBOL MIN. TYP. MAX.
5 110 220 ns 83 ns + (0,55 ns/pF) C
PHL
15 40 80 ns 32 ns + (0,16 ns/pF) C
5 110 220 ns 83 ns + (0,55 ns/pF) C
PLH
15 40 80 ns 32 ns + (0,16 ns/pF) C
n
5 75 150 ns 48 ns + (0,55 ns/pF) C
PHL
15 25 50 ns 17 ns + (0,16 ns/pF) C
THL
15 20 40 ns 6 ns + (0,28 ns/pF) C
5 60 120 ns 10 ns + (1,0 ns/pF) C
TLH
15 20 40 ns 6 ns + (0,28 ns/pF) C
0
56030ns
WCPL
30 15 ns
15 20 10 ns
1
56030ns
WCPH
30 15 ns
15 20 10 ns
WMRH
20 10 ns
15 16 8 ns
RMR
30 15 ns
15 20 10 ns
1
10 t
su
30 15 ns
15 20 10 ns
55025ns
0
10 t
su
30 15 ns
15 20 10 ns
max
15 30 MHz
15 20 40 MHz
TYPICAL EXTRAPOLATION
FORMULA
50 100 ns 39 ns + (0,23 ns/pF) C
50 100 ns 39 ns + (0,23 ns/pF) C
35 70 ns 24 ns + (0,23 ns/pF) C
30 60 ns 9 ns + (0,42 ns/pF) C
30 60 ns 9 ns + (0,42 ns/pF) C
see also waveforms
Figs 4 and 5
HEF4520B
MSI
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
January 1995 4

Philips Semiconductors Product specification
Dual binary counter
AC CHARACTERISTICS
V
= 0 V; T
SS
Dynamic power 5 850 f
dissipation per 10 3 800 f
package (P) 15 10 200 f
=25°C; input transition times ≤ 20 ns
amb
V
DD
V
TYPICAL FORMULA FOR P (µW)
+∑(foCL) × V
i
+∑(foCL) × V
i
+∑(foCL) × V
i
DD
DD
DD
HEF4520B
MSI
2
2
2
where
fi= input freq. (MHz)
fo= output freq. (MHz)
= load capacitance (pF)
C
L
∑(f
) = sum of outputs
oCL
V
= supply voltage (V)
DD
Fig.4 Waveforms showing recovery time for MR; minimum CP0, CP1and MR pulse widths.
January 1995 5

Philips Semiconductors Product specification
Dual binary counter
HEF4520B
MSI
Fig.5 Waveforms showing set-up times for CP0to CP1and CP1 to CP0, and propagation delays.
January 1995 6

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January 1995 7
Fig.6 Timing diagram.
Philips Semiconductors Product specification
Dual binary counter
HEF4520B
MSI