Datasheet HEF4514BU, HEF4514BT, HEF4514BPB, HEF4514BP, HEF4514BDB Datasheet (Philips)

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Page 1
DATA SH EET
Product specification File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF4514B MSI
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
Page 2
January 1995 2
Philips Semiconductors Product specification
1-of-16 decoder/demultiplexer with input latches
HEF4514B
MSI
DESCRIPTION
The HEF4514B is a 1-of-16 decoder/demultiplexer, having four binary weighted address inputs (A0to A3), a latch enable input (EL), and an active LOW enable input (E). The 16 outputs (O0to O15) are mutually exclusive active HIGH. When EL is HIGH, the selected output is determined by the data on An. When EL goes LOW, the
last data present at A
n
are stored in the latches and the outputs remain stable. When E is LOW, the selected output, determined by the contents of the latch, is HIGH. AtE HIGH, all outputs are LOW. The enable input (E) does not affect the state of the latch. When the HEF4514B is used as a demultiplexer, E is the data input and A0to A3are the address inputs.
Fig.1 Functional diagram.
PINNING
A
0
to A
3
address inputs E enable input (active LOW) EL latch enable input O
0
to O
15
outputs (active HIGH)
Fig.2 Pinning diagram.
APPLICATION INFORMATION
Some examples of applications for the HEF4514B are:
• Digital multiplexing.
• Address decoding.
• Hexadecimal/BCD decoding.
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
HEF4514BP(N): 24-lead DIL; plastic
(SOT101-1)
HEF4514BD(F): 24-lead DIL; ceramic (cerdip)
(SOT94)
HEF4514BT(D): 24-lead SO; plastic
(SOT137-1)
( ): Package Designator North America
Page 3
January 1995 3
Philips Semiconductors Product specification
1-of-16 decoder/demultiplexer with input latches
HEF4514B
MSI
Fig.3 Logic diagram.
Fig.4 Logic diagram (one latch).
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January 1995 4
Philips Semiconductors Product specification
1-of-16 decoder/demultiplexer with input latches
HEF4514B
MSI
TRUTH TABLE
Notes
1. EL = HIGH; H = HIGH state (the more positive voltage); L = LOW state (the less positive voltage); X = state is immaterial
AC CHARACTERISTICS
V
SS
=0V; T
amb
=25°C; CL= 50 pF; input transition times ≤ 20 ns
INPUTS OUTPUTS
EA0A1A2A3O0O1O2O3O4O5O6O7O8O9O10O11O12O13O
14
O
15
HXXXXLLLLLLLLLLLLLL L L LLLLLHLLLLLLLLLLLLLL L LHLLLLHLLLLLLLLLLLL L L LLHLLLLHLLLLLLLLLLL L L LHHLLLLLHLLLLLLLLLL L L LLLHLLLLLHLLLLLLLLLL L LHLHLLLLLLHLLLLLLLLL L LLHHLLLLLLLHLLLLLLLL L LHHHLLLLLLLLHLLLLLLL L LLLLHLLLLLLLLHLLLLLL L LHLLHLLLLLLLLLHLLLLL L LLHLHLLLLLLLLLLHLLLL L LHHLHLLLLLLLLLLLHLLL L LLLHHLLLLLLLLLLLLHLL L LHLHHLLLLLLLLLLLLLHL L LLHHHLLLLLLLLLLLLLLHL LHHHHLLLLLLLLLLLLLLL H
V
DD
V
SYMBOL TYP. MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
An,EL→O
n
5 260 520 ns 233 ns + (0,55 ns/pF) C
L
HIGH to LOW 10 t
PHL
95 190 ns 84 ns + (0,23 ns/pF) C
L
15 65 130 ns 57 ns + (0,16 ns/pF) C
L
5 270 550 ns 243 ns + (0,55 ns/pF) C
L
LOW to HIGH 10 t
PLH
95 190 ns 84 ns + (0,23 ns/pF) C
L
15 65 130 ns 57 ns + (0,16 ns/pF) C
L
E → O
n
5 175 350 ns 148 ns + (0,55 ns/pF) C
L
HIGH to LOW 10 t
PHL
65 130 ns 54 ns + (0,23 ns/pF) C
L
15 45 90 ns 37 ns + (0,16 ns/pF) C
L
5 200 400 ns 173 ns + (0,55 ns/pF) C
L
LOW to HIGH 10 t
PLH
70 140 ns 59 ns + (0,23 ns/pF) C
L
15 50 100 ns 42 ns + (0,16 ns/pF) C
L
Page 5
January 1995 5
Philips Semiconductors Product specification
1-of-16 decoder/demultiplexer with input latches
HEF4514B
MSI
AC CHARACTERISTICS
V
SS
=0V; T
amb
=25°C; CL= 50 pF; input transition times ≤ 20 ns
V
DD
V
SYMBOL MIN. TYP. MAX.
TYPICAL EXTRAPOLATION
FORMULA
Output transition 5 90 180 ns 40 ns + (1,0 ns/pF) C
L
times 10 t
THL
35 65 ns 14 ns + (0,42 ns/pF) C
L
HIGH to LOW 15 25 50 ns 11 ns + (0,28 ns/pF) C
L
5 85 170 ns 35 ns + (1,0 ns/pF) C
L
LOW to HIGH 10 t
TLH
35 70 ns 14 ns + (0,42 ns/pF) C
L
15 25 50 ns 11 ns + (0,28 ns/pF) C
L
Set-up time 5 120 60 ns
see also waveforms Fig.5
A
n
→ EL 10 t
su
40 20 ns
15 30 15 ns
Hold time 5 0 60 ns
A
n
→ EL 10 t
hold
020 ns
15 0 15 ns
Minimum EL pulse 5 120 60 ns
width; HIGH 10 t
WELH
40 20 ns
15 30 15 ns
V
DD
V
TYPICAL FORMULA FOR P (µW)
Dynamic power 5 1100 f
i
+∑(foCL) × V
DD
2
where
dissipation per 10 5500 f
i
+∑(foCL) × V
DD
2
fi= input freq. (MHz)
package (P) 15 16 000 f
i
+∑(foCL) × V
DD
2
fo= output freq. (MHz) C
L
= load capacitance (pF)
∑ (f
oCL
) = sum of outputs
V
DD
= supply voltage (V)
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January 1995 6
Philips Semiconductors Product specification
1-of-16 decoder/demultiplexer with input latches
HEF4514B
MSI
Fig.5 Waveforms showing minimum pulse width for EL, set-up and hold times for Anto EL. Set-up and hold
times are shown as positive values but may be specified as negative values.
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