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INTEGRATED CIRCUITS
DATA SH EET
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4069UB
gates
Hex inverter
Product specification
File under Integrated Circuits, IC04
January 1995
Page 2
Philips Semiconductors Product specification
Hex inverter
DESCRIPTION
The HEF4069UB is a general purpose hex inverter. Each
of the six inverters is a single stage.
HEF4069UB
gates
Fig.2 Pinning diagram.
Fig.1 Functional diagram.
HEF4069UBP(N): 14-lead DIL; plastic
(SOT27-1)
HEF4069UBD(F): 14-lead DIL; ceramic (cerdip)
(SOT73)
HEF4069UBT(D): 14-lead SO; plastic
(SOT108-1)
( ): Package Designator North America
FAMILY DATA, IDDLIMITS category GATES
See Family Specifications for V
unbuffered stages
IH/VIL
Fig.3 Schematic diagram (one inverter).
January 1995 2
Page 3
Philips Semiconductors Product specification
Hex inverter
HEF4069UB
AC CHARACTERISTICS
V
= 0 V; T
SS
Propagation delays 5 45 90 ns 18 ns + (0,55 ns/pF) C
In→ O
HIGH to LOW 15 15 25 ns 7 ns + (0,16 ns/pF) C
LOW to HIGH 10 t
Output transition times 5 60 120 ns 10 ns + (1,0 ns/pF) C
HIGH to LOW 10 t
LOW to HIGH 10 t
=25°C; CL= 50 pF; input transition times ≤ 20 ns
amb
V
DD
V
n
10 t
SYMBOL TYP. MAX.
PHL
54080ns13ns+(0,55 ns/pF) C
PLH
15 15 30 ns 7 ns + (0,16 ns/pF) C
THL
15 20 40 ns 6 ns + (0,28 ns/pF) C
5 60 120 ns 10 ns + (1,0 ns/pF) C
TLH
15 20 40 ns 6 ns + (0,28 ns/pF) C
TYPICAL EXTRAPOLATION FORMULA
20 40 ns 9 ns + (0,23 ns/pF) C
20 40 ns 9 ns + (0,23 ns/pF) C
30 60 ns 9 ns + (0,42 ns/pF) C
30 60 ns 9 ns + (0,42 ns/pF) C
gates
L
L
L
L
L
L
L
L
L
L
L
L
V
DD
V
TYPICAL FORMULA FOR P (µW)
Dynamic power 5 600 f
dissipation per 10 4 000 f
package (P) 15 22 000 f
+∑(foCL) × V
i
+∑(foCL) × V
i
+∑(foCL) × V
i
DD
DD
DD
2
2
2
where
fi= input freq. (MHz)
fo= output freq. (MHz)
C
= load capacitance (pF)
L
∑ (f
) = sum of outputs
oCL
= supply voltage (V)
V
DD
January 1995 3
Page 4
Philips Semiconductors Product specification
Hex inverter
HEF4069UB
gates
Fig.4 Typical transfer characteristics;
___ VO;
___ID(drain current);
IO= 0; VDD= 5 V.
Fig.5 Typical transfer characteristics;
Fig.6 Typical transfer characteristics;
January 1995 4
___ VO;
___ID(drain current);
IO= 0; VDD= 10 V.
___ VO;
___ID(drain current);
IO= 0; VDD= 15 V.
Page 5
Philips Semiconductors Product specification
Hex inverter
HEF4069UB
gates
APPLICATION INFORMATION
Some examples of applications for the HEF4069UB are shown below.
In Fig.7 an astable relaxation oscillator is given. The oscillation frequency is mainly determined by R1C1, provided
R1 << R2 and R2C2 << R1C1.
(a)
(b)
The function of R2 is to minimize the influence of the forward voltage across
the protection diodes on the frequency; C2 is a stray (parasitic) capacitance.
The period T
T
is given by Tp=T1+T2, in which
p
V
+
DDVST
---------------------------- -
R1C1 In
1
V
ST
and T
2
R1C1 In
2V
–
DDVST
--------------------------------- –
V
DDVST
where==
is the signal threshold level of the inverter. The period is fairly independent
V
ST
, VST and temperature. The duty factor, however, is influenced by VST.
of V
DD
Fig.7 (a) Astable relaxation oscillator using two HEF4069UB inverters; the diodes may be BAW62; C2 is a
parasitic capacitance. (b) Waveforms at the points marked A, B, C and D in the circuit diagram.
January 1995 5
Page 6
Philips Semiconductors Product specification
Hex inverter
Fig.8 Crystal oscillator for frequencies up to 10 MHz, using two HEF4069UB inverters.
HEF4069UB
gates
(1) This inverter is added to amplify the
oscillator output voltage to a level
sufficient to drive other LOCMOS circuits.
Fig.9 Voltage gain (VO/VI) as a function of supply
voltage.
January 1995 6
Fig.10 Supply current as a function of supply voltage.
It is also an example of an analogue
amplifier using one HEF4069UB.
Fig.11 Test set-up for measuring graphs of Figs 9
and 10.
Page 7
Philips Semiconductors Product specification
Hex inverter
HEF4069UB
Fig.12 Test set-up for measuring forward transconductance gfs=dio/dviat vois constant (see also graph
Fig.13).
gates
A : average,
B : average + 2 s,
C : average −2 s, where:
‘s’ is the observed standard
deviation.
Fig.13 Typical forward transconductance gfsas a function of the supply voltage at T
January 1995 7
amb
=25°C.
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