Datasheet HEF4052BU, HEF4052BT, HEF4052BPB, HEF4052BP, HEF4052BDB Datasheet (Philips)

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Page 1
DATA SH EET
Product specification File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF4052B MSI
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
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January 1995 2
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
DESCRIPTION
The HEF4052B is a dual 4-channel analogue multiplexer/demultiplexer with common channel select logic. Each multiplexer/demultiplexer has four independent inputs/outputs (Y0to Y3) and a common input/output (Z). The common channel select logic includes two address inputs (A0and A1) and an active LOW enable input (
E).
Both multiplexers/demultiplexers contain four bidirectional analogue switches, each with one side connected to an independent input/output (Y
0
to Y3) and the other side connected to a common input/output (Z).
With E LOW, one of the four switches is selected (low impedance ON-state) by A0and A1. With E HIGH, all switches are in the high impedance OFF-state, independent of A0and A1.
VDDand VSSare the supply voltage connections for the digital control inputs (A0,A1 and E). The VDDto VSSrange is 3 to 15 V. The analogue inputs/outputs (Y0to Y3, and Z) can swing between VDDas a positive limit and VEEas a negative limit. VDD− VEEmay not exceed 15 V.
For operation as a digital multiplexer/demultiplexer, VEEis connected to VSS(typically ground).
Fig.1 Functional diagram.
PINNING
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
Y
0A
to Y
3A
independent inputs/outputs
Y
0B
to Y
3B
independent inputs/outputs
A
0
, A
1
address inputs E enable input (active LOW) Z
A
, Z
B
common inputs/outputs
HEF4052BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4052BD(F): 16-lead DIL; ceramic
(cerdip)
(SOT74)
HEF4052BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
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January 1995 3
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
FUNCTION TABLE
Notes
1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Note
1. To avoid drawing V
DD
current out of terminal Z, when switch current flows into terminals Y, the voltage drop across the bidirectional switch must not exceed 0,4 V. If the switch current flows into terminal Z, no VDDcurrent will flow out of terminals Y, in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may not exceed VDDor VEE.
INPUTS CHANNEL
ON
EA
1
A
0
LLLY
0A−ZA
; Y0B−Z
B
LLHY
1A−ZA
; Y1B−Z
B
LHL Y
2A−ZA
; Y2B−Z
B
LHHY
3A−ZA
; Y3B−Z
B
H X X none
Supply voltage (with reference to VDD)V
EE
−18 to + 0,5 V
Fig.3 Schematic diagram (one switch).
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January 1995 4
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
Fig.4 Logic diagram.
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January 1995 5
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
DC CHARACTERISTICS
T
amb
=25°C
V
DD−VEE
V
SYMBOL TYP. MAX. CONDITIONS
5 350 2500 Ω
V
is
= 0 to VDD−V
EE
see Fig.6
ON resistance 10 R
ON
80 245 Ω
15 60 175 Ω
5 115 340 Ω
V
is
=0
see Fig.6
ON resistance 10 R
ON
50 160 Ω
15 40 115 Ω
5 120 365 Ω
V
is=VDD−VEE
see Fig.6
ON resistance 10 R
ON
65 200 Ω
15 50 155 Ω
‘∆’ ON resistance 5 25 −Ω
V
is
= 0 to VDD−V
EE
see Fig.6
between any two 10 ∆R
ON
10 −Ω channels 15 5 −Ω OFF-state leakage 5 −−nA
E at V
DD
current, all 10 I
OZZ
−−nA channels OFF 15 − 1000 nA OFF-state leakage 5 −−nA
E at V
SS
current, any 10 I
OZY
−−nA channel 15 − 200 nA
Fig.5 Operating area as a function of the supply voltages.
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January 1995 6
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
Fig.6 Test set-up for measuring RON.
Fig.7 Typical RONas a function of input voltage.
Iis= 200 µA VSS=VEE=0 V
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January 1995 7
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
AC CHARACTERISTICS
V
EE=VSS
= 0 V; T
amb
=25°C; input transition times ≤ 20 ns
AC CHARACTERISTICS
V
EE=VSS
= 0 V; T
amb
=25°C; input transition times ≤ 20 ns
V
DD
V
TYPICAL FORMULA FOR P (µW)
Dynamic power 5 1 300 f
i
+∑(foCL) × V
DD
2
where
dissipation per 10 6 100 f
i
+∑(foCL) × V
DD
2
fi= input freq. (MHz)
package (P) 15 15 600 f
i
+∑(foCL) × V
DD
2
fo= output freq. (MHz) C
L
= load capacitance (pF)
∑(f
oCL
) = sum of outputs
V
DD
= supply voltage (V)
V
DD
V
SYMBOL TYP. MAX.
Propagation delays
Vis→ V
os
51020ns
note 1HIGH to LOW 10 t
PHL
510ns
15 5 10 ns
51020ns
note 1LOW to HIGH 10 t
PLH
510ns
15 5 10 ns
A
n
→ V
os
5 150 305 ns
note 2HIGH to LOW 10 t
PHL
65 135 ns
15 50 100 ns
5 150 300 ns
note 2LOW to HIGH 10 t
PLH
75 150 ns
15 50 100 ns
Output disable times
E → V
os
5 95 190 ns
note 3HIGH 10 t
PHZ
90 180 ns
15 90 180 ns
5 100 205 ns
note 3LOW 10 t
PLZ
90 180 ns
15 90 180 ns
Output enable times
E → V
os
5 130 260 ns
note 3HIGH 10 t
PZH
55 115 ns
15 45 85 ns
5 120 240 ns
note 3LOW 10 t
PZL
50 100 ns
15 35 75 ns
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January 1995 8
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
Notes
Visis the input voltage at a Y or Z terminal, whichever is assigned as input. Vosis the output voltage at a Y or Z terminal, whichever is assigned as output.
1. RL= 10 kΩ to VEE; CL= 50 pF to VEE; E=VSS; Vis=VDD(square-wave); see Fig.8.
2. RL= 10 kΩ; CL= 50 pF to VEE; E=VSS; An=VDD(square-wave); Vis=VDDand RLto VEEfor t
PLH
; Vis=VEEand
RLto VDDfor t
PHL
; see Fig.8.
3. RL= 10 kΩ; CL= 50 pF to VEE; E=VDD(square-wave); Vis=VDDand RLto VEEfor t
PHZ
and t
PZH
;
Vis=VEEand RLto VDDfor t
PLZ
and t
PZL
; see Fig.8.
4. RL= 10 kΩ; CL= 15 pF; channel ON; Vis=1⁄2V
DD (p-p)
(sine-wave, symmetrical about1⁄2VDD);
fis= 1 kHz; see Fig.9.
5. RL=1 kΩ; Vis=1⁄2V
DD (p-p)
(sine-wave, symmetrical about1⁄2VDD);
6. RL= 10 kΩ to VEE; CL= 15 pF to VEE; E or An=VDD(square-wave); crosstalk is Vos (peak value); see Fig.8.
7. RL=1 kΩ; CL= 5 pF; channel OFF; Vis=1⁄2V
DD (p-p)
(sine-wave, symmetrical about1⁄2VDD);
8. RL=1 kΩ; CL= 5 pF; channel ON; Vis=1⁄2V
DD (p-p)
(sine-wave, symmetrical about1⁄2VDD);
Distortion, sine-wave 5 0,25 %
note 4response 10 0,04 %
15 0,04 %
Crosstalk between 5 − MHz
note 5any two channels 10 1 MHz
15 − MHz
Crosstalk; enable 5 − mV
note 6or address input 10 50 mV
to output 15 − mV
OFF-state 5 − MHz
note 7feed-through 10 1 MHz
15 − MHz
ON-state frequency 5 13 MHz
note 8response 10 40 MHz
15 70 MHz
V
DD
V
SYMBOL TYP. MAX.
20 log
V
os
V
is
-------- -
50 dB; see Fig. 10.–=
20 log
V
os
V
is
-------- -
50 dB; see Fig. 9.–=
20 log
V
os
V
is
-------- -
3 dB; see Fig. 9.–=
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January 1995 9
Philips Semiconductors Product specification
Dual 4-channel analogue multiplexer/demultiplexer
HEF4052B
MSI
Fig.8 Fig.9
APPLICATION INFORMATION
Some examples of applications for the HEF4052B are:
• Analogue multiplexing and demultiplexing.
• Digital multiplexing and demultiplexing.
• Signal gating.
NOTE
If break before make is needed, then it is necessary to use the enable input.
Fig.10
(a)
(b)
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