Page 1
DATA SH EET
Product specification
File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF4014B
MSI
8-bit static shift register
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
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January 1995 2
Philips Semiconductors Product specification
8-bit static shift register
HEF4014B
MSI
DESCRIPTION
The HEF4014B is a fully synchronous edge-triggered 8-bit
static shift register with eight synchronous parallel inputs
(P0 to P7), a synchronous serial data input (DS), a
synchronous parallel enable input (PE), a LOW to HIGH
edge-triggered clock input (CP) and buffered parallel
outputs from the last three stages (O5 to O7).
Operation is synchronous and the device is edge-triggered
on the LOW to HIGH transition of CP. Each register stage
is of a D-type master-slave flip-flop. When PE is HIGH,
data is loaded into the register from P
0
to P7 on the LOW
to HIGH transition of CP. When PE is LOW, data is shifted
to the first position from DS, and all the data in the register
is shifted one position to the right on the LOW to HIGH
transition of CP. Schmitt-trigger action in the clock input
makes the circuit highly tolerant to slower clock rise and
fall times
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
FAMILY DATA, IDDLIMITS category MSI
See Family Specifications
HEF4014BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4014BD(F): 16-lead DIL; ceramic (cerdip)
(SOT74)
HEF4014BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
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January 1995 3
Philips Semiconductors Product specification
8-bit static shift register
HEF4014B
MSI
Fig.3 Logic diagram.
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January 1995 4
Philips Semiconductors Product specification
8-bit static shift register
HEF4014B
MSI
PINNING
FUNCTION TABLES
Serial operation
PE parallel enable input
P
0
to P7parallel data inputs
D
S
serial data input
CP clock input (LOW to HIGH edge-triggered)
O
5
to O7buffered parallel outputs from the last three
stages
n
INPUTS OUTPUTS
CP D
S
PE O
5
O
6
O
7
1D
1
LXXX
2D
2
LXXX
3D
3
LXXX
6XLD
1
XX
7XLD
2
D
1
X
8XLD
3
D
2
D
1
X X no change
Parallel operation
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
= positive-going transition
= negative-going transition
D
n
= either HIGH or LOW
n = number of clock pulse transitions
n
INPUTS OUTPUTS
CP D
S
PE O
5
O
6
O
7
1XHP
5
P
6
P
7
X X no change
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25 °C; CL = 50 pF; input transition times ≤ 20 ns
V
DD
V
TYPICAL FORMULA FOR P (µW)
Dynamic power 5 900 f
i
+∑ (foCL) × V
DD
2
where
dissipation per 10 4 300 f
i
+∑ (foCL) × V
DD
2
fi= input freq. (MHz)
package (P) 15 12 000 f
i
+∑ (foCL) × V
DD
2
fo= output freq. (MHz)
C
L
= load cap. (pF)
∑ (f
oCL
) = sum of outputs
V
DD
= supply voltage (V)
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January 1995 5
Philips Semiconductors Product specification
8-bit static shift register
HEF4014B
MSI
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25 °C; CL = 50 pF; input transition times ≤ 20 ns
V
DD
V
SYMBOL MIN. TYP. MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
CP→ O
n
5 130 260 ns 103 ns + (0,55 ns/pF) C
L
HIGH to LOW 10 t
PHL
55 110 ns 44 ns + (0,23 ns/pF) C
L
15 40 80 ns 32 ns + (0,16 ns/pF) C
L
5 115 230 ns 88 ns + (0,55 ns/pF) C
L
LOW to HIGH 10 t
PLH
50 100 ns 39 ns + (0,23 ns/pF) C
L
15 40 80 ns 32 ns + (0,16 ns/pF) C
L
Output transition times 5 60 120 ns 10 ns + (1,0 ns/pF) C
L
HIGH to LOW 10 t
THL
30 60 ns 9 ns + (0,42 ns/pF) C
L
15 20 40 ns 6 ns + (0,28 ns/pF) C
L
5 60 120 ns 10 ns + (1,0 ns/pF) C
L
LOW to HIGH 10 t
TLH
30 60 ns 9 ns + (0,42 ns/pF) C
L
15 20 40 ns 6 ns + (0,28 ns/pF) C
L
Set-up times 5 40 10 ns
see also waveforms Fig.4
PE → CP 10 t
su
25 5 ns
15 15 0 ns
535−5ns
D
S
→CP 10 t
su
25 −5ns
15 25 0 ns
535−5ns
P
n
→CP 10 t
su
25 −5ns
15 25 0 ns
Hold times 5 25 −5ns
PE → CP 10 t
hold
20 0 ns
15 15 0 ns
53015ns
D
S
→CP 10 t
hold
20 10 ns
15 15 7 ns
53015ns
P
n
→CP 10 t
hold
20 10 ns
15 15 7 ns
Minimum clock 5 70 35 ns
pulse width; LOW 10 t
WCPL
30 15 ns
15 24 12 ns
Maximum clock 5 6 13 MHz
pulse frequency 10 f
max
15 30 MHz
15 20 40 MHz
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January 1995 6
Philips Semiconductors Product specification
8-bit static shift register
HEF4014B
MSI
APPLICATION INFORMATION
Some examples of applications for the HEF4014B are:
• Parallel-to-serial converter
• Serial data queueing
• General purpose register
Fig.4 Waveforms showing minimum clock pulse width, and set-up and hold times for PE to CP, DS to CP, and P to CP. Set-up and hold times
are shown as positive values but may be specified as negative values.
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