Datasheet HEF40098BU, HEF40098BT, HEF40098BPB, HEF40098BP, HEF40098BDB Datasheet (Philips)
...Page 1
DATA SH EET
Product specification
File under Integrated Circuits, IC04
January 1995
INTEGRATED CIRCUITS
HEF40098B
buffers
3-state hex inverting buffer
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
Page 2
January 1995 2
Philips Semiconductors Product specification
3-state hex inverting buffer
HEF40098B
buffers
DESCRIPTION
The HEF40098B is a hex inverting buffer with 3-state
outputs. The 3-state outputs are controlled by two enable
inputs (EO4 and EO2). A HIGH on EO4causes four of the
six buffer elements to assume a high impedance or
OFF-state regardless of the other input conditions and a
HIGH on EO2causes the outputs of the remaining two
buffer elements to assume a high impedance or OFF-state
regardless of the other input conditions.
Fig.1 Functional diagram.
PINNING
FAMILY DATA, IDDLIMITS category BUFFERS
See Family Specifications
HEF40098BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF40098BD(F): 16-lead DIL; ceramic (cerdip)
(SOT74)
HEF40098BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
I
1
to I
6
buffer inputs
EO4, EO
2
enable inputs (active LOW)
O
1
to O
6
buffer outputs (active LOW)
Fig.2 Pinning diagram.
Page 3
January 1995 3
Philips Semiconductors Product specification
3-state hex inverting buffer
HEF40098B
buffers
DC CHARACTERISTICS
V
SS
=0V
HEF
V
DD
V
V
OH
V
V
OL
V
SYMBOL
T
amb
(°C)
−40 +25 +85
MIN. MAX. MIN. MAX. MIN. MAX.
Output current 5 4,6 1,2 1,0 0,8 mA
HIGH 10 9,5 −I
OH
3,8 3,2 2,5 mA
15 13,5 12,0 10,0 8,0 mA
HIGH 5 2,5 −I
OH
3,8 3,2 2,5 mA
Output current 4,75 0,4 3,5 2,9 2,3 mA
LOW 10 0,5 I
OL
12,0 10,0 8,0 mA
15 1,5 24,0 20,0 16,0 mA
HEC
V
DD
V
V
OH
V
V
OL
V
SYMBOL
T
amb
(°C)
−55 +25 +125
MIN. MAX. MIN. MAX. MIN. MAX.
Output current 5 4,6 1,25 1,0 0,6 mA
HIGH 10 9,5 −I
OH
4,0 3,2 2,1 mA
15 12,5 12,5 10,0 6,7 mA
HIGH 5 2,5 −I
OH
4,0 3,2 2,1 mA
Output current 4,75 0,4 3,6 2,9 1,9 mA
LOW 10 0,5 I
OL
12,5 10,0 6,7 mA
15 1,5 25,0 20,0 13,0 mA
Fig.3 Logic diagram.
Page 4
January 1995 4
Philips Semiconductors Product specification
3-state hex inverting buffer
HEF40098B
buffers
AC CHARACTERISTICS
V
SS
=0V; T
amb
=25°C; CL= 50 pF; input transition times ≤ 20 ns
V
DD
V
SYMBOL TYP. MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
In→ O
n
5 80 160 ns 70 ns + (0,20 ns/pF) C
L
HIGH to LOW 10 t
PHL
35 70 ns 31 ns + (0,08 ns/pF) C
L
15 25 50 ns 22 ns + (0,06 ns/pF) C
L
5 65 130 ns 50 ns + (0,30 ns/pF) C
L
LOW to HIGH 10 t
PLH
30 60 ns 24 ns + (0,13 ns/pF) C
L
15 25 50 ns 23 ns + (0,05 ns/pF) C
L
Output transition times 5 30 60 ns 15 ns + (0,30 ns/pF) C
L
HIGH to LOW 10 t
THL
15 30 ns 10 ns + (0,11 ns/pF) C
L
15 10 20 ns 7 ns + (0,07 ns/pF) C
L
53570ns10ns+(0,50 ns/pF) C
L
LOW to HIGH 10 t
TLH
20 40 ns 8 ns + (0,24 ns/pF) C
L
15 15 30 ns 6 ns + (0,18 ns/pF) C
L
3-state propagation delays
Output disable times
EO2, EO4→ O
n
54585ns
HIGH 10 t
PHZ
35 65 ns
15 30 60 ns
5 65 135 ns
LOW 10 t
PLZ
40 80 ns
15 35 70 ns
Output enable times
EO2, EO4→ O
n
5 70 140 ns
HIGH 10 t
PZH
35 75 ns
15 30 65 ns
5 90 185 ns
LOW 10 t
PZL
40 85 ns
15 35 70 ns
V
DD
V
TYPICAL FORMULA FOR P (µW)
Dynamic power 5 5 000 f
i
+∑(foCL) × V
DD
2
where
dissipation per 10 22 800 f
i
+∑(foCL) × V
DD
2
fi= input freq. (MHz)
package (P) 15 81 000 f
i
+∑(foCL) × V
DD
2
fo= output freq. (MHz)
C
L
= load cap. (pF)
∑ (f
oCL
) = sum of outputs
V
DD
= supply voltage (V)
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