Datasheet HD74LV4040A Datasheet (HIT)

HD74LV4040A

12-stage Binary Counter

ADE-205-282 (Z)

1st Edition
April 1999

Description

The HD74LV4040A is a 12 stage counter. This device is incremented on the falling edge (negative
transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset
input. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook
computers), and the low-power consumption extends the battery life.

Features

• VCC = 2.0 V to 5.5 V operation

• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)

• All outputs VO (Max.) = 5.5 V (@VCC = 0 V)

• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)

• Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)

• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)

Function Table

Inputs Output
CLK CLR Q

↑ L Remains unchanged
↓ L Changed

X H All outputs low
Note: H: High level

L: Low level
X: Immaterial

↑: Low to high transition
↓: High to low transition

n

HD74LV4040A

Pin Arrangement

V

1

Q

12

16

CC

Q

6

Q

5

Q

7

Q

4

Q

3

Q

2

GND

2
3
4
5

6
7
8

15
14
13
12
11
10

Q

11

Q

10

Q

8

Q

9

CLR

CLK

9

Q

1

(Top view)

2

HD74LV4040A

Absolute Maximum Ratings

Item Symbol Ratings Unit Conditions

Supply voltage range V
Input voltage range*
Output voltage range*

1

1, 2

Input clamp current I
Output clamp current I
Continuous output current I
Continuous current through

V

or GND

CC

Maximum power dissipation
at Ta = 25°C (in still air)*

3

CC

V

I

V

O

IK

OK

O

or I

I

CC

GND

P

T

Storage temperature Tstg –65 to 150 °C
Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,

no two of which may be realized at the same time.

1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.

2. This value is limited to 5.5 V maximum.

3. The maximum package power dissipation was calculated using a junction temperature of 150°C.

–0.5 to 7.0 V
–0.5 to 7.0 V
–0.5 to VCC + 0.5 V Output: H or L
–0.5 to 7.0 VCC: OFF
–20 mA VI < 0

±50 mA VO < 0 or VO > V
±25 mA VO = 0 to V

CC

±50 mA

785 mW SOP

500 TSSOP

CC

3

HD74LV4040A

Recommended Operating Conditions

Item Symbol Min Max Unit Conditions

Supply voltage range V
Input voltage range V
Output voltage range V
Output current I

CC

I

O

OH

I

OL

Input transition rise or fall rate ∆t /∆v 0 200 ns/V VCC = 2.3 to 2.7 V

Operating free-air temperature Ta –40 85 °C
Note: Unused or floating inputs must be held high or low.

2.0 5.5 V
0 5.5 V
0VCCV H or L
— –50 µAV
—–2 mAV
—–6 V

= 2.0 V

CC

= 2.3 to 2.7 V

CC

= 3.0 to 3.6 V

CC

— –12 VCC = 4.5 to 5.5 V
—50 µAV

= 2.0 V

CC

— 2 mA VCC = 2.3 to 2.7 V
—6 V
—12 V

= 3.0 to 3.6 V

CC

= 4.5 to 5.5 V

CC

0 100 VCC = 3.0 to 3.6 V
020 V

= 4.5 to 5.5 V

CC

4

Logic Diagram

(11)

CLR

(10)

CLK

HD74LV4040A

R

T

R

T

R

T

R

T

R

T

(9)

(7)

(6)

(5)

(3)

Q

1

Q

2

Q

3

Q

4

Q

5

R

T

R

T

R

T

R

T

R

T

(4)

(13)

(12)

(14)

(15)

Q

7

Q

8

Q

9

Q

10

Q

11

R

T

(2)

Q

6

R

T

(1)

Q

12

5

HD74LV4040A

Timing Diagram

CLK

CLR

Q1

Q2

Q3

Q4

Q5

Q6

Q7

Q8

Q9

Q10

Q11

Q12

CLEAR

1

23481632641282565121024 2048 4096

COUNT

CLEAR

6

HD74LV4040A

DC Electrical Characteristics

• Ta = –40 to 85°C

Item Symbol VCC (V)* Min Typ Max Unit Test Conditions

Input voltage V

Output voltage V

Input current I
Quiescent

IH

V

IL

OH

V

OL

IN

I

CC

supply current
Output leakage

I

OFF

current
Input

C

IN

capacitance

Note: For conditions shown as Min or Max, use the appropriate values under recommended operating

conditions.

2.0 1.5 — — V

2.3 to 2.7 VCC × 0.7 — —

3.0 to 3.6 VCC × 0.7 — —

4.5 to 5.5 VCC × 0.7 — —

2.0 — — 0.5

2.3 to 2.7 — — VCC × 0.3

3.0 to 3.6 — — VCC × 0.3

4.5 to 5.5 — — VCC × 0.3
Min to

VCC – 0.1 — — V IOH = –50 µA

Max

2.3 2.0 — — IOH = –2 mA

3.0 2.48 — — IOH = –6 mA

4.5 3.8 — — IOH = –12 mA
Min to

— — 0.1 IOL = 50 µA

Max

2.3 — — 0.4 IOL = 2 mA

3.0 — — 0.44 IOL = 6 mA

4.5 — — 0.55 IOL = 12 mA
0 to 5.5 — — ±1 µAVIN = 5.5 V or GND

5.5 — — 20 µAVIN = VCC or GND, IO = 0

0——5 µAVI or VO = 0 to 5.5 V

3.3 — 3.7 — pF VI = VCC or GND

7

HD74LV4040A

Switching Characteristics

• VCC = 2.5 ± 0.2 V

Ta = 25°C Ta = –40 to 85°C

Item Symbol Min Typ Max Min Max Unit Test Conditions

Maximum f

max

clock
frequency

Propagation t

PLH/tPHL

delay time — 12.7 19.6 1.0 22.2 CL = 50 pF

t

PHL

Propagation

∆t

pd

delay time
skew

Setup time t

Pulse width t

SU

w

50 90 — 40 — MHz CL = 15 pF
30 60 — 25 — CL = 50 pF

— 10.0 16.0 1.0 18.3 ns CL = 15 pF CLK Q

— 9.9 15.4 1.0 17.5 CL = 15 pF CLR
— 11.8 18.0 1.0 20.4 CL = 50 pF
— 3.0 5.5 — 6.3 ns CL = 50 pF Q

7.0 — — 7.0 — ns CLR inactive

7.0 — — 7.0 — ns CLK high or low

7.0 — — 7.0 — CLR high

FROM
(Input)TO(Output)

1

n

Qn + 1

before CLK ↓

8

HD74LV4040A

Switching Characteristics (cont)

• VCC = 3.3 ± 0.3 V

Ta = 25°C Ta = –40 to 85°C

Item Symbol Min Typ Max Min Max Unit Test Conditions

Maximum f

max

clock
frequency

Propagation t

PLH/tPHL

delay time — 10.0 15.4 1.0 17.5 CL = 50 pF

t

PHL

Propagation

∆t

pd

delay time
skew

Setup time t

Pulse width t

SU

w

75 140 — 70 — MHz CL = 15 pF
55 80 — 50 — CL = 50 pF

— 7.5 11.9 1.0 14.0 ns CL = 15 pF CLK Q

— 8.3 12.8 1.0 15.0 CL = 15 pF CLR
— 10.8 16.3 1.0 18.5 CL = 50 pF
— 2.4 4.4 — 5.0 ns CL = 50 pF Q

5.0 — — 5.0 — ns CLR inactive

5.0 — — 5.0 — ns CLK high or low

5.0 — — 5.0 — CLR high

FROM
(Input)TO(Output)

1

n

Qn + 1

before CLK ↓

9

HD74LV4040A

Switching Characteristics (cont)

• VCC = 5.0 ± 0.5 V

Ta = 25°C Ta = –40 to 85°C

Item Symbol Min Typ Max Min Max Unit Test Conditions

Maximum f

max

clock
frequency

Propagation t

PLH/tPHL

delay time — 6.3 9.3 1.0 10.5 CL = 50 pF

t

PHL

Propagation

∆t

pd

delay time
skew

Setup time t

Pulse width t

SU

w

150 210 — 125 — MHz CL = 15 pF
95 125 — 80 — CL = 50 pF

— 4.8 7.3 1.0 8.5 ns CL = 15 pF CLK Q

— 5.6 8.6 1.0 10.0 CL = 15 pF CLR
— 7.1 10.6 1.0 12.0 CL = 50 pF
— 1.6 3.1 — 3.5 ns CL = 50 pF Q

5.0 — — 5.0 — ns CLR inactive

5.0 — — 5.0 — ns CLK high or low

5.0 — — 5.0 — CLR high

FROM
(Input)TO(Output)

1

n

Qn + 1

before CLK ↓

10

Operating Characteristics

• CL = 50 pF

Item Symbol V

Power

C

PD

dissipation
capacitance

= (V) Min Typ Max Unit Test Conditions

CC

3.3 — 17.3 — pF f = 10 MHz

5.0 — 19.0 —

Noise Characteristics

• CL = 50 pF

Item Symbol V

Quiet output,

V

OL (P)

maximum
dynamic V

Quiet output,

OL

V

OL (V)

minimum
dynamic V

Quiet output,

OL

V

OH (V)

minimum
dynamic V

High-level

OH

V

IH (D)

dynamic
input voltage

Low-level

V

IL (D)

dynamic
input voltage

= (V) Min Typ Max Unit Test Conditions

CC

3.3 — 0.4 0.8 V

3.3 — –0.5 -0.8

3.3 — 3.0 —

3.3 2.31 — —

3.3 — — 0.99

HD74LV4040A

Ta = 25°C

Ta = 25°C

11

HD74LV4040A

Test Circuit

Measurement point

*

C

L

Note: C includes the probe and jig capacitance.

L

12

Waveform – 1

HD74LV4040A

CLK

Q1

Waveform – 2

CLK

CLR

50% V

90%
50% V

10%

CC

t

f

CC

t

r

V

CC

GND

t

W

1/f

max

t

PLH

t

t

PHL

W

V

CC

50% V

CC

GND

t

su

t

W

50% V

CC

V

CC

GND

Any Q

t

PHL

50% V

CC

13

HD74LV4040A

Package Dimensions

16

10.06

10.5 Max
9

5.5

1

0.80 Max

1.27

0.42 ± 0.08

± 0.06

0.40

Dimension including the plating thickness

Base material dimension

8

0.12

0.10 ± 0.10

0.15

M

2.20 Max

7.80

0.22 ± 0.05

0.20 ± 0.04

0.70 ± 0.20

Hitachi Code
JEDEC
EIAJ
Weight

(reference value)

+ 0.20
– 0.30

1.15

0

° – 8°

FP-16DA
—
Conforms

0.24 g

14

16

HD74LV4040A

Unit: mm

9.9

10.3 Max
9

1

1.27

0.635 Max

*0.42 ± 0.08

0.40 ± 0.06

*Dimension including the plating thickness

Base material dimension

8

0.25

+ 0.11

– 0.04

0.14

0.15

3.95

1.75 Max

M

6.10

1.08

0.20 ± 0.03

*0.22 ± 0.03

0.60

Hitachi Code
JEDEC
EIAJ
Weight

+ 0.10
– 0.30

0° – 8°

+ 0.67
– 0.20

(reference value)

FP-16DN
Conforms
Conforms

0.15 g

15

HD74LV4040A

16 9

+ 0.08

0.22

– 0.07

0.20 ± 0.06

5.0

5.3 Max

4.40

18

0.65

M

0.13

0.65 Max

1.0

6.40 ± 0.20

0.10

1.10 Max

Dimension including the plating thickness

Base material dimension

0.17 ± 0.05

0.15 ± 0.04

+0.03

–0.04

0.07

0° – 8°

Hitachi Code
JEDEC
EIAJ
Weight

(reference value)

0.50 ± 0.10

TTP-16DA
—
—

0.05 g

16

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received the latest product standards or specifications before final design, purchase or use.

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contact Hitachi’s sales office before using the product in an application that demands especially high
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of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.

4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail­safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.

5. This product is not designed to be radiation resistant.

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