Datasheet HD74LV221A Datasheet (HIT)

Page 1
HD74LV221A
Dual Monostable Multivibrators
ADE-205-271A (Z)
2nd Edition
June 1999
Description
The HD74LV221A features output pulse-duration control by three methods. In the first method, the A input is low and the B input goes high. In the second method, the B input is high and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high. The basic pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC. Pulse duration can be reduced by taking CLR low.
Features
• VCC = 2.0 V to 5.5 V operation
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
Page 2
HD74LV221A
Function Table
Inputs Outputs CLR A BQ Q
L XXL H XHXLH XXLLH HL↑ H ↓ H ↑ LH
Note: H: High level
L: Low level X: Immaterial
↑: Low to high transition ↓: High to low transition
: High level pulse
: Low level pulse
Pin Arrangement
1A 1B
1CLR
1Q 2Q
2Cext
2Rext / Cext
GND
1
2
3 4 5
6
7
8 9
(Top view)
16
V
CC
15
1Rext / Cext
14
1Cext
13
1Q
12
2Q
11
2CLR
2B
10
2A
2
Page 3
HD74LV221A
Absolute Maximum Ratings
Item Symbol Ratings Unit Conditions
Supply voltage range V Input voltage range* Output voltage range*
1
1, 2
Input clamp current I Output clamp current I Continuous output current I Continuous current through
V
or GND
CC
Maximum power dissipation at Ta = 25°C (in still air)*
3
CC
V
I
V
O
IK
OK
O
or I
I
CC
GND
P
T
Storage temperature Tstg –65 to 150 °C Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,
no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
–0.5 to 7.0 V –0.5 to 7.0 V –0.5 to VCC + 0.5 V Output: H or L –0.5 to 7.0 VCC: OFF –20 mA VI < 0
±50 mA VO < 0 or VO > V ±25 mA VO = 0 to V
CC
±50 mA
785 mW SOP
500 TSSOP
CC
3
Page 4
HD74LV221A
Recommended Operating Conditions
Item Symbol Min Typ Max Unit Conditions
Supply voltage range V Input voltage range V Output voltage range V Output current I
CC
I
O
OH
I
OL
Input transition rise or fall rate ∆t /∆v 0 — 200 ns/V VCC = 2.3 to 2.7 V
External timing registance Rext 5 — — kΩ VCC = 2.0 V
External timing capacitance Cext — unlimited — F Operating free-air temperature Ta –40 85 °C
Note: Unused or floating inputs must be held high or low.
2.0 — 5.5 V 0 — 5.5 V 0— VCCV — — –50 µAV
= 2.0 V
CC
— — –2 mA VCC = 2.3 to 2.7 V — — –6 VCC = 3.0 to 3.6 V — — –12 VCC = 4.5 to 5.5 V —— 50 µAV
= 2.0 V
CC
—— 2 mA VCC = 2.3 to 2.7 V —— 6 VCC = 3.0 to 3.6 V — — 12 VCC = 4.5 to 5.5 V
0 — 100 VCC = 3.0 to 3.6 V 0 — 20 VCC = 4.5 to 5.5 V
1— — V
≥ 3.0 V
CC
Logic Diagram
4
CLR
A
Q
Q
B
Q
Q
CLR
Page 5
HD74LV221A
DC Electrical Characteristics
• Ta = –40 to 85°C
Item Symbol VCC (V)* Min Typ Max Unit Test Conditions
Input voltage V
Output voltage V
Input current I Input current
IH
V
IL
OH
V
OL
IN
I
IN
Rext / Cext Quiescent
I
CC
supply current
Active state
∆I
CC
supply current (per circuit)
Output leakage current
Input capacitance
I
OFF
C
IN
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
2.0 1.5 — — V
2.3 to 2.7 VCC × 0.7 — —
3.0 to 3.6 VCC × 0.7 — —
4.5 to 5.5 VCC × 0.7 — —
2.0 — — 0.5
2.3 to 2.7 — — VCC × 0.3
3.0 to 3.6 — — VCC × 0.3
4.5 to 5.5 — — VCC × 0.3 Min to
VCC – 0.1 — — V IOL = –50 µA
Max
2.3 2.0 — — IOL = –2 mA
3.0 2.48 — — IOL = –6 mA
4.5 3.8 — — IOL = –12 mA Min to
— — 0.1 V IOL = 50 µA
Max
2.3 — — 0.4 IOL = 2 mA
3.0 — — 0.44 IOL = 6 mA
4.5 — — 0.55 IOL = 12 mA 0 to 5.5 — — ±1 µAVIN = 5.5 V or GND
5.5 — — ±2.5 µAVIN = VCC or GND
5.5 — — 20 µAVIN = VCC or GND, IO = 0
2.3 — — 220 µAVIN = VCC or GND Rext/Cext = 0.5 V
CC
3.0 280
4.5 650
5.5 975
0——5 µAVO = 5.5 V
3.3 — 4.0 — pF VI = VCC or GND
5
Page 6
HD74LV221A
Switching Characteristics
• VCC = 2.5 ± 0.2 V
Ta = 25°C Ta = –40 to 85°C
Item Symbol Min Typ Max Min Max Unit Test Conditions
Propa­gation delay time
Pulse width
Output pulse width
t
PLH
t
PHL
t
w
t
wQ
∆t
wQ
— 13.3 31.4 1.0 37.0 ns CL = 15 pF A or B Q or Q
— 15.5 36.0 1.0 42.0 CL = 50 pF — 10.9 25.0 1.0 29.5 CL = 15 pF CLR Q or Q — 12.5 32.8 1.0 34.5 CL = 50 pF — 13.5 33.4 1.0 39.0 CL = 15 pF CLR Q or Q — 15.9 38.0 1.0 44.0 CL = 50 pF (Trigger)
6.0 — — 6.5 — ns A, B or CLR
— 170 260 — 320 ns CL = 50 pF,
Cext = 28 pF, Rext = 2 kΩ
90 100 110 90 110 µsCL = 50 pF,
Cext = 0.01 µF, Rext = 10 kΩ
0.9 1.0 1.1 0.9 1.1 ms CL = 50 pF, Cext = 0.1 µF, Rext = 10 kΩ
— ±1— — — % CL = 50 pF
FROM (Input)
TO (Output)
6
Page 7
Switching Characteristics (cont)
• VCC = 3.3 ± 0.3 V
Ta = 25°C Ta = –40 to 85°C
Item Symbol Min Typ Max Min Max Unit Test Conditions
Propa­gation delay time
Pulse width
Output pulse width
t
PLH
t
PHL
t
w
t
wQ
∆t
wQ
— 9.9 20.6 1.0 24.0 ns CL = 15 pF A or B Q or Q
— 11.6 24.1 1.0 27.5 CL = 50 pF — 8.3 15.8 1.0 18.5 CL = 15 pF CLR Q or Q — 9.7 19.3 1.0 22.0 CL = 50 pF — 9.9 22.4 1.0 26.0 CL = 15 pF CLR Q or Q — 11.6 25.9 1.0 29.5 CL = 50 pF (Trigger)
5.0 — — 5.0 — ns A, B or CLR
— 150 240 — 300 ns CL = 50 pF,
Cext = 28 pF, Rext = 2 kΩ
90 100 110 90 110 µsCL = 50 pF,
Cext = 0.01 µF, Rext = 10 kΩ
0.9 1.0 1.1 0.9 1.1 ms CL = 50 pF, Cext = 0.1 µF, Rext = 10 kΩ
— ±1— — — % CL = 50 pF
HD74LV221A
FROM (Input)
TO (Output)
7
Page 8
HD74LV221A
Switching Characteristics (cont)
• VCC = 5.0 ± 0.5 V
Ta = 25°C Ta = –40 to 85°C
Item Symbol Min Typ Max Min Max Unit Test Conditions
Propa­gation delay time
Pulse width
Output pulse width
t
PLH
t
PHL
t
w
t
wQ
∆t
wQ
— 7.3 12.0 1.0 14.0 ns CL = 15 pF A or B Q or Q
— 8.7 14.0 1.0 16.0 CL = 50 pF — 6.2 9.4 1.0 11.0 CL = 15 pF CLR Q or Q — 7.4 11.4 1.0 13.0 CL = 50 pF — 7.3 12.9 1.0 15.0 CL = 15 pF CLR Q or Q — 8.6 14.9 1.0 17.0 CL = 50 pF (Trigger)
5.0 — — 5.0 — ns A, B or CLR
— 140 200 — 240 ns CL = 50 pF,
Cext = 28 pF, Rext = 2 kΩ
90 100 110 90 110 µsCL = 50 pF,
Cext = 0.01 µF, Rext = 10 kΩ
0.9 1.0 1.1 0.9 1.1 ms CL = 50 pF, Cext = 0.1 µF, Rext = 10 kΩ
— ±1 — — — % CL = 50 pF
FROM (Input)
TO (Output)
8
Page 9
Operating Characteristics
• CL = 50 pF
Item Symbol V
Power
C
PD
dissipation capacitance
(V) Min Typ Max Unit Test Conditions
CC
3.3 — 74.0 — pF f = 10 MHz
5.0 — 86.0 —
Test Circuit
Ta = 25°C
HD74LV221A
V
CC
Input
Cext
–+
V
CC
Refer
Cext Rext/
A
to
Func-
tion
B
Table
CLR
Note : C includes the probe and jig capacitance.
L
Cext
GND
Rext
Cext = 28 pF or 100 pF or 0.01 µF or 0.1 µF Rext = 1 kΩ or 2 kΩ or 10 kΩ
V
CC
Q
C = 15 pF or 50 pF
L
Q
C = 15 pF or 50 pF
L
Output
Output
9
Page 10
HD74LV221A
Timing diagram
A
B
CLR
Rext/ Cext
Q
Q
t
w
Caution in use In order to prevent any malfunctions due to noise, connect a high frequency performance capacitor
between Vcc and GND, and keep the wiring between the external components and Cext, Rext/Cext pins as short as possible.
Large values of Cext may cause problems when powering down the HD74LV221A because of the amount of energy stored in the capacitoe. When a system containing diodes at pin 7 or pin15. Current through the input protection diodes must be limited to 10 mA; therefore, the turn-off time of the Vcc power supply must not be faster than t = Vcc • Cext/(20 mA). for example, if Vcc 5 V and Cext = 22 µF, the Vcc supply must turn off no faster than t = (5 V) • (22 µF)/20mA = 5.5 ms. This is usually not a problem because power supplies are heavily filtered and cannot discharge at this rate. When a more rapid decrease of Vcc to zero volts occurs, the HD74LV221A may sustain damage. To avoid this possibility, use an external calmping diode.
t
w
t
w
10
Page 11
HD74LV221A
• Waveform
Input A
Input B
Input CLR
Output Q
– 1
90%
10%
10%
50%
t
f
10%
t
r
90%
50%
t
r
90%
90%
50% 50%
t (trigger)
PLH
50% V
t (trigger)
PHL
t
f
t
r
50%
10% 10%
t (L)
w
t
PHL
CC
t
50% V
PLH
90%
CC
V
CC
GND
V
CC
GND
V
CC
GND
V
OH
V
OL
Output Q
50% V
CC
50% V
CC
V
OH
V
OL
11
Page 12
HD74LV221A
• Waveform – 2
Input A
Input B
Output Q
Output Q
Note:
t
f
t
r
50%
10% 10%
t (L)
w
t
r
90%
50%
t
f
10%
t
r
90%
50%
90%
t (H)
w
t
f
90% 90% 90%
50% 50% 50%
10% 10% 10%
t (L)
w
50% V
50% V
1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, t ≤ 3 ns, t ≤ 3 ns
t (H)
w
CC
CC
rf
50% V
t (out)
w
50% V
CC
CC
2. The output are measured one at a time with one transition per measurement.
V
CC
GND
V
CC
GND
V
OH
V
OL
V
OH
V
OL
12
Page 13
Application Data
10000.0
1000.0
WQ
100.0
10.0
Output pulse width t (µs)
1.0
0.1 10
HD74LV221A
Vcc = 2.5 V
Rext
1 kΩ 10 kΩ 100 kΩ 1 MΩ
2
10
3
10
4
10
5
10
6
10
7
Timing capacitance Cext (pF)
13
Page 14
HD74LV221A
10000.0
1000.0
WQ
100.0
10.0
Output pulse width t (µs)
1.0
0.1 10
Vcc = 3.3 V
Rext
1 kΩ 10 kΩ 100 kΩ 1 MΩ
2
10
3
10
4
10
5
10
6
10
7
WQ
Output pulse width t (µs)
10000.0
1000.0
100.0
10.0
1.0
0.1 10
Timing capacitance Cext (pF)
Vcc = 5.0 V
Rext
1 kΩ 10 kΩ 100 kΩ 1 MΩ
2
10
3
10
4
10
5
10
6
10
7
14
Timing capacitance Cext (pF)
Page 15
1.4
1.3
1.2
1.1
1.0
HD74LV221A
Rext = 2 kΩ
Cext
1000 pF 10000 pF 100000 pF 1000000 pF
Coefficient of output pulse width K
0.9
0.8
2.0 2.5 3.0 3.5 4.0 4.5 5.0 6.05.5
1.4
1.3
1.2
1.1
1.0
Supply voltage V (V)
CC
Rext = 10 kΩ
Cext
1000 pF 10000 pF 100000 pF 1000000 pF
Coefficient of output pulse width K
0.9
0.8
2.0 2.5 3.0 3.5 4.0 4.5 5.0 6.05.5
Supply voltage V (V)
CC
15
Page 16
HD74LV221A
Package Dimensions
16
10.06
10.5 Max 9
5.5
1
0.80 Max
1.27
0.42 ± 0.08
± 0.06
0.40
Dimension including the plating thickness
Base material dimension
8
0.12
2.20 Max
0.10 ± 0.10
0.15
M
7.80
0.22 ± 0.05
0.20 ± 0.04
0.70 ± 0.20
Hitachi Code JEDEC EIAJ Weight
(reference value)
+ 0.20 – 0.30
1.15
0
° – 8°
FP-16DA — Conforms
0.24 g
16
Page 17
16
HD74LV221A
Unit: mm
9.9
10.3 Max 9
1
1.27
0.635 Max
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
8
0.25
+ 0.11
– 0.04
0.14
0.15
3.95
1.75 Max
M
6.10
1.08
0.20 ± 0.03
*0.22 ± 0.03
0.60
Hitachi Code JEDEC EIAJ Weight
+ 0.10 – 0.30
0° – 8°
+ 0.67 – 0.20
(reference value)
FP-16DN Conforms Conforms
0.15 g
17
Page 18
HD74LV221A
0.22
0.20 ± 0.06
5.0
5.3 Max
16 9
4.40
18
0.65
+ 0.08 – 0.07
0.13
0.65 Max
1.0
M
6.40 ± 0.20
0.10
1.10 Max
Dimension including the plating thickness
Base material dimension
0.17 ± 0.05
0.15 ± 0.04
+0.03
–0.04
0.07
0° – 8°
Hitachi Code JEDEC EIAJ Weight
(reference value)
0.50 ± 0.10
TTP-16DA — —
0.05 g
18
Page 19
HD74LV221A
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as in aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safe devices, so that the equipment incorporating the Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
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For further information write to:
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Copyright © Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
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