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HD74HCT74A
Dual D–type Positive Edge–triggered Flip Flops
with Clear and Preset
ADE-205-290 (Z)
1st. Edition
June 1999
Description
The HD74HCT74A has independent data, preset, clear, and clock inputs Q and Q outputs in a 14 pin
package. The logic level present at the data input is transferred to the output during the positive going
transition of the clock pulse. Preset and clear are independent of the clock and accomplished by a low level
at the appropriate input.
Features
• VCC = 4.5 to 5.5 V operation
• Input terminal has protection diode
Function Table
Inputs Outputs
PRE CLR CLK D Q Q
LHXXHL
HLXXLH
LLXXH *1H
HH↑ HHL
HH↑ LLH
HHL XQ
H : High level
L : Low level
X : Immaterial
↑ : Low to high transition
Q
: Level to Q before the indicated steady state input conditions were established.
0
Note : 1. Q and Q will remain high as long as preset and clear are low, but Q and Q are unpredictable, if
preset and clear go high simultaneously.
0
*1
Q
0
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HD74HCT74A
Pin Arrangement
1CLR
14
1
V
CC
1D
1CLK
1PRE
1Q
1Q
GND
2
3
4
5
6
7
13
12
11
10
9
8
2CLR
2D
2CLK
2PRE
2Q
2Q
(Top view)
Absolute Maximum Ratings
Item Symbol Ratings Unit
Supply voltage V
Input diode peak current I
Output diode peak current I
Output current I
VCC, GND current / pin ICC or I
CC
IK
OK
O
GND
Storage temperature Tstg –65 to 150 °C
–0.5 to 7.0 V
±20 mA
±20 mA
±25 mA
±50 mA
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HD74HCT74A
Recommended Operating Conditions
Item Symbol Min Typ Max Unit
Supply voltage V
Input voltage V
Output voltage V
Output current I
Input rise / fall time tr, t
CC
IH
V
IL
V
I
O
OH
I
OL
f
Operating temperature Ta –40 — 85 °C
4.5 5.0 5.5 V
2.0 — — V
0 — 0.8
0—V
CC
0—VCCV
—–4—mA
—4 —
— — 500 ns
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HD74HCT74A
Logic Diagram
PRE
CLK
C
D
TG
C
CLR
Electrical Characteristics
Item Symbol V
Output voltage V
Input current I
Quiescent supply
voltage
OH
V
OL
I
I
CC
4.5 4.40 — — 4.40 — V IO = –20 µA
4.5 3.98 — — 3.84 — IO = –4 mA
4.5 — — 0.10 — 0.10 IO = 20 µA
4.5 — — 0.26 — 0.33 IO = 4 mA
5.5 — ±0.1 ±100 — ±1000 nA VI = VCC or GND
5.5 — — 4.0 — 40 µAVI = VCC or GND,
C
C
C
TG
C
C
TG
C
(V) Ta = 25°C Ta = –40 to 85°C Unit Test Conditions
CC
C
TG
C
Min Typ Max Min Max
I
= 0
O
Q
Q
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Switching Characteristics (CL = 50 pF)
HD74HCT74A
Item Symbol V
(V) Ta = 25°C Ta = –40 to 85°C Unit Input Output
CC
Min Typ Max Min Max FROM TO
Maximum clock f
max
4.5 27 78 — 22 — MHz
frequency 5.5 30 92 — 24 —
Propagation t
delay time t
PLH
PHL
4.5 — 14 28 — 35 ns PRE, Q, Q
5.5 — 12 25 — 32 CLR
4.5 — 14 22 — 28 CLK Q, Q
5.5 — 13 20 — 25
Output rise / fall tr / t
4.5 — 7 15 — 19 ns Each
f
time 5.5 — 6 13 — 16 output
Setup time t
su
4.5 10 — — 13 — ns D
5.5 9 — — 12 —
4.5 5 — — 5 — PRE, CLR
5.5 5 — — 5 — inactive
Hold time t
h
4.5 0 — — 0 — ns
5.5 0 — — 0 —
Pulse width t
w
4.5 15 — — 19 — ns
5.5 14 — — 17 —
Input capacitance C
Power dissipation
I
C
PD
— — 3 10 — 10 pF
— —35—— — pF
capacitance
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HD74HCT74A
Q
Q
Test Circuit
1) f , t ,t (CLK → Q, Q)
max PLH PHL
Input
V
CCVCC
Pulse Generator
Z = 50
out
Ω
Input
Pulse Generator
Z = 50
out
2) t ,t (CLR or PR → Q, Q)
PLH PHL
Ω
Input
Pulse Generator
Z = 50
out
Ω
Input
Pulse Generator
Z = 50
out
Ω
PR
DQ
CLK Q
CLR
V
CC
PR
DQ
CLK
Q
CLR
Output Q
C
L
Output
C
L
C
L
Output Q
Output
C
L
Notes: 1. C includes probe and jig capacitance.
L
2. Test is put into the each flip flops.
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• Waveform
Input CLR
Input PR
t
f
90 %
1.3 V 1.3 V
10 %
HD74HCT74A
t
r
90 %
10 %
t
w
90 %
t
f
t
r
90 %
1.3 V1.3 V
10 %
10 %
3 V
0 V
3 V
0 V
t (H)
f
w
Input CLK
t
r
90 %
1.3 V
10 %
t
90 %
1.3 V 1.3 V 1.3 V 1.3 V
10 %
t (H)sut (H)ht (L)sut (L)
90 %
Input D
1.3 V 1.3 V 1.3 V
10 %
t
r
t
PHL
t
f
Output Q
t
PLH
Output Q
Note: 1. Input waveform : PRR = 1 MHz, duty cycle 50%, t = 6 ns, t = 6 ns
90 %
10 %
t
PLH
1.3 V1.3 V
t
PHL
1.3 V1.3 V
t (L)
w
t
t
h
PHL
PLH
t
w
1.3 V
t
PLH
t
PHL
rf
3 V
0 V
3 V
0 V
V
OH
1.3 V1.3 V
V
OL
V
OH
1.3 V1.3 V
V
OL
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HD74HCT74A
Package Dimensions
14
1
1.27
10.06
10.5 Max
1.42 Max
Unit : mm
8
5.5
7
+ 0.20
7.80
– 0.30
2.20 Max
0.22 ± 0.05
1.15
0.20 ± 0.04
0° – 8°
0.70 ± 0.20
0.42 ± 0.08
0.40 ± 0.06
Dimension including the plating thickness
Base material dimension
0.12
0.10 ± 0.10
0.15
M
Hitachi Code
JEDEC
EIAJ
Weight
(reference value)
FP-14DA
—
Conforms
0.23 g
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5.30 Max
14 8
17
+0.08
0.22
–0.07
0.20 ± 0.06
5.00
0.83 Max
0.65
0.13
HD74HCT74A
4.40
1.0
M
6.40 ± 0.20
0.10
1.10 Max
Dimension including the plating thickness
Base material dimension
0.17 ± 0.05
0.15 ± 0.04
+0.03
–0.04
0.07
0° – 8°
Hitachi Code
JEDEC
EIAJ
Weight
(reference value)
0.50 ± 0.10
TTP-14D
—
—
0.05 g
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Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
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