Page 1
HD74HC74
Dual D-type Flip-Flops (with Preset and Clear)
Description
The flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level
present at thte data input is transferred to the output during the positive going transition to the clock pulse.
Preset and clear are independent of the clock and accomplished by a low level at the appropriate input.
Features
• High Speed Operation: tpd (Clock to Q or Q) = 14 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
Function Table
Inputs Outputs
Preset Clear Clock Data Q Q
LH X X H L
HL X X L H
LL X X H*
HH HHL
HH LLH
H H L X no change no change
H H H X no change no change
HH X no change no change
Note: 1. Q and Q will remain HIGH as long as Preset and Clear are Low, but Q and Q are unpredictable,
if Preset and Clear go HIGH simultaneously.
1
H*
1
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HD74HC74
(
)
Pin Arrangement
Logic Diagram (1/2)
PR
CLR
D
1CLR
1D
1CK
1PR
1Q
1Q
GND
V
CK
CK
14
13
12
11
10
9
8
CC
2CLR
2D
2CK
2PR
2Q
2Q
Q
Q
CK
1
2
3
4
5
6
7
CK
#
CK
CK D
PR CLR
Q Q
DCK
CLR PR
Q Q
Top view
#
CK
#
CK
#
CK
2
CK
CK
#
CK
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HD74HC74
DC Characteristics
Ta = –40 to
Ta = 25°C
Item Symbol V
Input voltage V
IH
(V) Min Typ Max Min Max Unit Test Conditions
CC
2.0 1.5 — — 1.5 — V
4.5 3.15 — — 3.15 —
6.0 4.2 — — 4.2 —
V
IL
2.0 — — 0.5 — 0.5 V
4.5 — — 1.35 — 1.35
6.0 — — 1.8 — 1.8
Output voltage V
OH
2.0 1.9 2.0 — 1.9 — V Vin = VIH or VILIOH = –20 µA
4.5 4.4 4.5 — 4.4 —
6.0 5.9 6.0 — 5.9 —
4.5 4.18 — — 4.13 — IOH = –4 mA
6.0 5.68 — — 5.63 — IOH = –5.2 mA
V
OL
2.0 — 0.0 0.1 — 0.1 V Vin = VIH or VILIOL = 20 µA
4.5 — 0.0 0.1 — 0.1
6.0 — 0.0 0.1 — 0.1
4.5 — — 0.26 — 0.33 IOL = 4 mA
6.0 — — 0.26 — 0.33 IOL = 5.2 mA
Input current Iin 6.0 — — ±0.1 — ±1.0 µA Vin = VCC or GND
Quiescent supply
I
CC
6.0 — — 2.0 — 20 µA Vin = VCC or GND, Iout = 0 µA
current
+85°C
3
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HD74HC74
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = –40 to
Ta = 25°C
Item Symbol V
Maximum clock f
max
(V) Min Typ Max Min Max Unit Test Conditions
CC
2.0 — — 5 — 4 MHz
frequency 4.5 — 35 25 — 20
6.0 — — 29 — 24
Propagation delay t
time t
PLH
PHL
2.0 — — 160 — 200 ns Clock to Q or Q
4.5 — 14 32 — 40
6.0 — — 27 — 34
2.0 — — 160 — 200 Preset or Clear to Q or Q
4.5 — 13 32 — 40
6.0 — — 27 — 34
Setup time t
su
2.0 100 — — 125 — ns Data to Clock
4.5 20 1 — 25 —
6.0 17 — — 21 —
Hold time t
h
2.0 5 — — 5 — ns Clock to Data
4.5 5 0 — 5 —
6.0 5 — — 5 —
Removal time t
rem
2.0 25 — — 31 — ns Preset, Clear to Clock
4.5 5 –5 — 6 —
6.0 4 — — 5 —
Pulse width t
w
2.0 80 — — 100 — ns Clock, Preset, Clear
4.5 16 8 — 20 —
6.0 14 — — 17 —
Output rise/fall t
time t
TLH
THL
2.0 — — 75 — 95 ns
4.5 — 5 15 — 19
6.0 — — 13 — 16
Input Capacitance Cin — — 5 10 — 10 pF
+85°C
4
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1
19.20
20.32 Max
1.30
Unit: mm
814
6.30
7.40 Max
7
2.54 ± 0.25
2.39 Max
0.48 ± 0.10
2.54 Min 5.06 Max
0.51 Min
Hitachi Code
JEDEC
EIAJ
Weight
7.62
+ 0.10
0.25
– 0.05
0° – 15°
(reference value)
DP-14
Conforms
Conforms
0.97 g
Page 6
14
1.27
10.5 Max
1
10.06
1.42 Max
Unit: mm
8
5.5
7
+ 0.20
7.80
– 0.30
2.20 Max
*0.22 ± 0.05
1.15
0.20 ± 0.04
0° – 8°
0.70 ± 0.20
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
0.12
0.10 ± 0.10
0.15
M
Hitachi Code
JEDEC
EIAJ
(reference value)
Weight
FP-14DA
—
Conforms
0.23 g
Page 7
9.05 Max
14
Unit: mm
8.65
8
*Pd plating
1
0.635 Max
1.27
*0.40 ± 0.06
7
+ 0.11
– 0.04
0.14
0.25
3.95
1.75 Max
0.15
M
6.10
1.08
*0.20 ± 0.05
+ 0.67
0.60
– 0.20
Hitachi Code
JEDEC
EIAJ
Weight
+ 0.10
– 0.30
0° – 8°
(reference value)
FP-14DN
Conforms
Conforms
0.13 g
Page 8
5.30 Max
14 8
17
+0.08
*0.22
–0.07
0.20 ± 0.06
5.00
0.83 Max
0.65
0.13
Unit: mm
4.40
1.0
M
6.40 ± 0.20
0.10
1.10 Max
*Dimension including the plating thickness
Base material dimension
0.15 ± 0.04
*0.17 ± 0.05
+0.03
–0.04
0.07
0° – 8°
Hitachi Code
JEDEC
EIAJ
(reference value)
Weight
0.50 ± 0.10
TTP-14D
—
—
0.05 g
Page 9
Cautions
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copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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