Octal Bus Transceivers/Registers with Multiplexed 3-state outputs
Description
Six control inputs enable this device to be used as a latched transceiver, unlatched transceiver or a
combination of both. As a latched transceiver, data from one bus is stored for later retrieval by the other
bus. Alternately real time bus data (unlatched) may be directly transferred from one bus to another.
Circuit operation is determined by the Control G, Direction, Clock AB, Clock BA, Select AB, Select BA
control inputs. The enable input, Contorl G, controls whether any bus outputs are enabled. The direction
control Direction (DIR), determines which bus is enabled, and hence the direction data flows: The Select
AB, Select BA inputs cotrol whether the latched data (stored in D type flip-flops), or the bus data (from
other bus input pins) is transferred. Each set of flip-flops has its own clock Clock AB and Clock BA, for
storing data. Data is latched on the rising edge of the clock.
Features
• High Speed Operation: tpd (Bus to Bus) = 14 ns typ (CL = 50 pF)
Inputs
ControlClockSelectData I/OData I/OOperation or Function
GDirection BA AB AB BA A1 thru A8 B1 thru B8 HD74HC646HD74HC648
HXXXXXZ (Input)Z (Input)IsolationIsolation
HXHHZ (Input)Z (Input)Store A & B dataStore A & B data
LLXXXLOutputZ (Input)B real-time data to
A bus
LLHHXHOutputZ (Input)B stored data to A
bus
L LLLXHOutputZ (Input)B stored data to A
bus
LHXXLXZ (Input)OutputA real-time data to
B bus
LHHHHXZ (Input)OutputA stored data to B
bus
LHLLHXZ (Input)OutputA stored data to B
bus
B real-time data to
A bus
B stored data to A
bus
B stored data to A
bus
A real-time data to
B bus
A stored data to B
bus
A stored data to B
bus
Bus A
Bus B
Real-time transfer
Bus B to Bus A
2
Bus A
Real-time transfer
Bus A to Bus B
Bus B
Page 3
HD74HC646/HD74HC648
Bus A
Pin Arrangement
Storage from
A, B, or A and B
Clock AR
Select AB
Direciton
A
1
A
2
Bus B
Bus A
Bus B
Transfer stored data
to A or B
1
2
3
4
5
24
23
22
21
20
V
CC
Clock BA
Select BA
Control G
B
1
A
A
A
A
A
A
GND
6
3
7
4
8
5
9
6
10
7
11
8
12
19
18
17
16
15
14
13
B
2
B
3
B
4
B
5
B
6
B
7
B
8
(Top view)
3
Page 4
HD74HC646/HD74HC648
Absolute Maximum Ratings
ItemSymbolRatingUnit
Supply voltage rangeV
Input voltageV
Output voltageV
Output currentI
DC current drain per VCC , GNDICC, I
DC input diode currentI
DC output diode currentI
Power Dissipation per packageP
CC
IN
OUT
OUT
GND
IK
OK
T
Storage temperatureTstg–65 to +150°C
Logic Diagram
HD74HC646
–0.5 to +7.0V
–0.5 to VCC + 0.5V
–0.5 to VCC + 0.5V
±35mA
±75mA
±20mA
±20mA
500mW
x 7
V
CC
Q
CBA
A
1
Q
CAB
CAB
D
CBA
D
V
CC
B
1
CBACAB
SAB
DIR
SBA
G
4
Page 5
HD74HC648
A
1
SAB
SBA
HD74HC646/HD74HC648
x 7
V
CC
Q
CBA
CBA
Q
CAB
CAB
D
D
V
CC
B
1
CBACAB
DIR
G
5
Page 6
HD74HC646/HD74HC648
DC Characteristics
Ta = –40 to
Ta = 25°C
ItemSymbol V
Input voltageV
IH
(V) Min Typ Max MinMaxUnitTest Conditions
CC
2.01.5 ——1.5—V
4.53.15 ——3.15—
6.04.2 ——4.2—
V
IL
2.0——0.5 —0.5V
4.5——1.35 —1.35
6.0——1.8 —1.8
Output voltageV
OH
2.01.9 2.0 —1.9—VVin = VIH or VILIOH = –20 µA
4.54.4 4.5 —4.4—
6.05.9 6.0 —5.9—
4.54.18 ——4.13—IOH = –6 mA
6.05.68 ——5.63—IOH = –7.8 mA
V
OL
2.0—0.0 0.1 —0.1VVin = VIH or VILIOL = 20 µA
4.5—0.0 0.1 —0.1
6.0—0.0 0.1 —0.1
4.5——0.26 —0.33IOL = 6 mA
6.0——0.26 —0.33IOL = 7.8 mA
Off-state output
I
OZ
6.0——±0.5 —±5.0µAVin = VIH or VIL,
current
Input currentIin6.0——±0.1 —±1.0µAVin = VCC or GND
Quiescent supply
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