Page 1
HD74HC194
4-bit Bidirectional Universal Shift Register
Description
This bidirectional shift register is designed to incorporate virtually all of the features a system designer may
want in a shift register. It features parallel inputs, parallel outputs, right shift and left shift serial inputs,
operating mode control inputs, and a direct overriding clear line. The register has four distinct modes of
operation: parallel (broadside) load, shift right (in the direction QA toware QD); shift left; inhibit clock (do
nothing).
Synchronous parallel loading is accomplished by applying the four bits of data and taking both mode
control inputs, S0 and S1, high. The data are loaded into their respective flip-flops and appear at the outputs
after the positive transition of the clock input. During loading, serial data flow is inhibited. Shift right is
accomplished synchronously with the rising edge of the clock pulse when S0 is high and S1 is low. Serial
data for this mode is entered at the shift right data input. When S0 is low and S1 is high, data shifts left
synchronously and new data is entered at the shift left serial input. Clocking of the flip-flops is inhibited
when both mode control inputs are low. The mode control inputs should be changed only when the clock
input is high.
Features
• High Speed Operation: tpd (Clock to Q) = 12 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max
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HD74HC194
Function Table
Inputs
Operating Mode Serial Parallel Outputs
Mode Clear S1S0Clock Shift Left Shift Right A B C D QAQBQCQ
Clear L X X X X X X X X X LLLL
Parallel load H H H X X abcdabcd
Shift right H L H X H XXXXH QAnQBnQ
HLH X L XXXXL QAnQBnQ
Shift left H H L H X XXXXQBnQCnQDnH
HHL L X XXXXQBnQCnQDnL
Hold H L L X X X X X X X QA0QB0QC0Q
H X X L X X XXXXQA0QB0QC0Q
H X X H X X XXXXQA0QB0QC0Q
H : high level (Steady state)
L : low level (Steady state)
X : don’t care
: transition from low to high level.
a, b, c, d : the level of steady-state input at inputs A, B, C or D respectively.
QA0, QB0, QC0, QD0: the level of QA, QB, QC or QD respectively, before the indicated steady-state input
conditions were established.
, QBn, QCn, QDn: the level of QA, QB, QC or QD respectively before the most recent transition of
Q
An
the clock.
D
Cn
Cn
D0
D0
D0
2
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Pin Arrangement
HD74HC194
Timing Diagram
Mode
Control
Inputs
Serial
Data
Inputs
Parallel
Data
Inputs
Outputs
Clear
Shift
Right
Serial-Input
Parallel
Inputs
Shift
Left
Serial-Input
GND
Clock
0
S
S1
Clear
R
L
A
B
C
D
A
Q
QB
QC
QD
Clear ClearLoad
A
B
C
D
1
2
3
CLR
R
A
QA
QB
16
15
14
V
QA
QB
CC
Parallel
4
5
6
7
B
C
D
L
S0
QC
QD
CK
S
1
8
13
12
11
10
9
Outputs
QC
QD
Clock
S
1
Mode Control
S0
(Top view)
H
L
H
L
Shift Right Shift Left Inhibit
3
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HD74HC194
Logic Diagram
S0
S
Clock
Clear
Serial
Shift
Left
1
DCBA
D
C
CQQQQ
CLCL
D
C
C
CLCL
D
C
C
CLCL
D
C
C
CLCL
Serial
Shift
Right
QAQBQCQD
4
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HD74HC194
DC Characteristics
Ta = –40 to
Ta = 25°C
Item Symbol V
Input voltage V
IH
(V) Min Typ Max Min Max Unit Test Conditions
CC
2.0 1.5 — — 1.5 — V
4.5 3.15 — — 3.15 —
6.0 4.2 — — 4.2 —
V
IL
2.0 — — 0.5 — 0.5 V
4.5 — — 1.35 — 1.35
6.0 — — 1.8 — 1.8
Output voltage V
OH
2.0 1.9 2.0 — 1.9 — V Vin = VIH or VILIOH = –20 µA
4.5 4.4 4.5 — 4.4 —
6.0 5.9 6.0 — 5.9 —
4.5 4.18 — — 4.13 — IOH = –4 mA
6.0 5.68 — — 5.63 — IOH = –5.2 mA
V
OL
2.0 — 0.0 0.1 — 0.1 V Vin = VIH or VILIOL = 20 µA
4.5 — 0.0 0.1 — 0.1
6.0 — 0.0 0.1 — 0.1
4.5 — — 0.26 — 0.33 IOL = 4 mA
6.0 — — 0.26 — 0.33 IOL = 5.2 mA
Input current Iin 6.0 — — ±0.1 — ±1.0 µA Vin = VCC or GND
Quiescent supply
I
CC
6.0 — — 4.0 — 40 µA Vin = VCC or GND, Iout = 0 µA
current
+85°C
5
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HD74HC194
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = –40 to
Ta = 25°C
Item Symbol V
Maximum clock f
max
(V) Min Typ Max Min Max Unit Test Conditions
CC
2.0 — — 6 — 5 ns
frequency 4.5 — — 30 — 24
6.0 — — 35 — 28
Propagation delay t
PHL
2.0 — — 140 — 175 ns Clock to Q
time 4.5 — 12 28 — 35
6.0 — — 24 — 30
t
PLH
2.0 — — 140 — 175 ns
4.5 — 12 28 — 35
6.0 — — 24 — 30
t
PHL
2.0 — — 150 — 190 ns Clear to Q
4.5 — 13 30 — 38
6.0 — — 26 — 33
Pulse width t
w
2.0 80 — — 100 — ns Clock or Clear
4.5 16 6 — 20 —
6.0 14 — — 17 —
Setup time t
su
2.0 100 — — 125 — ns A, B, C or D to Clock
4.5 20 7 — 25 —
6.0 17 — — 21 —
2.0 150 — — 187 — ns Mode controls to Clock
4.5 30 17 — 37 —
6.0 25 — — 31 —
Hold time t
h
2.0 0 — — 0 — ns Any input
4.5 0 –4 — 0 —
6.0 0 — — 0 —
Removal time t
rem
2.0 25 — — 31 — ns Clear inactive to Clock
4.5 5 1 — 6 —
6.0 4 — — 5 —
Output rise/fall t
time t
TLH
THL
2.0 — — 75 — 95 ns
4.5 — 5 15 — 19
6.0 — — 13 — 16
Input capacitance Cin — — 5 10 — 10 pF
+85°C
6
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19.20
20.00 Max
16 9
1.3
Unit: mm
6.30
7.40 Max
81
1.11 Max
2.54 ± 0.25
0.48 ± 0.10
5.06 Max
2.54 Min
0.51 Min
Hitachi Code
JEDEC
EIAJ
Weight
7.62
+ 0.13
0.25
– 0.05
0° – 15°
(reference value)
DP-16
Conforms
Conforms
1.07 g
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Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
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