Page 1
HD74HC164
8-bit Parallel-out Shift Register
Description
This 8-bit shift register has gated serial inputs and clear. Each register bit is a D-type master/slave flipflop. Inputs A & B permit complete control over the incoming data. A low at either or both inputs inhibits
entry of new data and resets the first flip-vlop to the low level at the next clock pulse. A high level on the
input enables the other input which will then determine the state of the first flip-flop. Data at the serial
inputs may be changed while the clock is high or low, but only information meeting the setup and hold time
requirements will be entered. Data is serially shifted in and out of the 8-bit register during the positive
going transition of the clock pulse. Clear is independent of the clock and accomplished by a low level at
the clear input.
Features
• High Speed Operation: tpd (Clock to Q) = 14.5 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max
Function Table
Inputs Outputs
Clear Clock A B Q
L X X X L L ········· L
H XXQAoQ
H LXLQAn········· Q
H XL LQAn········· Q
H HHHQAn········· Q
QAo to QHo = Outputs remain unchanged.
Q
to QGn = Data shifted from the previous stage on a positive edge at the clock input.
An
A
Q
B
Bo
········· Q
········· Q
H
Ho
Gn
Gn
Gn
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HD74HC164
Pin Arrangement
Serial
Inputs
Outputs
QA
QB
QC
1
A
A
2
B
3
4
5
B
Q
QB
QC
A
QH
QG
QF
QE
14
13
12
11
10
V
QH
QG
QF
QE
CC
Outputs
Timing Diagram
Clock
Clear
QG
QH
Q
QB
QC
QD
QE
QF
6
QD
7
GND
A
B
A
QD
CLR
CK
(Top view)
Clear
9
Clock
8
2
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Logic Diagram
Clock
HD74HC164
Clear
A
B
DQ DQ DQ DQDQ DQ DQ DQ
CLR
CLR CLR CLR CLR CLR CLR CLR
QA QB QC QD QE QF QG QH
3
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HD74HC164
DC Characteristics
Ta = –40 to
Ta = 25°C
Item Symbol V
Input voltage V
IH
(V) Min Typ Max Min Max Unit Test Conditions
CC
2.0 1.5 — — 1.5 — V
4.5 3.15 — — 3.15 —
6.0 4.2 — — 4.2 —
V
IL
2.0 — — 0.5 — 0.5 V
4.5 — — 1.35 — 1.35
6.0 — — 1.8 — 1.8
Output voltage V
OH
2.0 1.9 2.0 — 1.9 — V Vin = VIH or VILIOH = –20 µA
4.5 4.4 4.5 — 4.4 —
6.0 5.9 6.0 — 5.9 —
4.5 4.18 — — 4.13 — IOH = –4 mA
6.0 5.68 — — 5.63 — IOH = –5.2 mA
V
OL
2.0 — 0.0 0.1 — 0.1 V Vin = VIH or VILIOL = 20 µA
4.5 — 0.0 0.1 — 0.1
6.0 — 0.0 0.1 — 0.1
4.5 — — 0.26 — 0.33 IOL = 4 mA
6.0 — — 0.26 — 0.33 IOL = 5.2 mA
Input current Iin 6.0 — — ±0.1 — ±1.0 µA Vin = VCC or GND
Quiescent supply
I
CC
6.0 — — 4.0 — 40 µA Vin = VCC or GND, Iout = 0 µA
current
+85°C
4
Page 5
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = –40 to
Ta = 25°C
Item Symbol V
Maximum clock f
max
(V) Min Typ Max Min Max Unit Test Conditions
CC
2.0 — — 5 — 4 MHz
frequency 4.5 — — 25 — 20
6.0 — — 29 — 24
Propagation delay t
PHL
2.0 — — 160 — 200 ns Clock to Q
time 4.5 — 14 32 — 40
6.0 — — 27 — 34
t
PLH
2.0 — — 160 — 200 ns
4.5 — 15 32 — 40
6.0 — — 27 — 34
t
PHL
2.0 — — 175 — 220 ns Clear to Q
4.5 — 17 35 — 44
6.0 — — 30 — 37
Setup time t
su
2.0 100 — — 125 — ns A, B to Clock
4.5 20 1 — 25 —
6.0 17 — — 21 —
Hold time t
h
2.0 5 — — 5 — ns Clock to A, B
4.5 5 0 — 5 —
6.0 5 — — 5 —
Removal time t
rem
2.0 5 — — 5 — ns Clear to Clock
4.5 5 0 — 5 —
6.0 5 — — 5 —
Pulse width t
w
2.0 80 — — 100 — ns Clock
4.5 16 8 — 20 —
6.0 14 — — 17 —
2.0 80 — — 100 — ns Clear
4.5 16 5 — 20 —
6.0 14 — — 17 —
Output rise/fall t
time t
TLH
THL
2.0 — — 75 — 95 ns
4.5 — 5 15 — 19
6.0 — — 13 — 16
Input capacitance Cin — — 5 10 — 10 pF
+85°C
HD74HC164
5
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1
19.20
20.32 Max
1.30
Unit: mm
814
6.30
7.40 Max
7
2.54 ± 0.25
2.39 Max
0.48 ± 0.10
2.54 Min 5.06 Max
0.51 Min
Hitachi Code
JEDEC
EIAJ
Weight
7.62
+ 0.10
0.25
– 0.05
0° – 15°
(reference value)
DP-14
Conforms
Conforms
0.97 g
Page 7
14
1.27
10.5 Max
1
10.06
1.42 Max
Unit: mm
8
5.5
7
+ 0.20
7.80
– 0.30
2.20 Max
*0.22 ± 0.05
1.15
0.20 ± 0.04
0° – 8°
0.70 ± 0.20
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
0.12
0.10 ± 0.10
0.15
M
Hitachi Code
JEDEC
EIAJ
(reference value)
Weight
FP-14DA
—
Conforms
0.23 g
Page 8
9.05 Max
14
Unit: mm
8.65
8
*Pd plating
1
0.635 Max
1.27
*0.40 ± 0.06
7
+ 0.11
0.25
3.95
– 0.04
0.14
0.15
1.75 Max
M
6.10
1.08
*0.20 ± 0.05
+ 0.67
0.60
– 0.20
Hitachi Code
JEDEC
EIAJ
Weight
+ 0.10
– 0.30
0° – 8°
(reference value)
FP-14DN
Conforms
Conforms
0.13 g
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Cautions
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copyright, trademark, or other intellectual property rights for information contained in this document.
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intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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