Page 1
HD74HC160/HD74HC161/
HD74HC162/HD74HC163
Synchronous Decade Counter (Direct Clear)
Synchronous 4-bit Binary Counter (Direct Clear)
Synchronous Decade Counter (Synchronous Clear)
Synchronous 4-bit Binary Counter (Synchronous Clear)
Description
The HD74HC160 and the HD74HC162 are 4 bit decade counters, and the HD74HC161 and the
HD74HC163 are 4 bit binary counters All flip-flops are clocked simultaneously on the low to high to
transition (positive edge) of the clock input waveform.
These counters may be preset using the load input. Presetting of all four flip-flops is synchronous to thte
rising edge of clock. When load is held low counting is disabled and the data on the A, B, C, and D inputs
is loaded into the counter on the rising edge of clock. If the load input is taken high before the positive
edge of clock the count operation will be unaffected.
All of these counters may be cleared by utilizing the clear input. The clear function on the HD74HC162
and HD74HC163 counters are synchronous to the clock. That is, the counters are cleared on the positive
edge of clock while the clear input is held low.
The HD74HC160 and HD74HC161 counters are cleared asynchronously. When the clear is taken low the
counter is cleared immediately regardless of the clock.
Two active high enable inputs Enable P and Enable T and a ripple carry output are provided to enable easy
cascading of counters. Both enable inputs must be high to count. The Enable T input also enables the
Ripple Carry output. When enabled, the Ripple Carry outputs a positive pulse when the counter overflows.
This pulse is approximately equal in duration to the high level portion of the QA outputs. The Ripple Carry
output is fed to successive cascaded stages to facilitate easy implementation of N-bit counters.
Features
• High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
Page 2
HD74HC160/HD74HC161/HD74HC162/HD74HC163
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Inputs Outputs
Clock Clear*
Note: 1. 162 and 163 Only-160 and 161 are Asynchronous Clear Devices
Asynchronous clear HD74HC160P HD74HC161P
Synchronous clear HD74HC162P HD74HC163P
1
L X X X Reset-clear
H L X X Load input data
H H H H Count
H H L X No count
H H X L No count
Pin Arrangement
Load Enable P Enable T Q
Decade Counter Binary Counter
n
Clear
Clock
Data
Inputs
Enable P
GND
V
1
2
3
A
4
B
5
C
6
D
7
8
CLR
CK
A
B
C
D
P
Load
(Top view)
Ripple
Carry
Q
QB
QC
QD
T
A
16
CC
Ripple
15
Carry Output
14
QA
13
QB
12
QC
11
QD
10
Enable T
9
Load
Outputs
2
Page 3
HD74HC160/HD74HC161/HD74HC162/HD74HC163
DC Characteristics
Ta = –40 to
Ta = 25°C
Item Symbol V
Input voltage V
IH
(V) Min Typ Max Min Max Unit Test Conditions
CC
2.0 1.5 — — 1.5 — V
4.5 3.15 — — 3.15 —
6.0 4.2 — — 4.2 —
V
IL
2.0 — — 0.5 — 0.5 V
4.5 — — 1.35 — 1.35
6.0 — — 1.8 — 1.8
Output voltage V
OH
2.0 1.9 2.0 — 1.9 — V Vin = VIH or VILIOH = –20 µA
4.5 4.4 4.5 — 4.4 —
6.0 5.9 6.0 — 5.9 —
4.5 4.18 — — 4.13 — IOH = –4 mA
6.0 5.68 — — 5.63 — IOH = –5.2 mA
V
OL
2.0 — 0.0 0.1 — 0.1 V Vin = VIH or VILIOL = 20 µA
4.5 — 0.0 0.1 — 0.1
6.0 — 0.0 0.1 — 0.1
4.5 — — 0.26 — 0.33 IOL = 4 mA
6.0 — — 0.26 — 0.33 IOL = 5.2 mA
Input current Iin 6.0 — — ±0.1 — ±1.0 µA Vin = VCC or GND
Quiescent supply
I
CC
6.0 — — 4.0 — 40 µA Vin = VCC or GND, Iout = 0 µA
current
+85°C
3
Page 4
HD74HC160/HD74HC161/HD74HC162/HD74HC163
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = –40 to
Ta = 25°C
Item Symbol V
Maximum clock f
max
(V) Min Typ Max Min Max Unit Test Conditions
CC
2.0 — — 5 — 4 MHz
frequency 4.5 — — 25 — 20
6.0 — — 29 — 23
Propagation delay t
time t
PLH
PHL
2.0 — — 160 — 200 ns Clock to Q
4.5 — 18 32 — 40
6.0 — — 27 — 34
2.0 — — 225 — 280 ns Clear to Q
4.5 — 23 45 — 56 (HC160, HC161 only)
6.0 — — 38 — 48
2.0 — — 150 — 190 ns Enable T to Ripple Carry output
4.5 — 15 30 — 38
6.0 — — 26 — 33
2.0 — — 200 — 250 ns Clock to Ripple carry output
4.5 — 16 40 — 50
6.0 — — 34 — 43
Setup time t
su
2.0 125 — — 156 — ns Data to Clock
4.5 25 9 — 31 —
6.0 21 — — 26 —
2.0 125 — — 156 — Load to Clock
4.5 25 15 — 31 —
6.0 21 — — 26 —
2.0 125 — — 156 — Clear to Clock
4.5 25 — — 31 — (HC162, HC163 only)
6.0 21 — — 26 —
Hold time t
h
2.0 0 — — 0 — ns
4.5 0 –7 — 0 —
6.0 0 — — 0 —
Removal time t
rem
2.0 100 — — 125 — ns
4.5 20 7 — 25 —
6.0 17 — — 21 —
+85°C
4
Page 5
HD74HC160/HD74HC161/HD74HC162/HD74HC163
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) (cont)
Ta = –40 to
Ta = 25°C
Item Symbol V
Pulse width t
w
(V) Min Typ Max Min Max Unit Test Conditions
CC
2.0 80 — — 100 — ns
4.5 16 6 — 20 —
6.0 14 — — 17 —
Output rise/fall t
time t
TLH
THL
2.0 — — 75 — 95 ns
4.5 — 5 15 — 19
6.0 — — 13 — 16
Input capacitance Cin — — 5 10 — 10 pF
Function Table
Count Enable/Disable
+85°C
Control Inputs Result at Outputs
Load Enable P Enable T Q
to Q
A
D
Ripple Carry Output
H H H Count High when QA to QD are maximum
L H H No count
X L H No count High when QA to QD are maximum
X H L No count L
X L L No count L
5
Page 6
HD74HC160/HD74HC161/HD74HC162/HD74HC163
Timing Diagram
HD74HC160/HD74HC162
Sequence illustrated in waveforms.
1. Clear outputs to zero.
2. Preset to BCD seven.
3. Count to eight, nine, zero, one, two and three.
4. Inhibit
(Asynchronous)Clear(HC160)
Clear(HC162)
Data
Inputs
Load
A
B
C
D
(Synchronous)
Clock(HC160)
Clock(HC162)
Count
Enables
Outputs
Enable P
Enable T
Q
A
QB
QC
QD
Ripple
Carry
Output
Clear Load
0987321
Count
Inhibit
6
Page 7
HD74HC160/HD74HC161/HD74HC162/HD74HC163
HD74HC161/HD74HC163
Sequence illustrated in waveforms.
1. Clear outputs to zero.
2. Preset to binary twelve.
3. Count to thirteen, fourteen, fifteen, zero, one and two.
4. Inhibit
(Asynchronous)Clear(HC161)
Clear(HC163)
Data
Inputs
Clock(HC161)
Clock(HC163)
Count
Enables
Load
A
B
C
D
Enable P
Enable T
(Synchronous)
Outputs
Q
A
QB
QC
QD
Ripple
Carry
Output
Clear Load
15141312 210
Count
Inhibit
7
Page 8
HD74HC160/HD74HC161/HD74HC162/HD74HC163
Logic Diagram
HD74HC160
Decade Counter with Asynchronous Clear
T1
CLR
C
C
Load
A
B
C
Load
P
T
CLR
C
C
Load
Load
P2
T3
CLR
C
C
Load
Load
P3
QA
QA
1
2
QB
QB
QC
QC
QA
QB
QC
Enable P
Enable T
Clear
Clock
Load
T
4
CLR
C
C
Load
V
CC
CLR
C
C
Load
Load
Load
P4
D
QD
QD
QD
Ripple
Carry
Output
8
Page 9
HD74HC160/HD74HC161/HD74HC162/HD74HC163
HD74HC161
4-bit Binary Counter with Asynchronous Clear
A
B
C
T1
CLR
C
C
Load
Load
P
1
T
2
CLR
C
C
Load
Load
P2
T3
CLR
C
C
Load
Load
P3
QA
QA
QB
QB
QC
QC
QA
QB
QC
Enable P
Enable T
Clear
Clock
Load
T
4
CLR
C
C
Load
CLR
C
C
Load
Load
Load
P4
D
QD
QD
QD
Ripple
Carry
Output
9
Page 10
HD74HC160/HD74HC161/HD74HC162/HD74HC163
HD74HC162
Decade Counter with Synchronous Clear
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
A
B
C
D
P
T
IN
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
T
Q
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
Q
IN
V
CC
QA
QB
QC
QD
RCO
CK
LD
CLR
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
10
Page 11
HD74HC160/HD74HC161/HD74HC162/HD74HC163
HD74HC163
4-bit Binary Counter with Synchronous Clear
A
B
C
D
T
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
IN
T
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
IN
T
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
IN
T
CR
CR
LD
LD
LD·CLR
LD·CLR
CLR
CLR
IN
Q
Q
Q
Q
Q
Q
Q
Q
QA
QB
QC
QD
P
T
CK
LD
CLR
RCO
CK
CK
LD
LD
LD·CLR
LD·CLR
CLR
CLR
11
Page 12
19.20
20.00 Max
16 9
1.3
Unit: mm
6.30
7.40 Max
81
1.11 Max
2.54 ± 0.25
0.48 ± 0.10
5.06 Max
2.54 Min
0.51 Min
Hitachi Code
JEDEC
EIAJ
Weight
7.62
+ 0.13
0.25
– 0.05
0° – 15°
(reference value)
DP-16
Conforms
Conforms
1.07 g
Page 13
16
Unit: mm
10.06
10.5 Max
9
5.5
1
0.80 Max
1.27
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
8
0.12
0.10 ± 0.10
0.15
M
2.20 Max
7.80
0.20 ± 0.04
*0.22 ± 0.05
0.70 ± 0.20
Hitachi Code
JEDEC
EIAJ
(reference value)
Weight
+ 0.20
– 0.30
1.15
0° – 8°
FP-16DA
—
Conforms
0.24 g
Page 14
16
Unit: mm
9.9
10.3 Max
9
1
1.27
0.635 Max
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
8
0.25
+ 0.11
– 0.04
0.14
0.15
3.95
1.75 Max
M
6.10
1.08
0.20 ± 0.03
*0.22 ± 0.03
+ 0.67
0.60
– 0.20
Hitachi Code
JEDEC
EIAJ
Weight
+ 0.10
– 0.30
0° – 8°
(reference value)
FP-16DN
Conforms
Conforms
0.15 g
Page 15
16 9
18
+ 0.08
*0.22
– 0.07
0.20 ± 0.06
5.00
5.30 Max
0.65 Max
0.65
0.13
Unit: mm
4.40
1.0
M
6.40 ± 0.20
0.10
1.10 Max
*Dimension including the plating thickness
Base material dimension
0.15 ± 0.04
*0.17 ± 0.05
+0.03
–0.04
0.07
0° – 8°
Hitachi Code
JEDEC
EIAJ
(reference value)
Weight
0.50 ± 0.10
TTP-16DA
—
—
0.05 g
Page 16
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