The HD74AC538 decoder/demultiplexer accepts three Address (A0 to A2) input signal and decodes them
to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the
outputs are active LOW or active HIGH. A HIGH signal on either of the active LOW output Enable (OE)
inputs forces all outputs to the high impedance state. Two active HIGH and two active LOW input enables
are available for easy expansion to 1-of-32 decoding with four packages, or for data demultiplexing to 1-of8 or 1-of-16 destinations.
Features
• Output Polarity Control
• Data Demultiplexing Capability
• Multiple Enables for Expansion
• Outputs Source/Sink 24 mA
Page 2
HD74AC538
Pin Arrangement
O2
1
20
V
CC
Logic Symbol
2
O1
O0
3
OE1
4
OE2
5
A0
6
7
A1
O5
8
O6
9
GND
1011
(Top view)
19
18
17
16
15
14
13
12
O3
O4
A2
E1
E2
E
E4
P
O
3
7
PA0
E1
E2
E3
E4
OE1
OE2
O0O1O2O3O4O5O6O7
2
A1 A2
Page 3
Pin Names
A0 to A2Address Inputs
E1, E
E3, E
Enable Inputs (Active LOW)
2
Enable Inputs (Active HIGH)
4
PPolarity Control Input
OE1, OE2Output Enable Inputs (Active LOW)
O0 to O73-State Outputs
Logic Diagram
A2
A1
A0
E
1
E2
E3
E4
HD74AC538
P
OE1
OE2
O7O6O5O4O3O2O1O0
3
Page 4
HD74AC538
Truth Table
InputsOutputs
FunctionOE
High impedanceHXXXXXXXXXZZZZZZZ
DisableLLHXXXXXXOutputs equal input
Active HIGH outputLLLLHHLLLHLLLLLLL
(P = L)LLLLHHLLHLHLLLLLL
Active LOW outputLLLLHHLLLLHHHHHHH
(P = L)LLLL HHL LHHLHHHHHH
H :High Voltage Level
L :Low Voltage Level
X :Immaterial
Z :High Impedance
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