Datasheet HD74AC538 Datasheet (HIT)

Page 1
HD74AC538
1-of-8 Decoder with 3-State Output
Description
The HD74AC538 decoder/demultiplexer accepts three Address (A0 to A2) input signal and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active LOW or active HIGH. A HIGH signal on either of the active LOW output Enable (OE) inputs forces all outputs to the high impedance state. Two active HIGH and two active LOW input enables are available for easy expansion to 1-of-32 decoding with four packages, or for data demultiplexing to 1-of­8 or 1-of-16 destinations.
• Output Polarity Control
• Data Demultiplexing Capability
• Multiple Enables for Expansion
• Outputs Source/Sink 24 mA
Page 2
HD74AC538
Pin Arrangement
O2
1
20
V
CC
Logic Symbol
2
O1
O0
3
OE1
4
OE2
5
A0
6
7
A1
O5
8
O6
9
GND
10 11
(Top view)
19
18
17
16
15
14
13
12
O3
O4
A2
E1
E2
E
E4
P
O
3
7
PA0
E1 E2 E3 E4 OE1 OE2
O0O1O2O3O4O5O6O7
2
A1 A2
Page 3
Pin Names
A0 to A2Address Inputs E1, E E3, E
Enable Inputs (Active LOW)
2
Enable Inputs (Active HIGH)
4
P Polarity Control Input
OE1, OE2Output Enable Inputs (Active LOW)
O0 to O73-State Outputs
Logic Diagram
A2
A1
A0
E
1
E2
E3 E4
HD74AC538
P
OE1 OE2
O7O6O5O4O3O2O1O0
3
Page 4
HD74AC538
Truth Table
Inputs Outputs
Function OE
High impedance H X XXXXXXXXZZZZZZZ
Disable L L H X X X X X X Outputs equal input
Active HIGH output L L L L H H L L L H L L LLLLL (P = L) LLLLHHLLHLHLLLLLL
Active LOW output L L L L H H L L L L H H HHHHH (P = L) LLLL HHL LHHLHHHHHH
H : High Voltage Level L : Low Voltage Level X : Immaterial Z : High Impedance
1OE2E1E2E3E4A2A1A0O0O1O2O3O4O5O6O7
ZHXXXXXXXZZZZZZZZ
LLXHXXXXX LLXXLXXXX LLXXXLXXX
LLLLHHLHLLLHLLLLL LLLLHHLHHLLLHLLLL LLLLHHHLLLLLLHLLL LLLLHHHLHLLLLLHLL LLLLHHHHLLLLLLLHL LLLLHHHHHLLLLLLLH
LLLL HHL HLHHLHHHHH LLLL HHL HHHHHLHHHH LLLLHHHLLHHHHLHHH LLLLHHHLHHHHHHLHH LLLL HHHHLHHHHHHLH LLLL HHHHHHHHHHHHL
DC Characteristics (unless otherwise specified)
Item Symbol Max Unit Condition
Maximum quiescent supply current I
Maximum quiescent supply current I
4
CC
CC
80 µAV
8.0 µAV
= VCC or ground, VCC = 5.5 V,
IN
Ta = Worst case
= VCC or ground, VCC = 5.5 V,
IN
Ta = 25°C
Page 5
AC Characteristics: HD74AC538
HD74AC538
Item Symbol V
Propagation delay t An to O
n
Propagation delay t An to O
n
Propagation delay t
E
, or E2 to O
1
n
Propagation delay t
E
, or E2 to O
1
n
Propagation delay t
E
, or E4 to O
3
n
Propagation delay t
E
, or E4 to O
3
n
Propagation delay t P to O
n
Propagation delay t P to O
n
Propagation delay t
OE
to O
n
n
Propagation delay t
OE
to O
n
n
Propagation delay t
OE
to O
n
n
Propagation delay t
OE
to O
n
n
PLH
PHL
PLH
PHL
PLH
PHL
PLH
PHL
PZH
PZL
PHZ
PLZ
(V)*1Min Typ Max Min Max Unit
CC
3.3 1.0 10.5 17.5 1.0 20.0 ns
5.0 1.0 8.0 12.5 1.0 14.0
3.3 1.0 9.5 17.5 1.0 20.0 ns
5.0 1.0 7.0 12.0 1.0 14.0
3.3 1.0 11.0 19.5 1.0 23.0 ns
5.0 1.0 8.0 14.5 1.0 16.5
3.3 1.0 10.0 19.5 1.0 23.0 ns
5.0 1.0 8.0 14.0 1.0 16.5
3.3 1.0 11.0 19.5 1.0 23.0 ns
5.0 1.0 8.5 14.5 1.0 17.0
3.3 1.0 10.5 20.0 1.0 23.5 ns
5.0 1.0 8.0 15.0 1.0 18.0
3.3 1.0 10.5 15.5 1.0 17.5 ns
5.0 1.0 9.0 11.0 1.0 12.5
3.3 1.0 9.0 15.0 1.0 17.0 ns
5.0 1.0 7.5 10.5 1.0 11.5
3.3 1.0 7.0 14.0 1.0 15.5 ns
5.0 1.0 5.0 8.5 1.0 9.5
3.3 1.0 8.5 16.5 1.0 19.0 ns
5.0 1.0 5.5 9.5 1.0 11.5
3.3 1.0 7.0 14.0 1.0 15.5 ns
5.0 1.0 6.0 10.5 1.0 11.5
3.3 1.0 9.0 14.5 1.0 17.0 ns
5.0 1.0 7.0 10.5 1.0 12.0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
Ta = +25°C C
= 50 pF
L
Ta = –40°C to +85°C CL = 50 pF
Capacitance
Item Symbol Typ Unit Condition
Input capacitance C Power dissipation capacitance C
IN
PD
4.5 pF VCC = 5.5 V 100 pF VCC = 5.0 V
5
Page 6
24.50
25.40 Max
Unit: mm
1120
6.30
1
0.89
1.27 Max
2.54 ± 0.25
1.30
10
0.48 ± 0.10
7.00 Max
0.51 Min
2.54 Min 5.08 Max
Hitachi Code JEDEC EIAJ Weight
7.62
+ 0.11
0.25
– 0.05
0° – 15°
(reference value)
DP-20N — Conforms
1.26 g
Page 7
20
Unit: mm
12.6
13 Max
11
5.5
1
0.80 Max
1.27
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
10
0.12
0.10 ± 0.10
0.15
M
2.20 Max
7.80
0.20 ± 0.04
*0.22 ± 0.05
0.70 ± 0.20
Hitachi Code JEDEC EIAJ Weight
(reference value)
+ 0.20 – 0.30
1.15
0° – 8°
FP-20DA — Conforms
0.31 g
Page 8
20
Unit: mm
12.8
13.2 Max 11
7.50
1
0.935 Max
1.27
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
10
0.12
0.20 ± 0.10
0.15
2.65 Max
M
10.40
0.25 ± 0.04
*0.27 ± 0.05
0.70
Hitachi Code JEDEC EIAJ Weight
(reference value)
+ 0.25 – 0.40
1.45
+ 0.57 – 0.30
0° – 8°
FP-20DB Conforms —
0.52 g
Page 9
20 11
110
+0.08
*0.22
–0.07
0.20 ± 0.06
6.50
6.80 Max
0.65 Max
0.65
0.13
Unit: mm
4.40
1.0
M
6.40 ± 0.20
0.10
1.10 Max
*Dimension including the plating thickness
Base material dimension
0.15 ± 0.04
*0.17 ± 0.05
+0.03
–0.04
0.07
0° – 8°
Hitachi Code JEDEC EIAJ
(reference value)
Weight
0.50 ± 0.10
TTP-20DA — —
0.07 g
Page 10
Cautions
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4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail­safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.
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