Page 1
HD74AC194
4-bit Bidirectional Unviersal Shift Register
Description
This bidirectional shift register is designed to incorporate virtually all of the features a system designer may
want in a shift register. It features parallel inputs, parallel outputs, right shift and left shift serial inputs,
operating mode control inputs, and a direct overriding clear line. The register has four destinct modes of
operation: parallel (broadside) load, shift right (in the direction Q0 toward Q3); shift left; inhibit clock (do
nothing).
Synchronous parallel loading is accomplished by applying the four bits of data and taking both mode
control inputs, S0 and S1, high. The data are loaded into their respective flip-flops and appear at the output
after the positive transition of the clock input. During loading, serial data flow is inhibited. Shift right is
accomplished synchronously with the rising edge of the clock pulse when S0 is high and S1 is low. Serial
date for this mode is entered at the shift right data input. When S0 is low and S1 is high, data shifts left
synchronously and new data is entered at the shifts left serial input. Clocking of the flip-flops is inhibited
when both mode control inputs are low. The mode control inputs should be changed only when the clock
input is high.
Features
• Asynchronous Master Reset
• Hole (Do Nothing) Mode
• Outputs Source/Sink 24 mA
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HD74AC194
Pin Arrangement
Logic Symbol
MR
D
SR
P0
P1
P2
P3
D
SL
GND
S0
1
2
3
4
5
6
7
8
(Top view)
DSR
16
15
14
13
12
11
10
DSLP0 P1 P2 P3
CC
V
Q0
Q1
Q2
Q3
CP
1
S
9
S0
S1
CP
MR Q0 Q1 Q2 Q3
Pin Names
S0, S
P0 to P3Parallel Data Inputs
D
SR
D
SL
CP Clock Pulse Input (Active Rising Edge)
MR Asynchronous Master Reset Input (Active LOW)
Q0 to Q3Parallel Outputs
2
Mode Control Inputs
1
Serial Data Input (Shift Right)
Serial Data Input (Shift Left)
Page 3
Logic Diagram
S0
S1
HD74AC194
DSL P3 P2 P1 P0 DSR
CP
MR
D
C
CQ
CL CL
D
C
CQ
CL CL
D
C
CQ
CL CL
D
C
CQ
CL CL
Q0Q1Q2Q3
Mode Select Table
Inputs Output
Operating Mode MR S
S
1
Reset L X X X X X L L L L
Hold H LLXXXq0q1q2q
Shift Left H H LXLXq1q2q3L
HHLXHXq1q2q3H
Shift Right H L H L X X L q
HLHHXX Hq0q1q
Parallel Load H H H X X p
H : HIGH Voltage Level
L : LOW Voltage Level
p
(qn) : Lower case letters indicate the state of the referenced input (or output) one setup time prior to the
n
LOW-to-HIGH clock transition
X : Immaterial
D
0
D
SR
P
SL
Q
n
p
n
Q
0
p
0
Q
1
q
0
p
1
Q
2
1
2
3
q
2
2
p
3
3
3
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HD74AC194
Timing Diagram
Mode
Control
Inputs
Parallel
Data
Inputs
Parallel
Data
Inputs
Outputs
CP
S
0
S1
MR
DSH
DSL
P0
P1
P2
P3
Q0
Q1
Q2
Q3
Clear ClearLoad
H
L
H
L
Shift Right Shift Left Inhibit
DC Characteristics (unless otherwise specified)
Item Symbol Max Unit Condition
Maximum quiescent supply current I
CC
80 µAV
= VCC or ground, VCC = 5.5 V,
IN
Ta = Worst case
Maximum quiescent supply current I
CC
8.0 µAV
= VCC or ground, VCC = 5.5 V,
IN
Ta = 25°C
4
Page 5
AC Characteristics: HD74AC194
HD74AC194
Item Symbol V
Maximum clock f
max
Ta = +25°C
C
= 50 pF
L
(V)*1Min Typ Max Min Max Unit
CC
3.3 7.5 — 65 MHz
Ta = –40°C to +85°C
CL = 50 pF
frequency 5.0 100 — 85
Propagation delay t
CP to Q
n
Propagation delay t
CP to Q
n
Propagation delay t
MR to Q
n
PLH
PHL
PHL
3.3 1.0 — 13.0 1.0 15.0 ns
5.0 1.0 — 10.0 1.0 11.5
3.3 1.0 — 13.0 1.0 15.0 ns
5.0 1.0 — 10.0 1.0 11.5
3.3 1.0 — 10.5 1.0 12.5 ns
5.0 1.0 — 8.0 1.0 9.0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
AC Operating Requirements: HD74AC194
Ta = –40°C
Ta = +25°C
C
= 50 pF
L
Item Symbol V
Setup time, HIGH or LOW t
su
(V)*1Typ Guaranteed Minimum Unit
CC
3.3 — 5.5 7.0 ns
Pn or DSR or DSL to CP 5.0 — 4.0 5.0
Hold time, HIGH or LOW t
h
3.3 — 2.0 3.0 ns
Pn or DSR or DSL to CP 5.0 — 1.5 2.0
Setup time, HIGH or LOW t
su
3.3 — 6.0 7.5 ns
Sn to CP 5.0 — 4.5 5.5
Hold time, HIGH or LOW t
h
3.3 — 0.0 0.0 ns
Sn to CP 5.0 — 0.0 0.0
Recovery time t
rec
3.3 — 0.5 0.5 ns
MR to CP 5.0 — 0.5 0.5
Pulse width t
w
3.3 — 5.5 7.0 ns
5.0 — 4.5 5.0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
to +85°C
CL = 50 pF
5
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HD74AC194
Capacitance
Item Symbol Typ Unit Condition
Input capacitance C
Power dissipation capacitance C
IN
PD
4.5 pF VCC = 5.5 V
100 pF VCC = 5.0 V
6
Page 7
19.20
20.00 Max
16 9
1.3
Unit: mm
6.30
7.40 Max
81
1.11 Max
2.54 ± 0.25
0.48 ± 0.10
5.06 Max
2.54 Min
0.51 Min
Hitachi Code
JEDEC
EIAJ
Weight
7.62
+ 0.13
0.25
– 0.05
0° – 15°
(reference value)
DP-16
Conforms
Conforms
1.07 g
Page 8
16
Unit: mm
10.06
10.5 Max
9
5.5
1
0.80 Max
1.27
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
8
0.12
0.10 ± 0.10
0.15
M
2.20 Max
7.80
0.20 ± 0.04
*0.22 ± 0.05
0.70 ± 0.20
Hitachi Code
JEDEC
EIAJ
(reference value)
Weight
+ 0.20
– 0.30
1.15
0° – 8°
FP-16DA
—
Conforms
0.24 g
Page 9
16
Unit: mm
9.9
10.3 Max
9
1
1.27
0.635 Max
*0.42 ± 0.08
0.40 ± 0.06
*Dimension including the plating thickness
Base material dimension
8
0.25
+ 0.11
– 0.04
0.14
0.15
3.95
1.75 Max
M
6.10
1.08
0.20 ± 0.03
*0.22 ± 0.03
+ 0.67
0.60
– 0.20
Hitachi Code
JEDEC
EIAJ
Weight
+ 0.10
– 0.30
0° – 8°
(reference value)
FP-16DN
Conforms
Conforms
0.15 g
Page 10
16 9
18
+ 0.08
*0.22
– 0.07
0.20 ± 0.06
5.00
5.30 Max
0.65 Max
0.65
0.13
Unit: mm
4.40
1.0
M
6.40 ± 0.20
0.10
1.10 Max
*Dimension including the plating thickness
Base material dimension
0.15 ± 0.04
*0.17 ± 0.05
+0.03
–0.04
0.07
0° – 8°
Hitachi Code
JEDEC
EIAJ
(reference value)
Weight
0.50 ± 0.10
TTP-16DA
—
—
0.05 g
Page 11
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.
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