Datasheet HCF4511BE Specification

Page 1
HCF4511B
BCD TO SEVEN SEGMENT LATCH/DECODER/DRIVER
■ HIGH OUTPUT SOURCING CAPABILITY (up
to 25mA).
■ INPUT LATCHES FOR BCD CODE
STORAGE
■ LAMP TEST AND BLANKING CAPA BIL ITY.
■ 7-SEGMENT OUT PUTS BLANKE D FOR BCD
INPUT CODES > 1001
■ STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
■ 5V, 10V, AND 15V PARAMETRIC RAT INGS
■ INPUT LEAKAGE CURRENT
I
= 100nA (MAX) AT VDD = 18V TA = 25°C
I
■ 100% TESTED FOR QUIESCENT CURRENT
■ MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS FOR DESCRIPTI ON OF B SERI ES CMOS DEVICES"
DESCRIPTION
HCF4511B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. HCF4511B is a BCD to 7 segmen t de coder driver made up of CMOS logic and n-p-n bipolar transistor output devices on a single monolithic structure. This device combines the low quiescent
DIP SOP
ORDER CODES
PACKAGE TUBE T & R
DIP HCF4511BEY
SOP HCF4511BM1 HCF4511M013TR
power dissipation and high noise immunity features of CMOS with n-p-n bipolar output transistor capable of sourcing up to 25mA. This capability allows HCF4511B to drive LEDs and other displays directly. Lamp Test (LT
), Blanking (BL), and Latch Enabl e or Strobe inputs are provided to test the display, shut off or intensity-modulate it, and store or strobe a BCD code, respectively. Several different signals may be multiplexed and displayed when external multiplexing circuitry is used.
PIN CONNECTION
1/13October 2002
Page 2
HCF4511B
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
7, 1, 2, 6 A, B, C, D Bcd Inputs
13, 12, 11,
10, 9, 15, 14
3LT 4BL
5 LE/STROBE 8
16
FUNCTIONAL DIAGRAM
a to g 7-Segment Outputs
V
SS
V
DD
Lamp Test Input Blanking Input Latch Enable or Strobe
Input Negative Supply Voltage Positive Supply Voltage
2/13
Page 3
LOGIC DIAGRAM
HCF4511B
TRUTH TABLE
LE BL LT D C B A a b c d e f g DISPLAY
XXLXXXXHHHHHHH 8 XLHXXXXLLLLLLLBlank LHHLLLLHHHHHHL 0 LHHLLLHLHHLLLL 1 LHHLLHLHHLHHLH 2 LHHLLHHHHHHLLH 3 LHHLHLLLHHLLHH 4 LHHLHLHHLHHLHH 5 LHHLHHLLLHHHHH 6 LHHLHHHHHHL LLL 7 LHHHLLLHHHHHHH 8 LHHHLLHHHHL LHH 9 LHHHLHLLLLLLLLBlank LHHHLHHLLLLLLLBlank LHHHHLLLLLLLLLBlank LHHHHLHLLLLLLLBlank LHHHHHLLLLLLLLBlank LHHHHHHLLLLLLLBlank HHHXXXX * *
X: Don’t Care
3/13
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HCF4511B
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.
All voltage values are referred to V
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
T
Supply Voltage
DD
DC Input Voltage -0.5 to VDD + 0.5
I
I
DC Input Current
I
Power Dissipation per Package 200 mW
D
-0.5 to +22 V
10 mA
±
Power Dissipation per Output Transistor 100 mW Operating Temperature
op
Storage Temperature
stg
pin voltage.
SS
Supply Voltage
DD
Input Voltage 0 to V
I
Operating Temperature
op
-55 to +125 °C
-65 to +150 °C
3 to 20 V
DD
-55 to 125 °C
V
V
4/13
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DC SPECIFICATIONS
Test Condition Value
T
Symbol Parameter
I
Quiescent Current 0/5 5 0.04 5 150 150
L
V
(V)
V
I
(V)
|I
|
O
O
(µA)
V
DD
(V)
= 25°C
A
Min. Typ. Max. Min. Max. Min. Max.
0/10 10 0.04 10 300 300 0/15 15 0.04 20 600 600 0/20 20 0.08 100 3000 3000
High Level Output
V
OH
Voltage
0/5 5 4.95 4.95 4.95
0/15 15 14.95 14.95 14.95
Low Level Output
V
OL
Voltage
5/0 5 0.05 0.05 0.05
15/0 15 0.05 0.05 0.05
High Level Input
V
IH
Voltage
0.5/3.8 5 3.5 3.5 3.5
1.5/13.8 15 11 11 11
V
IL
Low Level Input Voltage
3.8/0.5 5 1.5 1.5 1.5
13.8/1.5 15 4 4 4
V
OH
Output Drive Voltage
0
4.1 4.57 4.1 4.1
5 4.24
10 3.6 4.12 3.3 3.3
5
15 3.94 20 2.8 3.75 2.5 2.5 25 3.54
0
9.1 9.58 9.1 9.1
5 9.26
10 8.75 9.17 8.45 8.45
10
15 9.04 20 8.1 8.90 7.8 7.8 25 8.75
0
14.1 14.59 14.1 14.1
5 14.27
10 13.75 14.18 13.45 13.45
15
15 14.07 20 13.1 13.95 12.8 12.8 25 13.80
I
OL
Output Sink Current
0/5 0.4 5 0.44 1 0.36 0.36
0/15 1.5 15 3 6.8 2.4 2.4
Input Leakage
I
I
Current (any input)
C
Input Capacitance
I
(any input)
The Noi se Margin fo r both "1" and "0" level is: 1V min. with VDD=5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
0/18 18
-5
10
±
5 7.5 pF
-40 to 85°C -55 to 125°C
0.1
±
1
±
HCF4511B
Unit
A
µ
V0/10 10 9.95 9.95 9.95
V10/0 10 0.05 0.05 0.05
V1/8.8 10 7 7 7
V8.8/1 10 3 3 3
V
V
V
mA0/10 0.5 10 1.1 2.6 0.9 0.9
1
±
A
µ
5/13
Page 6
HCF4511B
DYNAMIC ELECTRICAL CHARACTERISTICS (T
TEST CONDITION Value (*) Unit
Symbol Parameter
t
t
t
t
t
t
t
t
t
setup
t
(*) Typical temperature coefficient for all VDD value is 0.3 %/°C.
Propagation Delay Time
PHL
(DATA)
Propagation Delay Time
PLH
(DATA)
Propagation Delay Time
PHL
PLH
PHL
PLH
TLH
THL
)
(BL
Propagation Delay Time
)
(BL
Propagation Delay Time (LT
)
Propagation Delay Time
)
(LT
Transition Time 5 40 80
Transition Time 5 125 310
Setup Time 5 150 75
Hold Time 5 0 -75
hold
Strobe Pulse Width 5 400 200
t
W
V
DD
(V)
5 520 1040
15 150 300
5 660 1320
15 180 360
5 350 700
15 125 250
5 400 800
15 150 300
5 250 500
15 85 170
5 150 300
15 50 100
15 20 50
15 65 160
15 40 20
15 0 -20
15 100 50
= 25°C, CL = 50pF, RL = 200KΩ, tr = tf = 20 ns)
amb
Min. Typ. Max.
ns10 210 420
ns10 260 520
ns10 175 350
ns10 175 350
ns10 125 250
ns10 75 150
ns10 30 60
ns10 75 185
ns10 70 35
ns10 0 -35
ns10 160 80
6/13
Page 7
TYPICAL APPLICATIONS (Interfacing with various displays)
Driving Common-cathode 7 Segment Led Displays
HCF4511B
Driving Low-voltage Fluorescent Displays Driving Incandescent Displays
A medium- brightness in tensity dis pl ay can be obtai ned with low-volt age fluore scent displays such as the Tung-Sot Digi­vac S/ G series
2 Of 7 Segment Shown Connected
Resistor R from VDD V DD to each 7- segment dri ver output are chosen t o keep all Numi tron segment s slightly on and warm
7/13
Page 8
HCF4511B
TEST CIRCUIT
CL = 50pF or equivalent (in cludes jig and probe capac i t ance) R
= 200K
Ω
L
R
= Z
of pulse generator (typically 50Ω)
T
OUT
WAVEFORM 1 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
8/13
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WAVEFORM 2 : MINIMUM PULSE WIDTH (f=1MHz; 50% duty cycle)
HCF4511B
WAVEFORM 3 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
9/13
Page 10
HCF4511B
WAVEFORM 4 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
WAVEFORM 5 : MINIMUM SETUP AND HOLD TIME (f=1MHz; 50% duty cycle)
10/13
Page 11
HCF4511B
Plastic DIP-16 (0.25) MECHANICAL DATA
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
a1 0.51 0.020
B 0.77 1.65 0.030 0.065 b 0.5 0.020
b1 0.25 0.010
D 20 0.787 E 8.5 0.335 e 2.54 0.100
e3 17.78 0.700
F 7.1 0.280
I 5.1 0.201 L 3.3 0.130 Z 1.27 0.050
P001C
11/13
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HCF4511B
SO-16 MECHANICAL DATA
DIM.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007 a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45˚ (typ.)
D 9.8 10 0.385 0. 393 E 5.8 6.2 0. 228 0.244 e 1.27 0.050
e3 8.89 0.350
F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0. 050
M 0.62 0.024
S ˚ (max.)
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
8
12/13
PO13H
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HCF4511B
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for t he
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for t he consequences of use of such informatio n nor for any infringement of paten ts or o ther rig hts of t hird part ies which ma y result from
consequences of use of such informatio n nor for any infringement of paten ts or o ther rig hts of t hird part ies which ma y result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previousl y suppl ied. STM icroel ectronics produc ts are not auth orized for use as c ritica l compone nts in l ife s upport dev ices or
previousl y suppl ied. STM icroel ectronics produc ts are not auth orized for use as c ritica l compone nts in l ife s upport dev ices or systems without express written approval of STMicroelectronics.
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