Datasheet HCF4031B Datasheet (SGS Thomson Microelectronics)

64-STAGE STATICSHIFT REGISTER

.FULLY STATIC OPERATION : DC to 16MHz

(TYP.) @ VDD–VSS=15V

.STANDARD TTL DRIVE CAPABILITY ON Q

OUTPUT

.RECIRCULATION CAPABILITY

.THREECASCADINGMODES:

DIRECT CLOCKING FOR HIGH-SPEED
OPERATION
DELAYEDCLOCKINGFORREDUCEDCLOCK
DRIVE REQUIREMENTS
ADDITIONAL1/2 STAGEFOR SLOW CLOCKS

.QUIESCENT CURRENT SPECIFIED TO 20V

FOR HCC DEVICE

.STANDARDIZED, SYMMETRICAL OUTPUT

CHARACTERISTICS

.5V, 10V,AND 15VPARAMETRIC RATINGS

.INPUT CURRENT OF 100nAat 18V AND 25°C

FOR HCC DEVICE

.100% TESTEDFOR QUIESCENTCURRENT

.MEETSALLREQUIREMENTSOFJEDECTEN-

TATIVE STANDARD NO. 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTIONOF ”B”
SERIESCMOS DEVICES”

HCC/HCF4031B

EY

(Plastic Package)

C1

(ChipCarrier)

ORDERCODES :

HCC4031BF HCF4031BEY

PIN C O N NECTION S

F

(CeramicPackage)

HCF4031BC1

DESCRIPTION
TheHCC4031B(extended temperature range) and

HCF4031B (intermediate temperature range) are

monolithic integrated circuits, available in 16-lead
dual in-line plastic orceramic package.

The HCC/HCF4031B is a static shift register that
contains 64 D-type, master-slave flip-flop stages
andonestagewhichisaD-type masterflip-floponly
(referred to as a 1/2 stage).The logiclevel present
at the DATA input is transferred into the first stage
and shifted one stage at each positive-going clock
transition. Maximum clock frequencies up to 16
Megahertz(typical) can beobtained. Because fully
static operation is allowed, information can be per­manentlystored withthe clock linein either thelow
or high state. The HCC/HCF4031B has a MODE
CONTROLinput that,whenin thehighstate,allows
operation in the recirculating mode. The MODE
CONTROLinputcanalsobeusedtoselectbetween
two separate data sources.Register packages can
be cascaded and the clock lines driven directly for
high-speed operation. Alternatively, adelayedclock
output(CLD)isprovided thatenables cascading reg-

June 1989

1/12

HCC/HCF4031B

ister packages while allowing reduced clock drive
fan-out and transition-time requirements. A third
cascading option makes use of the Q’ output from
the 1/2 stage, which is available on the next nega-

FUNCTIONAL DIAGRAM

tive-going transition of the clock after the Q output
occurs. This delayed output, like the delayed clock
CLD, is used with clocks having slow rise and fall
times.

ABSOLUTE M AXI MUM RATINGS

Symbol Parameter Value Unit

V

* Supply Voltage :HC C Types

DD

HCF Types

V

Input Voltage – 0.5 to VDD+ 0.5 V

I

I

DC Input Current (any one input) ± 10 mA

I

P

Total Power Dissipation (per package)

tot

– 0.5 to + 20
– 0.5 to + 18

200

V
V

mW
Dissipation per Output Transistor
for T

T

T

Stresses abovethoselisted under”Absolute MaximumRatings” may causepermanent damageto thedevice.This is a stress rating only and
functionaloperation ofthe deviceattheseor anyotherconditions abovethose indicatedin theoperationalsections ofthis specificationisnotimplied.
Exposureto absolutemaximum ratingconditions for externalperiodsmayaffect device reliability.
* Allvoltage valuesare referredto VSSpinvoltage.

Operating Temperature : HCC Types

op

Storage Temperature – 65 to + 150 °C

stg

= Full Package-temperature Range

op

HCF Types

100

– 55 to + 125

–40to+85

mW

°C
°C

RECOMMENDED OPERATING CONDITIONS

Symbol Paramet e r Valu e Unit

V

Supply Voltage : HCC Types

DD

HCF Types

V

Input Voltage 0 to V

I

T

Operating Temperature : HCC Types

op

HCF Types

3to+18
3to+15

DD

– 55 to + 125

–40to+85

V
V

V

°C
°C

2/12

LOGIC DIAGRAM AND TRUTH TABLES

HCC/HCF4031B

IN P U T CONTRO L CIRCUIT

Da ta Recirc. Mod e

1X01

0X00
X111
X010

TYPICA L STAGE

Data CL Data + 1

0
1
X

1 = HIGHLEVEL 0 = LOW LEVEL NC = NO CHANGE

–

/

–

–

/

–

–

\

–

Bit Into

Stage 1

0
1

NC

X = DON’T CARE

OUTPUT FROM Q’ (pin 5)

Data + 6 4 CL Data + 64.5

0
1

X

–

\

–

–

\

–

–

/

–

0
1

NC

3/12

HCC/HCF4031B

STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)

Test Conditions Valu e

Symbol Parameter

(V) (V) (µA) (V)

I

L

Quiescent
Current

HCC
Types

0/ 5 5 5 0.04 5 150
0/10 10 10 0.04 10 300
0/15 15 20 0.04 20 600
0/20 20 100 0.08 100 3000

HCF
Types

OH

Output High

V

Voltage

0/ 5 5 20 0.04 20 150
0/10 10 40 0.04 40 300
0/15 15 80 0.04 80 600
0/ 5

0/10
0/15

V

OL

Output Low
Voltage

5/0
10/0
15/0

V

IH

Input High
Voltage

IL

Input Low

V

Voltage

I

OH

Output
Source
Current
(Source)
Q, Q, Q
CL

D

HCC
Types

HCF
Types

0/ 5 2.5 5 – 2 – 1.6 – 3.2 – 1.15
0/ 5 4.6 5 – 0.64 – 0.51 – 1 – 0.36
0/10 9.5 10 – 1.6 – 1.3 – 2.6 – 0.9
0/15 13.5 15 – 4.2 – 3.4 – 6.8 – 2.4
0/ 5 2.5 5 – 1.53 – 1.36 – 3.2 – 1.1
0/ 5 4.6 5 – 0.52 – 0.44 – 1 – 0.36
0/10 9.5 10 – 1.3 – 1.1 – 2.6 – 0.9
0/15 13.5 15 – 3.6 – 3.0 – 6.8 – 2.4

OL

Output
Sink
Current Q

HCC
Types

I

HCF
Types

OL

Output
Sink
Current

HCC
Types

I

Q, Q’
CL

D

HCF
Types

I

IH,IIL

Input
Leakage
Current

HCC
Types

HCF
Types

Input Capacitance Any Input 5 7.5 pF

C

I

*T

=–55°Cfor HCC device : – 40°C forHCF device.

Low

*T

= + 125°CforHCCdevice : + 85°C for HCF device.

High

TheNoiseMarginforboth ”1” and ”0” level is : 1Vmin. withVDD= 5V, 2V min. withVDD=10V, 2.5 Vmin.with VDD= 15V.

0/ 5 0.4 5 2.56 2.04 4 1.44
0/10 0.5 10 6.4 5.2 10.4 3.6
0/15 1.5 15 16.8 13.6 27.2 9.6
0/ 5 0.4 5 2.08 1.74 4 1.43
0/10 0.5 10 5.01 4.42 10.4 3.74
0/15 1.5 15 13.6 11.56 27.2 9.52
0/ 5 0.4 5 0.64 0.51 1 0.36
0/10 0.5 10 1.6 1.3 2.6 0.9
0/15 1.5 15 4.2 3.4 6.8 2.4
0/ 5 0.4 5 0.52 0.44 1 0.36
0/10 0.5 10 1.3 1.1 2.6 0.9
0/15 1.5 15 3.6 3.0 6.8 2.4

0/18

0/15

V

I

V

O

0.5/4.5
1/9

1.5/13.5

4.5/0.5
9/1

13.5/1.5

Any Input

|IO|V

DD

T

Low

Min. M ax. Min. Typ. Max. Min. Max.

<1

5

4.95

<1

10

9.95

<1

15

14.95

<1
<1
<1

<1
<1
<1

<1
<1
<1

5
10
15

5
10
15

5
10
15

0.05

0.05

0.05

3.5
7

11

1.5

18 ± 0.1 ±10

15 ± 0.3 ±10

* 25°CT

4.95

9.95

14.95

High

4.95

9.95

14.95

0.05

0.05

0.05

3.5
7

11

3.5
7

11

1.5
3
4

3
4

–5

± 0.1 ± 1

–5

± 0.3 ± 1

*

0.05

0.05

0.05

1.5
3
4

Unit

µA

V

V

V

V

mA

mA

mA

µA

4/12

HCC/HCF4031B

DYNAMIC ELECTRICAL CHARACTERISTICS (T

=25°C,CL= 50pF, RL= 200kΩ,

amb

typical temperature coefficient for all VDDvalues is 0.3%/°C, all input rise and fall times = 20ns)

Symbol Paramet e r

t

,

PHL

t

PL H,tPLH

Propagation Delay Time :
Clock to Q,
Clock to Q

t

,

PHL

t

PL H,tPHL

Propagation Delay Time :
Clock to Q’
Clock to Q

Clock to CL

D

Test Conditions Value

(V) Min. Typ. Max.

V

DD

5 250 500
10 110 220
15 90 180

5 190 380
10 80 160
15 65 130

5 100 200
10 50 100
15 40 80

t

THL’,tTLH

Transition Time :
(any output, except Qt

THL

5 100 200

)

10 50 100
15 40 80

t

THL

Q, 5 50 100

10 25 50
15 20 40

t

setup

Data Setup Time 5 30 60

10 15 30
15 10 20

t

hold

Data Hold Time 5 30 60

10 15 30
15 10 20

t

Clock Pulse Width 5 120 240

W

10 50 100
15 40 80

f

max

Maximum Clock Input
Frequency**

524
10 5 10
15 6 12

t

r,tf

Clock Input Rise or Fall Time* 5 1000

10 1000
15 200

* If more than one unit is cascaded in the parallel clocked application, trCL should be made less than or equal to the sum of
the propagation delay at 50pF and the transmition time of the output driving stage.
* * Maximum Clock Frequency for Cascaded Units;

a) Using Delayed Clock Feature in Recirculation Mode :

fmax =

b) Not Usng Delaye Clock :

fmax =

(n-1) CLD prop. delay + Q prop. delay + set-up time

1

propagation delay + set-up time

1

where n = nimber of packages

Unit

ns

ns

ns

ns

ns

ns

ns

ns

MHz

µs

5/12

HCC/HCF4031B

TypicalOutputLow (sink)Current Characteristics. Minimum Output Low (sink) Current Charac-

teristics.

Typical Output High (source) Current Charac­teristics.

Minimum Output High (source) Current Charac­teristics.

6/12

HCC/HCF4031B

TYPICAL APPLICATIONS

CASCADINGUSINGDIRECTCLOCKINGFORHIGHSPEEDOPERATION (SEECLOCKRISEANDFALL
TIME REQUIREMENT).

CASCADING USING DELAYED CLOCKING FOR REDUCEDCLOCK DRIVE REQUIREMENTS.

7/12

HCC/HCF4031B

TYPICAL APPLICATIONS (continued)

CASCADINGUSING HALF- CLOCK-PULSE DELAYEDDATAOUTPUT (Q’) TOPERMITUSE OFSLOW
RISEAND FALL TIME CLOCK INPUTS.

TEST CIRCUITS

QuiescentDeviceCurrent.

Input Leakage Current.

Noise Immunity.

8/12

Plastic DIP16 (0.25) MECHANICAL DATA

HCC/HCF4031B

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

a1 0.51 0.020

B 0.77 1.65 0.030 0.065

b 0.5 0.020

b1 0.25 0.010

D 20 0.787
E 8.5 0.335

e 2.54 0.100

e3 17.78 0.700

F 7.1 0.280

I 5.1 0.201

L 3.3 0.130

Z 1.27 0.050

mm inch

P001C

9/12

HCC/HCF4031B

Ceramic DIP16/1 MECHANICAL DATA

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

A 20 0.787
B 7 0.276
D 3.3 0.130
E 0.38 0.015

e3 17.78 0.700

F 2.29 2.79 0.090 0.110

G 0.4 0.55 0.016 0.022

H 1.17 1.52 0.046 0.060

L 0.22 0.31 0.009 0.012

M 0.51 1.27 0.020 0.050

N 10.3 0.406
P 7.8 8.05 0.307 0.317

Q 5.08 0.200

mm inch

10/12

P053D

PLCC20 MECHANICAL DATA

HCC/HCF4031B

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

A 9.78 10.03 0.385 0.395
B 8.89 9.04 0.350 0.356

D 4.2 4.57 0.165 0.180
d1 2.54 0.100
d2 0.56 0.022

E 7.37 8.38 0.290 0.330

e 1.27 0.050

e3 5.08 0.200

F 0.38 0.015

G 0.101 0.004
M 1.27 0.050

M1 1.14 0.045

mm inch

P027A

11/12

HCC/HCF4031B

Information furnished is believed tobe accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringementofpatents orother rightsof third parties which may results from its use. No
license isgrantedby implication orotherwiseunder any patentorpatent rights ofSGS-THOMSONMicroelectronics. Specificationsmentioned
in this publication are subject to changewithout notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproductsare notauthorized foruse ascritical componentsin life supportdevices orsystemswithout express
written approval of SGS-THOMSON Microelectonics.

 1994 SGS-THOMSON Microelectronics - All RightsReserved

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