JESD13B " STANDARD SPECIFICATIONS
FOR DESCRIPTI ON OF B SERI ES CMOS
DEVICES"
DESCRIPTION
The HCF4018B is a m onolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
The HCF4018B consist of 5 Johnson counter
stages, buffered Q outputs f rom each s tage, and
counter preset control gating. CLOCK, RESET,
DATA, PRESET ENABLE, and 5 individual JAM
inputs are provided. Divide by 10, 8, 6, 4 or 2
counter configuration can be implemented by
feeding the Q5
, Q4, Q3, Q2, Q1 signals,
respectively, back to the data input.
Divide-by-9, 7, 5, or 3 counter configurations c an
be implemented by the use of a HCF4011B gate
DIPSOP
ORDER CODES
PACKAGETUBET & R
DIPHCF4018BEY
SOPHCF4018BM1HCF4018M013TR
package to properly gate the feedback connection
to the DATA input. Divide-by-functions greater
than 10 can be achieved by use of multiple
HCF4018B units. The counter is advanced one
count at the positive clock signalstransition.
Schmitt trigger action on the clock line permits
unlimited clock rise a nd fall tim es. A high RESET
signal clears the counter to an all-zero condition. A
high PRESENT-ENABLE signal allows
information on the JAM inputs to preset the
counter.
Anti-lock gating is provided to assure the proper
counting sequence.
PIN CONNECTION
1/11September 2001
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HCF4018B
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN NoSYMBOLNAME AND FUNCTION
2, 3, 7, 9, 12
1DATAData Input
4, 5, 6, 11,
13
15RESETReset Input
14CLOCKClock Input
10
8
16
FUNCTIONAL DIAGRAM
JAM1 to
JAM5
to Q5Buffered Outputs
Q1
PRESET
ENABLE
V
SS
V
DD
Jam Inputs
Preset Enable Input
Negative Supply Voltage
Positive Supply Voltage
2/11
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LOGIC DIAGRAM
HCF4018B
TIMING CHART
3/11
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HCF4018B
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
V
P
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values ar e referred to V
RECOMMENDED OPERATING CONDITIONS
SymbolParameterValueUnit
V
V
T
Supply Voltage
DD
DC Input Voltage-0.5 to VDD + 0.5
I
I
DC Input Current
I
Power Dissipation per Package200mW
D
-0.5 to +22V
± 10mA
Power Dissipation per Output Transistor100mW
Operating Temperature
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mentioned in this publication ar e subject to change without notice. This publication supersedes and replaces all information
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systems without express written approval of STMicroelectronics.
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