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HCF40101B
9 BIT PARITY GENERATOR CHECKER
■ STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
■ QUIESCENT CURRENT SPECIFIED UP TO
20V
■ 5V, 10V AND 15V PARAMETRIC RATINGS
■ INPUT LEAKAGE CURRENT
I
= 100nA (MAX) AT VDD = 18V TA = 25°C
I
■ 100% TESTED FOR QUIESCENT CURRENT
■ MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTI ON OF B SERI ES CMOS
DEVICES"
DESCRIPTION
HCF40101B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
HCF40101B is a 9-bit (8 data bits plus 1 parity bit)
parity generator/checker. It may be used to detect
errors in data transmission or data retrieval. Odd
and even outputs facilitate odd or even parity
generation and checking. When used as a parity
generator, a parity bit is supp lied along with t he
data to generate an even or odd parity output.
DIP SOP
ORDER CODES
PACKAGE TUBE T & R
DIP HCF40101BEY
SOP HCF40101BM1 HCF40101M013TR
When used as a parity checker, the received data
bits and parity bits are compared for correct parity.
The even or odd output s are used to indicate an
error in the received data. Word-l ength capability
is expandable by cascadi ng. HCF40101B is also
provided with an inhibit control. If the inhibit control
is set at logical "1", the even and odd outputs go to
a logical "0"
PIN CONNECTION
1/9September 2002
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HCF40101B
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
FUNCTIONAL DIAGRAM
1, 2, 3, 4, 10,
11, 12, 13, 5
8 INHIBIT Inhibit Control Input
9 EVEN OUT Even Output
6 ODD OUT Odd Output
7
14
TRUTH TABLE
D1 - D9 INHIBIT EVEN ODD
1’s = Even L H L
∑
1’s = Odd L L H
∑
X : Don"t Care
D1 to D9 Data Inputs
V
SS
V
DD
INPUTS OUTPUTS
XHLL
Negative Supply Voltage
Positive Supply Voltage
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LOGIC DIAGRAM
HCF40101B
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
P
Supply Voltage
DD
DC Input Voltage -0.5 to VDD + 0.5
I
I
DC Input Current
I
Power Dissipation per Package 200 mW
D
-0.5 to +22 V
10 mA
±
V
Power Dissipation per Output Transistor 100 mW
T
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage value s are referred to V
Operating Temperature
op
Storage Temperature
stg
pin voltage.
SS
-55 to +125 °C
-65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
T
Supply Voltage
DD
Input Voltage 0 to V
I
Operating Temperature
op
3 to 20 V
DD
-55 to 125 °C
V
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HCF40101B
DC SPECIFICATIONS
Test Condition Value
T
Symbol Parameter
I
Quiescent Current 0/5 5 0.04 5 150 150
L
V
(V)
V
I
(V)
|I
|
O
O
(µA)
V
DD
(V)
= 25°C
A
Min. Typ. Max. Min. Max. Min. Max.
0/10 10 0.04 10 300 300
0/15 15 0.04 20 600 600
0/20 20 0.08 100 3000 3000
V
High Level Output
OH
Voltage
0/5 <1 5 4.95 4.95 4.95
0/15 <1 15 14.95 14.95 14.95
Low Level Output
V
OL
Voltage
5/0 <1 5 0.05 0.05 0.05
15/0 <1 15 0.05 0.05 0.05
High Level Input
V
IH
Voltage
0.5/4.5 <1 5 3.5 3.5 3.5
1.5/13.5 <1 15 11 11 11
V
IL
Low Level Input
Voltage
4.5/0.5 <1 5 1.5 1.5 1.5
13.5/1.5 <1 15 4 4 4
I
OH
Output Drive
Current
0/5 2.5 <1 5 -1.36 -3.2 -1.15 -1.1
0/5 4.6 <1 5 -0.44 -1 -0.36 -0.36
0/10 9.5 <1 10 -1.1 -2.6 -0.9 -0.9
0/15 13.5 <1 15 -3.0 -6.8 -2.4 -2.4
I
OL
Output Sink
Current
0/5 0.4 <1 5 0.44 1 0.36 0.36
0/15 1.5 <1 15 3.0 6.8 2.4 2.4
Input Leakage
I
I
Current
C
Input Capacitance
I
The Noi se Margin for both "1" and " 0" level is: 1V min. with VDD=5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
0/18 Any Input 18
Any Input 5 7.5 pF
-5
10
±
-40 to 85°C -55 to 125°C
0.1
±
1
±
Unit
A
µ
V0/10 <1 10 9.95 9.95 9.95
V10/0 <1 10 0.05 0.05 0.05
V1/9 <1 10 7 7 7
V9/1 <1 10 3 3 3
mA
mA0/10 0.5 <1 10 1.1 2.6 0.9 0.9
1
±
A
µ
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HCF40101B
DYNAMIC ELECTRICAL CHARACTERISTICS (T
Symbol Parameter
t
PLH tPHL
t
PLH tPHL
t
TLH tTHL
(*) Typical temper at ure coeffic i ent for all VDD value is 0.3 %/°C.
Propagation Delay Time 5 350 700
Propagation Delay Time
(INHIBIT to OUTPUT)
Transition Time 5 100 200
(V)
V
DD
15 100 200
5 140 280
15 50 100
15 40 80
TEST CIRCUIT
= 25°C, CL = 50pF, RL = 200KΩ, tr = tf = 20 ns)
amb
Test Condition Value (*) Unit
Min. Typ. Max.
ns10 150 300
ns10 70 140
ns10 50 100
CL = 50pF or equivalent (in cl udes jig and probe capac i tance)
R
= 200K
Ω
L
R
= Z
of pulse generator (typically 50Ω)
T
OUT
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HCF40101B
WAVEFORM : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)
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HCF40101B
Plastic DIP-14 MECHANICAL DATA
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
a1 0.51 0.020
B 1.39 1.65 0.055 0.065
b 0.5 0.020
b1 0.25 0.010
D 20 0.787
E 8.5 0.335
e 2.54 0.100
e3 15.24 0.600
F 7.1 0.280
I 5.1 0.201
L 3.3 0.130
Z 1.27 2.54 0.050 0.100
P001A
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HCF40101B
SO-14 MECHANICAL DATA
DIM.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45˚ (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.68 0.026
S ˚ (max.)
MIN. TYP MAX. MIN. TYP. MAX.
mm. inch
8
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PO13G
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HCF40101B
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility f or the
consequences of use of such informatio n nor for any infringement of paten ts or o ther rig hts of t hird part ies which ma y result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previousl y suppl ied. STM icroel ectronics produc ts are not auth orized for use as c ritica l compone nts in l ife s upport dev ices or
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