Datasheet HCA10009 Datasheet (Intersil Corporation)

HCA10009
Data Sheet August 1999
100MHz, Single and Dual Low Noise, Precision Operational Amplifier
Hz at 1kHz), total harmonic distortion (<0.005%), and DC errors are kept to a minimum.
The precision performance is shown by low offset voltage (0.3mV), low bias currents (40nA), low offset currents (15nA), and high open loop gain (128dB). The combination of these excellent DC characteristics with the fast settling time (0.4µs) make the HCA10009 ideally suited for precision signal conditioning.
The unique design of the HCA10009 gives it outstanding AC characteristics not normally associated with precision op amps, high unity gain bandwidth (35MHz) and high slew rate (25V/µs). Other key specifications include high CMRR (95dB) and high PSRR (100dB). The combination of these specifications willallowtheHCA10009 to be used in RF signal conditioning as well as video amplifiers.
Pinout
HCA10009
(SOIC)
TOP VIEW
-BAL
-IN +IN
V-
1 2
+
3 4
8 7 6 5
+BAL V+ OUT NC
File Number
4771
Features
• Gain Bandwidth Product. . . . . . . . . . . . . . . . . . . . 100MHz
• Unity Gain Bandwidth. . . . . . . . . . . . . . . . . . . . . . . 25MHz
• Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V/µs
• Low Offset Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 0.3mV
• High Open Loop Gain. . . . . . . . . . . . . . . . . . . . . . . 128dB
• Channel Separation at 10kHz . . . . . . . . . . . . . . . . 110dB
• Low Noise Voltage at 1kHz. . . . . . . . . . . . . . . . 3.4nV/
Hz
• High Output Current. . . . . . . . . . . . . . . . . . . . . . . . . 56mA
• Low Supply Current per Amplifier. . . . . . . . . . . . . . . . 8mA
Applications
• Precision Test Systems
• Active Filtering
• Small Signal Video
• Accurate Signal Processing
• RF Signal Conditioning
Ordering Information
PART NUMBER
(BRAND)
HCA10009 0 to 75 8 Ld SOIC M8.15
TEMP.
RANGE (oC) PACKAGE
PKG.
NO.
4-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
HCA10009
Absolute Maximum Ratings Thermal Information
Supply Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . 35V
Differential Input Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . 5V
Output Current Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HCA10009 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Input is protected by back-to-back zener diodes. See applications section.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Thermal Resistance (Typical, Note 2) θJA (oC/W)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 157
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Electrical Specifications V
PARAMETER TEST CONDITIONS TEMP. (oC)
INPUT CHARACTERISTICS
Input Offset Voltage 25 - 0.30 0.75 mV
Average Offset Voltage Drift Full - 0.5 - µV/oC Input Bias Current 25 - 40 100 nA
Input Offset Current 25 - 15 100 nA
Input Offset Voltage Match 25 - 400 750 µV
Common Mode Range 25 ±12 - - V Differential Input Resistance 25 - 70 - k Input Noise Voltage f = 0.1Hz to 10Hz 25 - 0.25 - µV Input Noise Voltage f = 10Hz 25 - 6.2 10 nV/Hz Density (Notes 3, 12) f = 100Hz 25 - 3.6 6 nV/Hz
Input Noise Current f = 10Hz 25 - 4.7 8.0 pA/Hz Density (Notes 3, 12) f = 100Hz 25 - 1.8 2.8 pA/Hz
THD+N Note 4 25 - <0.005 - %
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain Note 5 25 106 128 - dB
CMRR VCM = ±10V Full 86 95 - dB Unity Gain Bandwidth -3dB 25 - 35 - MHz Gain Bandwidth Product 1kHz to 400kHz 25 - 100 - MHz Minimum Stable Gain Full 1 - - V/V
= ±15V, Unless Otherwise Specified
SUPPLY
HCA10009
Full - 0.35 1.5 mV
Full - 70 200 nA
Full - 30 150 nA
Full - - 1500 µV
f = 1000Hz 25 - 3.4 4.0 nV/Hz
f = 1000Hz 25 - 0.97 1.8 pA/Hz
Full 100 120 - dB
UNITSMIN TYP MAX
P-P
4-2
HCA10009
Electrical Specifications V
= ±15V, Unless Otherwise Specified (Continued)
SUPPLY
HCA10009
PARAMETER TEST CONDITIONS TEMP. (oC)
UNITSMIN TYP MAX
OUTPUT CHARACTERISTICS
Output Voltage Swing RL = 333 Full ±10 - - V
RL = 1k 25 ±12 ±12.5 - V RL = 1k Full ±11.5 ±12.1 - V
Output Current V
= ±10V Full ±30 ±56 - mA
OUT
Output Resistance 25 - 10 - Full Power Bandwidth Note 6 25 239 398 - kHz TRANSIENT RESPONSE (Note 10) Slew Rate Notes 7, 11 Full 15 25 - V/µs Rise Time Notes 8, 11 Full - 13 20 ns Overshoot Notes 8, 11 Full - 28 50 % Settling Time (Note 9) 0.1% 25 - 0.4 - µs
0.01% 25 - 1.5 - µs
POWER SUPPLY
PSRR VS = ±10V to ±20V Full 86 100 - dB Supply Current Full - 8 11 mA/Op Amp
NOTES:
3. Refer to typical performance curve in data sheet.
4. A
= 10, fO = 1kHz, VO = 5V
VCL
5. V
= 0 to ±10V, RL = 1k, CL = 50pF.
OUT
6. Full Power Bandwidth is calculated by: FPBW = .
7. V
8. V
= ±2.5V, RL = 1k, CL = 50pF.
OUT
= ±100mV, RL = 1k, CL = 50pF.
OUT
, RL = 600, 10Hz to 100kHz, Minimum resolution of test equipment is 0.005%.
RMS
Slew Rate
-------------------------- -
2πV
PEAK
V
PEAK
10V=,
9. Settling time is specified for a 10V step and AV = -1.
10. See Test Circuits.
11. Guaranteed by characterization.
4-3
Test Circuits and Waveforms
HCA10009
2.5V
0V
-2.5V
2.5V
0V
-2.5V
FIGURE 1. TRANSIENT RESPONSE TEST CIRCUIT
V
= 2.5V
OUT
Vertical Scale = 2V/Div.,
Horizontal Scale = 200ns/Div.
V
IN
+
-
1k
100mV
V
IN
-100mV
100mV
V
OUT
-100mV
50pF
0V
0V
V
OUT
V
OUT
= ±100mV
Vertical Scale = 100mV/Div.,
Horizontal Scale = 200ns/Div.
FIGURE 2. LARGE SIGNAL RESPONSE FIGURE 3. SMALL SIGNAL RESPONSE
5K
V
IN
2K
NOTES:
12. AV= -1.
13. Feedback and summing resistors must be matched (0.1%).
14. HP5082-2810 clipping diodes recommended.
15. Tektronix P6201 FET probe used at settling point.
FIGURE 4. SETTLING TIME TEST CIRCUIT
5K
2K
V
SETTLE
V
+
OUT
4-4
Application Information
HCA10009
Operation at Various Supply Voltages
The HCA10009 operates over a wide range of supply voltages with little variation in performance. The supplies may be varied from ±5V to ±15V. See Typical Performance Curves for variations in supply current, slew rate and output voltage swing.
Offset Adjustment
The following diagram shows the offset voltage adjustment configuration for the HCA10009. By moving the potentiometer wiper towards pin 8 (+BAL), the op amps output voltage will increase; towards pin 1 (-BAL) decreases the output voltage. A 20k trim pot will allow an offset voltage adjustment of about 10mV.
+15V
7
R
+
1
4
-15V
P
8
6
2
3
Capacitive Loading Considerations
When driving capacitive loads >80pF, a small resistor, 50 to 100Ω, should be connected in series with the output and inside the feedback loop.
Saturation Recovery
When an op amp is over driven, output devices can saturate and sometimes take a long time to recover.By clamping the input, output saturation can be avoided. If output saturation can not be avoided, the maximum recovery time when overdriven into the positive rail is 10.6µs. When driven into the negative rail the maximum recovery time is 3.8µs.
Input Protection
The HCA10009 has built in back-to-back protection diodes which limit the maximum allowable differential input voltage to approximately 5V. If the HCA10009 will be used in circuits where the maximum differential voltage may be exceeded, then current limiting resistors must be used. The input current should be limited to a maximum of 10mA.
R
LIMIT
2
V
IN
R
LIMIT
3
6
+
V
OUT
PC Board Layout Guidelines
When designing with the HCA10009, good high frequency (RF) techniques should be used when building a PC board. Use of ground plane is recommended. Power supply decoupling is very important. A 0.01µF to 0.1µF high quality ceramic capacitor at each power supply pin with a 2.2µF to 10µF tantalum close by will provide excellent decoupling. Chip capacitors produce the best results due to ease of placement next to the op amp and basically no lead inductance. If leaded capacitors are used, the leads should be kept as short as possible to minimize lead inductance.
Typical Performance Curves
RL = 1K, CL = 50pF
120 100
80 60 40
GAIN (dB)
20
0
1K 10K 100K 1M 100M
GAIN
PHASE
FREQUENCY (Hz)
VS = ±15V, TA = 25oC
180 135 90 45 0
PHASE MARGIN (DEGREES)
10M
12
9
A
= +1, RL = 1K, CL = 50pF
V
6 3 0
GAIN (dB)
-3
-6
10K 100K 1M 100M
GAIN
PHASE
10M
FREQUENCY (Hz)
FIGURE 5. OPEN LOOP GAIN AND PHASE vs FREQUENCY FIGURE 6. CLOSED LOOP GAIN vs FREQUENCY
4-5
180 135
90 45
PHASE MARGIN (DEGREES)
0
HCA10009
Typical Performance Curves
9
AV = -1, RL = 1K, CL = 50pF
6 3
GAIN (dB)
0
10K 100K 1M 100M
GAIN
PHASE
FREQUENCY (Hz)
VS = ±15V, TA = 25oC (Continued)
180 135 90 45 0
PHASE MARGIN (DEGREES)
10M
80
AV = -1000
60
AV = -100
40
AV = -10
20
0
CLOSED LOOP GAIN (dB)
10K 100K 1M 100M
AV = -10
AV = -100
AV = -1000
FREQUENCY (Hz)
RL = 1K, CL = 50pF
10M
FIGURE 7. CLOSED LOOP GAIN vs FREQUENCY FIGURE 8. VARIOUS CLOSED LOOP GAINS vs FREQUENCY
AV = +1, RL = 1K
120 100
80 60
40
CMRR (dB)
20
0
AV = +1, RL = 1K
100
80 60 40
PSRR (dB)
20
0
-PSRR
180 135 90
45 0
PHASE MARGIN (DEGREES)
+PSRR
10K 100K 1M 100M10M
FREQUENCY (Hz)
10K 100K 1M 100M10M
FREQUENCY (Hz)
FIGURE 9. CMRR vs FREQUENCY FIGURE 10. PSRR vs FREQUENCY
20
R
= 1K
L
18 16 14 12 10
8 6
OPEN LOOP GAIN (V/µV)
4 2 0
-60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC)
300
250
200
150
100
50
0
OFFSET VOLTAGE (µV)
-50
-100
-60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC)
FIGURE 11. OPEN LOOP GAIN vs TEMPERATURE FIGURE 12. OFFSET VOLTAGE vs TEMPERATURE
(4 REPRESENTATIVE UNITS)
4-6
HCA10009
Typical Performance Curves
160 140 120 100
80 60
40
BIAS CURRENT (nA)
20
0
-20
-40
-60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC)
VS = ±15V, TA = 25oC (Continued)
FIGURE 13. BIAS CURRENT vs TEMPERATURE
(4 REPRESENTATIVE UNITS)
1.1
C)
A
= +1, RL = 1K, CL = 50pF
o
V
1.05
14
RL = 600
13.5
13
12.5
12
11.5
11
PEAK OUTPUT VOLTAGE (V)
10.5
10
-60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC)
FIGURE 14. OUTPUT VOLTAGE SWING vs TEMPERATURE
70
60
1
0.95
0.9
0.85
SLEW RATE (NORMALIZED TO 1 AT 25
0.8
-60 -40 -20 0 20 40 60 80 100
TEMPERATURE (oC)
120
50
40
30
20
10
OFFSET VOLTAGE CHANGE (µV)
0
012345
TIME AFTER POWER UP (MINUTES)
FIGURE 15. SLEW RATE vs TEMPERATURE FIGURE 16. OFFSET VOLTAGE WARM-UP DRIFT
36
AV = +1, RL = 2K, CL = 50pF
8.5
8.25
8
7.75
SUPPLY CURRENT PER AMPLIFIER (mA)
7.5 57911131517
SUPPLY VOLTAGE (±V)
34 32 30 28 26 24 22 20 18
SLEW RATE (V/µs)
16 14 12
10
5 7 9 11131517
+SLEW RATE
-SLEW RATE
SUPPLY VOLTAGE (±V)
FIGURE 17. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 18. SLEW RATE vs SUPPLY VOLTAGE
4-7
HCA10009
Typical Performance Curves
20
RL = 600
15
10
5
PEAK OUTPUT VOLTAGE SWING (V)
0
57911131517
SUPPLY VOLTAGE (±V)
VS = ±15V, TA = 25oC (Continued)
VOLTAGE NOISE (nV/Hz)
16 14 12 10
8 6 4 2 0
1 10 100 1K 10K
FREQUENCY (Hz)
VOLTAGE NOISE
CURRENT NOISE
FIGURE 19. OUTPUT VOLTAGE SWING vs SUPPLY VOLTAGE FIGURE 20. NOISE CHARACTERISTICS
115
100
90 80 70 60 50 40 30 20 10
0
-10
-20
-30
-40
-50
OFFSET CURRENT (nA)
-60
-70
-80
-90
-100
-60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC)
FIGURE 21. OFFSET CURRENT vs TEMPERATURE
114 113 112 111 110 109 108 107 106 105 104 103 102 101
CMRR AND PSRR (dB)
100
99 98 97 96 95
-60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC)
+PSRR
-PSRR
CMRR
FIGURE 22. CMRR AND PSRR vs TEMPERATURE
(4 REPRESENTATIVE UNITS)
24 21 18 15
12 9 6 3
CURRENT NOISE (pA/Hz)
0
45
40
35
30
25
BANDWIDTH (MHz)
20
15
1 10 100 1000
PHASE MARGIN
LOAD CAPACITANCE (pF)
AV = +1, RL = 1K
BANDWIDTH
FIGURE 23. BANDWIDTH AND PHASE MARGIN vs LOAD
CAPACITANCE
4-8
120
100
80
60
40
PHASE MARGIN (DEGREE)
20
0
130
110
90
70
OUTPUT CURRENT (mA)
50
012345
TIME AFTER SHORT CIRCUIT (MINUTES)
FIGURE 24. SHORT CIRCUIT OUTPUT CURRENT vs TIME
HCA10009
Typical Performance Curves
VS = ±15V, TA = 25oC (Continued)
Vertical Scale = 1mV/Div.; Horizontal Scale = 1s/Div.
AV = +25,000; EN = 0.168µV
P-P
FIGURE 25. 0.1Hz TO 10Hz NOISE FIGURE 26. 0.1Hz TO 1MHz
18 16
VS = ±18
14
VS = ±15
12 10
8
VS = ±10
6 4
PEAK OUTPUT VOLTAGE (V)
2
VS = ±5
0
10K 100K 1M 10M
AV = +1, RL = 1K, CL = 15pF, THD 0.01%
FREQUENCY (Hz)
RTI
Vertical Scale = 10mV/Div.; Horizontal Scale = 1s/Div.
AV = +25,000; EN = 1.5µV
18
AV = +1, THD 0.01%, f = 1kHz
16 14
12 10
8 6
4
PEAK OUTPUT VOLTAGE (V)
2 0
10 100 1K 10K
LOAD RESISTANCE ()
P-P
RTI
VS = ±18
VS = ±15
VS = ±10
VS = ±5
FIGURE 27. OUTPUT VOLTAGE SWING vs FREQUENCY FIGURE 28. OUTPUT VOLTAGE SWING vs LOAD RESISTANCE
10
9.5
9
8.5
8
7.5
7
6.5
SUPPLY CURRENT PER AMPLIFIER (mA)
6
-60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC)
FIGURE 29. SUPPLY CURRENT/AMPLIFIER vs TEMPERATURE
4-9
Small Outline Plastic Packages (SOIC)
HCA10009
N
INDEX AREA
123
-A-
E
-B-
SEATING PLANE
D
A
-C-
0.25(0.010) BM M
H
L
h x 45
o
α
e
B
0.25(0.010) C AM BS
M
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter­lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
A1
C
0.10(0.004)
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES MILLIMETERS
SYMBOL
A 0.0532 0.0688 1.35 1.75 -
A1 0.0040 0.0098 0.10 0.25 -
B 0.013 0.020 0.33 0.51 9 C 0.0075 0.0098 0.19 0.25 ­D 0.1890 0.1968 4.80 5.00 3 E 0.1497 0.1574 3.80 4.00 4 e 0.050 BSC 1.27 BSC ­H 0.2284 0.2440 5.80 6.20 ­h 0.0099 0.0196 0.25 0.50 5 L 0.016 0.050 0.40 1.27 6 N8 87
o
α
0
o
8
o
0
o
8
Rev. 0 12/93
NOTESMIN MAX MIN MAX
-
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly ,the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240
4-10
EUROPE
Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
Loading...