Datasheet HCA10008 Datasheet (Intersil Corporation)

HCA10008

Data Sheet August 1999

80V/2.5A Peak, High Frequency Full
Bridge FET Driver

The HCA10008 is a high frequency, medium voltage Full
Bridge N-Channel FET driver IC, available in 20 lead plastic
SOIC package. The HCA10008 can drive every possible
switch combination except those which would cause a shoot
through condition. The HCA10008 can switch at frequencies
up to 1MHz and is well suited to driving Voice Coil Motors,
high-frequency Class D audio amplifiers, and power
supplies.

For example, the HCA10008 can drive medium voltage
brush motors, and two HCA10008s can be used to drive
high performance stepper motors, since the short minimum
“on-time” can provide fine micro-stepping capability.

Short propagation delays of approximately 55ns maximizes
control loop crossover frequencies and dead-times which
can be adjusted to near zero to minimize distortion, resulting
in rapid, precise control of the driven load.

Ordering Information

PART

NUMBER

HCA10008 -40 to 85 20 Ld SOIC (W) M20.3

TEMP RANGE

(oC) PACKAGE PKG. NO.

File Number

4772

Features

• Independently Drives 4 N-Channel FET in Half Bridge or
Full Bridge Configurations

• Bootstrap Supply Max Voltage to 95V

DC

• Drives 1000pF Load at 1MHz in Free Air at 50oC with Rise
and Fall Times of Typically 10ns

• User Programmable Dead Time

• On-Chip Charge Pump and Bootstrap Upper Bias
Supplies

• DIS (Disable) Overrides Input Control

• Input Logic Thresholds Compatible with 5V to 15V Logic
Levels

• Very Low Power Consumption

• Undervoltage Protection

Applications

• Medium/Large Voice Coil Motors

• Full Bridge Power Supplies

• Class D Audio Power Amplifiers

• High Performance Motor Controls

Pinout

BHB

BHI
DIS
V

BLI
ALI

AHI

HDEL

LDEL

AHB

SS

1
2
3
4
5
6
7
8
9

10

HCA10008

(SOIC)

TOP VIEW

• Noise Cancellation Systems

• Battery Powered Vehicles

• Peripherals

• U.P.S.

BHO

20

BHS

19

BLO

18

BLS

17

V

16

DD

V

15

CC

ALS

14

ALO

13

AHS

12

AHO

11

• Related Literature

- AN9405 Application Note for the HIP4081A and the

HCA10008

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

Application Block Diagram

BHI
BLI

HCA10008

12V

BHO
BHS
BLO

HCA10008

80V

LOAD

ALI
AHI

Functional Block Diagram

V

AHI

DIS

ALI

DD

UNDER-

VOLTAGE

16

7

3

6

CHARGE

PUMP

ALO
AHS
AHO

GND

(1/2 HCA10008)

LEVEL SHIFT

AND LATCH

TURN-ON

DELAY

TURN-ON

DELAY

DRIVER

DRIVER

GND

10

11

12

15

13

14

AHB

AHO

AHS

V

CC

ALO

ALS

HIGH VOLTAGE BUS ≤ 80V

C

BS

D

BS

TO VDD (PIN 16)

C

BF

DC

+12V

DC

BIAS

SUPPLY

HDEL

LDEL

V

SS

8

9

4

TRUTH TABLE

INPUT OUTPUT

ALI, BLI AHI, BHI U/V DIS ALO, BLO AHO, BHO

XXX100
1X0010
010001
000000
XX1X00

NOTE: X signifies that input can be either a “1” or “0”.

2

HCA10008

Typical Application

12V

DIS

PWM

INPUT

TO OPTIONAL

CURRENT CONTROLLER

(PWM Mode Switching)

1

BHB

BHO

BHI

2
3
4
5
6
7
8
9

10

GND

DIS
V

SS

BLI
ALI
AHI
HDEL
LDEL
AHB

BHS
BLO

BLS

V

DD

V

CC

HCA10008

ALS
ALO
AHS

AHO

80V

20
19
18
17
16
15
14
13
12
11

12V

LOAD

-

+

6V

GND

3

HCA10008

Pin Descriptions

PIN

NUMBER SYMBOL DESCRIPTION

1 BHB B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap

diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30µA out of this pin to
maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.

2 BHI B High-side Input. Logic level input that controls BHO driver (Pin 20). BLI (Pin 5) high level input overrides BHI high

level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides BHI high level
input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100µA pull-up to VDDwill
hold BHI high, so no connection is required if high-side and low-side outputs are to be controlled by the low-side input.

3 DIS DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs.

When DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to

15V (no greater than VDD). An internal 100µA pull-up to VDD will hold DIS high if this pin is not driven.
4VSSChip negative supply, generally will be ground.
5 BLI B Low-side Input. Logic level input that controls BLO driver (Pin 18). If BHI (Pin 2) is driven high or not connected

externally then BLI controls both BLO and BHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin

8 and 9). DIS (Pin 3) high level input overrides BLI high level input. The pin can be driven by signal levels of 0V to 15V

(no greater than VDD). An internal 100µA pull-up to VDD will hold BLI high if this pin is not driven.
6 ALI A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected

externally then ALI controls both ALO and AHO drivers, with dead time set by delay currents at HDEL and LDEL (Pin

8 and 9). DIS (Pin 3) high level input overrides ALI high level input. The pin can be driven by signal levels of 0V to 15V

(no greater than VDD). An internal 100µA pull-up to VDD will hold ALI high if this pin is not driven.
7 AHI A High-side Input. Logic level input that controls AHO driver (Pin 11). ALI (Pin 6) high level input overrides AHI high

level input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 3) high level input overrides AHI high level

input. The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100µA pull-up to VDDwill

hold AHI high, so no connection is required if high-side and low-side outputs are to be controlled by the low-side input.
8 HDEL High-side turn-on DELay. Connect resistor from this pin to VSSto set timing current that defines the turn-on delay of

both high-side drivers. The low-side drivers turn-off with no adjustable delay, so the HDEL resistor guarantees no

shoot-through by delaying the turn-on of the high-side drivers. HDEL reference voltage is approximately 5.1V.
9 LDEL Low-side turn-on DELay. Connect resistor from this pin to VSSto set timing current that defines the turn-on delay of

both low-side drivers. The high-side drivers turn-off with no adjustable delay, so the LDEL resistor guarantees no

shoot-through by delaying the turn-on of the low-side drivers. LDEL reference voltage is approximately 5.1V.

10 AHB A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap

diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30µA out of this pin to

maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.

11 AHO A High-side Output. Connect to gate of A High-side power MOSFET.
12 AHS A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of

bootstrap capacitor to this pin.

13 ALO A Low-side Output. Connect to gate of A Low-side power MOSFET.
14 ALS A Low-side Source connection. Connect to source of A Low-side power MOSFET.
15 V
16 V
17 BLS B Low-side Source connection. Connect to source of B Low-side power MOSFET.
18 BLO B Low-side Output. Connect to gate of B Low-side power MOSFET.
19 BHS B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of

20 BHO B High-side Output. Connect to gate of B High-side power MOSFET.

CC
DD

Positive supply to gate drivers. Must be same potential as VDD(Pin 16). Connect to anodes of two bootstrap diodes.

Positive supply to lower gate drivers. Must be same potential as VCC (Pin 15). Decouple this pin to VSS (Pin 4).

bootstrap capacitor to this pin.

4

HCA10008

Absolute Maximum Ratings Thermal Information

Supply Voltage, VDD and VCC. . . . . . . . . . . . . . . . . . . .-0.3V to 16V

Logic I/O Voltages . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V

Voltage on AHS, BHS . . . -6.0V (Transient) to 80V (25oC to 125oC)
Voltage on AHS, BHS . . .-6.0V (Transient) to 70V (-55oC to 125oC)

Voltage on ALS, BLS . . . . . . . -2.0V (Transient) to +2.0V (Transient)

Voltage on AHB, BHB . . . . . . V

AHS, BHS

Voltage on ALO, BLO. . . . . . . . . . . . .V

Voltage on AHO, BHO . . . . . .V

AHS, BHS

-0.3V to V

ALS, BLS

-0.3V to V

AHS, BHS

+V

DD

-0.3V to VCC +0.3V

AHB, BHB

+0.3V

Input Current, HDEL and LDEL . . . . . . . . . . . . . . . . . . -5mA to 0mA

Phase Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/ns

NOTE: All Voltages relative to VSS, unless otherwise specified.

Operating Conditions

Supply Voltage, VDD and VCC. . . . . . . . . . . . . . . . . . +9.5V to +15V

Voltage on ALS, BLS . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +1.0V

Voltage on AHB, BHB . . . . . . . .V

AHS, BHS

Input Current, HDEL and LDEL . . . . . . . . . . . . . . . .-500µA to -50µA

Ambient Temperature Range. . . . . . . . . . . . . . . . . . . -40oC to 85oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. θJA is measured with the component mounted on an evaluation PC board in free air.

+5V to V

AHS, BHS

+15V

Thermal Resistance (Typical, Note 1) θJA (oC/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Maximum Storage Temperature Range. . . . . . . . . . -65oC to 150oC

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .125oC

Maximum Lead Temperature (Soldering 10s)). . . . . . . . . . . . .300oC

(SOIC - Lead Tips Only)

Electrical Specifications V

= VCC = V

DD

AHB

= V

BHB

= 12V, VSS = V

ALS

= V

BLS

= V

AHS

= V

BHS

= 0V, R

HDEL

= R

= 100K and

LDEL

TA = 25oC, Unless Otherwise Specified

TJS=-40oCTO

TJ = 25oC

PARAMETER SYMBOL TEST CONDITIONS

125oC

UNITSMIN TYP MAX MIN MAX

SUPPLY CURRENTS AND CHARGE PUMPS

VDD Quiescent Current I
VDD Operating Current I
VCC Quiescent Current I
VCC Operating Current I
AHB, BHB Quiescent Current

I

AHB

Qpump Output Current
AHB, BHB Operating Current I

AHBO

AHS, BHS, AHB, BHB Leakage
Current

AHB-AHS, BHB-BHS Qpump
Output Voltage

V

AHB-VAHS

V

BHB-VBHS

DD

DDO

CC

CCO

, I

, I

I

HLK

All inputs = 0V 8.5 10.5 14.5 7.5 14.5 mA
Outputs switching f = 500kHz 9.5 12.5 15.5 8.5 15.5 mA
All Inputs = 0V, I

ALO

= I

= 0 - 0.1 10 - 20 µA

BLO

f = 500kHz, No Load 1 1.25 2.0 0.8 3 mA
All Inputs = 0V, I

BHB

VDD = VCC = V
f = 500kHz, No Load 0.6 1.2 1.5 0.5 1.9 mA

BHBO

V

= V

BHS
AHB

AHS

= V

BHB

= I

= 0, No Load 11.5 12.6 14.0 10.5 14.5 V

AHB

V
I

AHB

AHO

AHB

= 80V,
= 93V

= I

= V

BHO

BHB

= 0

= 10V

-50 -30 -11 -60 -10 µA

- 0.02 1.0 - 10 µA

INPUT PINS: ALI, BLI, AHI, BHI, AND DIS

Low Level Input Voltage V
High Level Input Voltage V

IL
IH

Full Operating Conditions - - 1.0 - 0.8 V

Full Operating Conditions 2.5 - - 2.7 - V
Input Voltage Hysteresis - 35 - - - mV
Low Level Input Current I
High Level Input Current I

IL
IH

VIN = 0V, Full Operating Conditions -130 -100 -75 -135 -65 µA

VIN = 5V, Full Operating Conditions -1 - +1 -10 +10 µA

TURN-ON DELAY PINS: LDEL AND HDEL

LDEL, HDEL Voltage V

HDEL

V

LDEL

,

I

= I

HDEL

= -100µA 4.9 5.1 5.3 4.8 5.4 V

LDEL

5

HCA10008

Electrical Specifications V

= VCC = V

DD

AHB

= V

BHB

= 12V, VSS = V

ALS

= V

BLS

= V

AHS

= V

BHS

= 0V, R

HDEL

= R

= 100K and

LDEL

TA = 25oC, Unless Otherwise Specified (Continued)

TJS=-40oCTO

TJ = 25oC

PARAMETER SYMBOL TEST CONDITIONS

125oC

UNITSMIN TYP MAX MIN MAX

GATE DRIVER OUTPUT PINS: ALO, BLO, AHO, AND BHO

Low Level Output Voltage V

OL

High Level Output Voltage VCC-V
Peak Pullup Current IO+V
Peak Pulldown Current IO-V

I

OUT

OHIOUT

OUT
OUT

= 100mA 0.7 0.85 1.0 0.5 1.1 V
= -100mA 0.8 0.95 1.1 0.5 1.2 V

= 0V 1.7 2.6 3.8 1.4 4.1 A

= 12V 1.7 2.4 3.3 1.3 3.6 A
Undervoltage, Rising Threshold UV+ 8.1 8.8 9.4 8.0 9.5 V
Undervoltage, Falling Threshold UV- 7.6 8.3 8.9 7.5 9.0 V
Undervoltage, Hysteresis HYS 0.25 0.4 0.65 0.2 0.7 V

Switching Specifications V

= VCC = V

DD

AHB

= V

BHB

= 12V, VSS = V

ALS

= V

BLS

= V

AHS

= V

BHS

= 0V, R

HDEL

= R

LDEL

= 10K,

CL = 1000pF

TJS = -40oC

TJ = 25oC

TO 125oC

PARAMETER SYMBOL TEST CONDITIONS

Lower Turn-Off Propagation Delay

T

LPHL

-3060-80ns

(ALI-ALO, BLI-BLO)
Upper Turn-Off Propagation Delay

T

HPHL

-3570-90ns

(AHI-AHO, BHI-BHO)
Lower Turn-On Propagation Delay

T

LPLH

R

HDEL

= R

= 10K - 45 70 - 90 ns

LDEL

(ALI-ALO, BLI-BLO)
Upper Turn-On Propagation Delay

T

HPLH

R

HDEL

= R

= 10K - 60 90 - 110 ns

LDEL

(AHI-AHO, BHI-BHO)
Rise Time T
Fall Time T
Turn-On Input Pulse Width T
Turn-Off Input Pulse Width T
Turn-On Output Pulse Width T
Turn-Off Output Pulse Width T
Disable Turn-Off Propagation Delay

PWIN-ONRHDEL

PWIN-OFFRHDEL

PWOUT-ONRHDEL

PWOUT-OFFRHDEL

T

DISLOW

R

F

= R
= R
= R
= R

= 10K 50 - - 50 - ns

LDEL

= 10K 40 - - 40 - ns

LDEL

= 10K 40 - - 40 - ns

LDEL

= 10K 30 - - 30 - ns

LDEL

-1025-35ns

-1025-35ns

-4575-95ns

(DIS - Lower Outputs)
Disable Turn-Off Propagation Delay

T

DISHIGH

- 55 85 - 105 ns

(DIS - Upper Outputs)
Disable to Lower Turn-On Propagation Delay

T

DLPLH

-4070-90ns

(DIS - ALO and BLO)
Refresh Pulse Width (ALO and BLO) T
Disable to Upper Enable (DIS - AHO and BHO) T

REF-PW

UEN

240 410 550 200 600 ns

- 450 620 - 690 ns

UNITSMIN TYP MAX MIN MAX

6

Timing Diagrams

X = A OR B, A AND B HALVES OF BRIDGE CONTROLLER ARE INDEPENDENT

T

LPHL

U/V = DIS = 0

XLI

XHI

XLO

XHO

T

HPHL

HCA10008

U/V = DIS = 0

XLI

XHI = HI OR NOT CONNECTED

XLO

XHO

T

U/V OR DIS

DLPLH

T

HPLH

T

REF-PW

T

LPLH

FIGURE 1. INDEPENDENT MODE

FIGURE 2. BISTATE MODE

T

DIS

T

R

(10% - 90%)

T

F

(10% - 90%)

XLI

XHI

XLO

XHO

T

UEN

FIGURE 3. DISABLE FUNCTION

7

HCA10008

Typical Performance Curves

14.0

12.0

10.0

8.0

6.0

SUPPLY CURRENT (mA)

DD

I

4.0

2.0
6 8 10 12 14

FIGURE 4. QUIESCENT I

SUPPLY VOLTAGE

30.0

25.0

20.0

15.0

10.0

5.0

VDD SUPPLY VOLTAGE (V)

SUPPLY CURRENT vs V

DD

VDD = VCC = V

AHB

= V

BHB

= 12V, VSS = V

ALS

100K and TA = 25oC, Unless Otherwise Specified

11.0

10.5

10.0

9.5

9.0

SUPPLY CURRENT (mA)

DD

I

8.5

8.0
0 100 200 300 400 500 600 700 800 900 1000

DD

FIGURE 5. I

FREQUENCY (kHz)

5.0

4.0

3.0

2.0

SUPPLY CURRENT (mA)

1.0

CC

I

= V

= V

= V

125

75oC
25oC

-40

o

0oC

o

BHS

C

C

= 0V, R

HDEL

BLS

AHS

SWITCHING FREQUENCY (kHz)

, NO-LOAD IDDSUPPLY CURRENT vs

DDO

= R

LDEL

=

FLOATING SUPPLY BIAS CURRENT (mA)

0.0
0 100 200 300 400 500 600 700 800 900 1000

SWITCHING FREQUENCY (kHz)

FIGURE 6. SIDE A, B FLOATING SUPPLY BIAS CURRENT vs

FREQUENCY (LOAD = 1000pF)

2.5

2

1.5

1

0.5

FLOATING SUPPLY BIAS CURRENT (mA)

0 400

FIGURE 8. I

200 600 800 1000

SWITCHING FREQUENCY (kHz)

AHB,IBHB

, NO-LOAD FLOATING SUPPLY BIAS

CURRENT vs FREQUENCY

0.0
0 100 200 300 400 500 600 700 800 900 1000

SWITCHING FREQUENCY (kHz)

FIGURE 7. I

, NO-LOAD ICCSUPPLY CURRENT vs

CCO

FREQUENCY (kHz) TEMPERATURE

-90

-100

-110

LOW LEVEL INPUT CURRENT (µA)

-120

-50 -25 0 25 50 75 100 125
JUNCTION TEMPERATURE (oC)

FIGURE 9. ALI, BLI, AHI, BHI LOW LEVEL INPUT CURRENT

IILvs TEMPERATURE

8

HCA10008

Typical Performance Curves

VDD = VCC = V

10K and TA = 25oC, Unless Otherwise Specified

15.0

14.0

13.0

12.0

VOLTAGE (V)

11.0

NO-LOAD FLOATING CHARGE PUMP

10.0

-40 -20 0 20 40 60 80 100 120
JUNCTION TEMPERATURE (oC)

FIGURE 10. AHB- AHS, BHB - BHS NO-LOADCHARGE PUMP

VOLTAGE vs TEMPERATURE

525

500

AHB

= V

BHB

= 12V, VSS = V

80

70

60

50

PROPAGATION DELAY (ns)

40

30

-40 -20 0 20 40 60 80 100 120

ALS

= V

= V

AHS

= V

BHS

BLS

JUNCTION TEMPERATURE (oC)

= 0V, R

HDEL

FIGURE 11. UPPER DISABLE TURN-OFF PROPAGATION

DELAY T

80

70

DISHIGH

vs TEMPERATURE

= R

LDEL

=

475

450

PROPAGATION DELAY (ns)

425

-50 -25 0 25 50 75 100 125 150
JUNCTION TEMPERATURE (oC)

FIGURE 12. DISABLE TO UPPER ENABLE, T

UEN

PROPAGATION DELAY vs TEMPERATURE

450

425

400

375

REFRESH PULSE WIDTH (ns)

350

-50 -25 0 25 50 75 100 125 150
JUNCTION TEMPERATURE (oC)

60

50

PROPAGATION DELAY (ns)

40

30

-40 -20 0 20 40 60 80 100 120
JUNCTION TEMPERATURE (oC)

,

FIGURE 13. LOWERDISABLE TURN-OFF PROPAGATION

DELAY T

80

70

60

50

40

PROPAGATION DELAY (ns)

30

20

-40 -20 0 20 40 60 80 100 120

DISLOW

JUNCTION TEMPERATURE (oC)

vs TEMPERATURE

FIGURE 14. T

REF-PW

REFRESH PULSE WIDTH vs

TEMPERATURE

FIGURE 15. DISABLE TO LOWER ENABLE T

DLPLH

PROPAGATION DELAY vs TEMPERATURE

9

HCA10008

Typical Performance Curves

VDD = VCC = V

10K and TA = 25oC, Unless Otherwise Specified (Continued)

80

70

60

50

40

PROPAGATION DELAY (ns)

30

20

-40 -20 0 20 40 60 80 100 120
JUNCTION TEMPERATURE (oC)

FIGURE 16. UPPER TURN-OFF PROPAGATION DELAYT

vs TEMPERATURE

80

70

AHB

HPHL

= V

BHB

= 12V, VSS = V

80

70

60

50

40

PROPAGATION DELAY (ns)

30

20

-40 -20 0 20 40 60 80 100 120

ALS

= V

= V

AHS

= V

BHS

BLS

JUNCTION TEMPERATURE (oC)

= 0V, R

FIGURE 17. UPPER TURN-ON PROPAGATION DELAYT

vs TEMPERATURE

80

70

HDEL

= R

LDEL

HPLH

=

60

50

40

PROPAGATION DELAY (ns)

30

20

-40 -20 0 20 40 60 80 100 120
JUNCTION TEMPERATURE (oC)

FIGURE 18. LOWERTURN-OFF PROPAGATION DELAY T

vs TEMPERATURE

13.5

12.5

11.5

10.5

9.5

GATE DRIVE FALL TIME (ns)

LPHL

60

50

40

PROPAGATION DELAY (ns)

30

20

-40 -20 0 20 40 60 80 100 120
JUNCTION TEMPERATURE (oC)

FIGURE 19. LOWERTURN-ON PROPAGATIONDELAY T

vs TEMPERATURE

13.5

12.5

11.5

10.5

TURN-ON RISE TIME (ns)

9.5

LPLH

8.5

-40 -20 0 20 40 60 80 100 120
JUNCTION TEMPERATURE (oC)

8.5

-40 -20 0 20 40 60 80 100 120
JUNCTION TEMPERATURE (oC)

FIGURE 20. GATE DRIVE FALL TIME TF vs TEMPERATURE FIGURE 21. GATE DRIVE RISE TIME TR vs TEMPERATURE

10

HCA10008

Typical Performance Curves

6.0

5.5

5.0

4.5

HDEL, LDEL INPUT VOLTAGE (V)

4.0

-40 -20 0 20 40 60 80 100 120

FIGURE 22. V

1500

1250

1000

(mV)

750

OL

V

500

250

0

10

JUNCTION TEMPERATURE (oC)

, V

VOLTAGE vs TEMPERATURE FIGURE 23. HIGH LEVEL OUTPUT VOLTAGEVCC-VOHvs

HDEL

12 14

BIAS SUPPLY VOLTAGE (V)

-40

25oC
75oC

125

LDEL

o
o

0

o

C
C

C

VDD = VCC = V

AHB

= V

BHB

= 12V, VSS = V

ALS

100K and TA = 25oC, Unless Otherwise Specified

1500

1250

1000

(mV)

OH

750

- V

CC

V

500

250

0

10 12 14

BIAS SUPPLY AND TEMPERATURE AT 100mA

3.5

3.0

2.5

2.0

1.5

1.0

GATE DRIVE SINK CURRENT (A)

0.5

0.0
6 7 8 9 10 11 12 13 14 15 16

= V

= V

= V

AHS

BIAS SUPPLY VOLTAGE (V)

VDD, VCC, V

-40

25oC
75oC

125

BLS

o
o

0

o

C
C

C

BHS

AHB

= 0V, R

, V

BHB

(V)

HDEL

= R

LDEL

=

FIGURE 24. LOWLEVEL OUTPUT VOLTAGE VOLvs BIAS

SUPPLY AND TEMPERATURE AT 100mA

3.5

3.0

2.5

2.0

1.5

1.0

GATE DRIVE SINK CURRENT (A)

0.5

0.0
6 7 8 9 10 11 12 13 14 15 16

VDD, VCC, V

AHB

, V

BHB

(V)

FIGURE 26. PEAK PULLUP CURRENT IO+vs BIAS SUPPLY

VOLTAGE

11

FIGURE 25. PEAK PULLDOWN CURRENT IOvs BIAS SUPPLY

VOLTAGE

500

10,000pF

200

3,000pF

100

50

1,000pF

20

100pF

10

5
2

1

0.5

0.2

LOW VOLTAGE BIAS CURRENT (mA)

0.1
1 10 100 10002 5 20 50 500200

SWITCHING FREQUENCY (kHz)

FIGURE 27. LOWVOLTAGEBIAS CURRENT IDD(LESS

QUIESCENT COMPONENT) vs FREQUENCY AND
GATE LOAD CAPACITANCE

HCA10008

Typical Performance Curves

VDD = VCC = V

100K and TA = 25oC, Unless Otherwise Specified (Continued)

1000

500

200

100

50

LEVEL-SHIFT CURRENT (µA)

20

10

10 100 100020 50 200 500

SWITCHING FREQUENCY (kHz)

FIGURE 28. HIGH VOLTAGE LEVEL-SHIFT CURRENT vs

FREQUENCY AND BUS VOLTAGE

150

AHB

= V

BHB

= 12V, VSS = V

9.0

(V)

DD

8.8

8.6

8.4

BIAS SUPPLY VOLTAGE, V

8.2
50 25 0 25 50 75 100 125 150

ALS

= V

= V

BLS

TEMPERATURE (

AHS

= V

UV+

UV-

BHS

= 0V, R

o

C)

HDEL

FIGURE 29. UNDERVOLTAGE LOCKOUT vs TEMPERATURE

= R

LDEL

=

120

90

60

DEAD-TIME (ns)

30

0

10 50 100 150 200 250

HDEL/LDEL RESISTANCE (kΩ)

FIGURE 30. MINIMUM DEAD-TIME vs DEL RESISTANCE

12

Small Outline Plastic Packages (SOIC)

HCA10008

N

INDEX
AREA

123

-A-

E

-B-

SEATING PLANE

D

A

-C-

0.25(0.010) BM M

H

L

h x 45

o

α

e

B

0.25(0.010) C AM BS

M

NOTES:

1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.

3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.

4. Dimension“E”doesnotincludeinterleadflashorprotrusions.Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.

5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of

0.61mm (0.024 inch)

10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.

A1

C

0.10(0.004)

M20.3 (JEDEC MS-013-AC ISSUE C)

20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE

INCHES MILLIMETERS

SYMBOL

A 0.0926 0.1043 2.35 2.65 -

A1 0.0040 0.0118 0.10 0.30 -

B 0.013 0.0200 0.33 0.51 9
C 0.0091 0.0125 0.23 0.32 ­D 0.4961 0.5118 12.60 13.00 3
E 0.2914 0.2992 7.40 7.60 4
e 0.050 BSC 1.27 BSC ­H 0.394 0.419 10.00 10.65 ­h 0.010 0.029 0.25 0.75 5
L 0.016 0.050 0.40 1.27 6
N20 207

o

α

0

o

8

o

0

o

8

Rev. 0 12/93

NOTESMIN MAX MIN MAX

-

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly,the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

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13

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