Datasheet HC-5524 Datasheet (Intersil Corporation)

Page 1

HC-5524

Data Sheet February 1999 File Number 2798.6

EIA/ITU 24V PABX SLIC with 25mA Loop Feed

The HC-5524 telephone Subscriber Line Interface Circuit integrates most of the BORSCHT functions on a monolithic IC. The device is manufactured in a Dielectric Isolation (DI) process and is designed for use as a 24V interface between the traditional telephone subscriber pair (Tip and Ring) and the low voltage ﬁltering and coding/decoding functions ofthe line card. Together with a secondary protection diode bridge, the device will withstand 500V induced surges, in plastic packages. The SLIC also maintains speciﬁed transmission performance in the presence of externally induced longitudinal currents. The BORSCHT functions that the SLIC provides are:

• Battery Feed with Subscriber Loop Current Limiting

• Overvoltage Protection

• Ring Relay Driver

• Supervisory Signaling Functions

• Hybrid Functions (with External Op-Amp)

• Test (or Battery Reversal) Relay Driver In addition, the SLIC provides selective denial of power to

subscriber loops, a programmable subscriber loop current limit from 20mA to 60mA, a thermal shutdown with an alarm output and line fault protection. Switch hook detection, ring trip detection and ground key detection functions are also incorporated in the SLIC device.

The HC-5524 SLIC is ideally suited for line card designs in PBX and DLC systems, replacing traditional transformer solutions.

Ordering Information

TEMP.

PART NUMBER

HC4P5524-9 -40 to 85 44 Ld PLCC N44.65 HC9P5524-5 0 to 75 28 Ld SOIC M28.3

RANGE (oC) PACKAGE

PKG.

NO.

Features

• DI Monolithic High Voltage Process

• Compatible with Worldwide PBX and DLC Performance Requirements

• Controlled Supply of Battery Feed Current with Programmable Current Limit

• Operates with 5V Positive Supply (V

• Internal Ring Relay Driver and a Utility Relay Driver

• High Impedance Mode for Subscriber Loop

• High Temperature Alarm Output

• Low Power Consumption During Standby Functions

• Switch Hook, Ground Key, and Ring Trip Detection

• Selective Power Denial to Subscriber

• Voice Path Active During Power Denial

• On-Chip Op Amp for 2-Wire Impedance Matching

Applications

• Solid State Line Interface Circuit for PBX or Digital Loop Carrier Systems

• Hotel/Motel Switching Systems

• Direct Inward Dialing (DID) Trunks

• Voice Messaging PBXs

• 2-Wire/4-Wire, 4-Wire/2-Wire Hybrid

• Related Literature

- AN9607, Impedance Matching Design Equations

- AN9628, AC Voltage Gain

- AN9608, Implementing Pulse Metering

- AN549, The HC-5502S/4X Telephone Subscriber Line

Interface Circuits (SLIC)

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

Page 2

HC-5524

Absolute Maximum Ratings (Note 1) Thermal Information

Maximum Supply Voltages

(VB+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to 7V

(VB+) - (VB-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40V

Relay Drive Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to 15V

Operating Conditions

Operating Temperature Range

HC-5524-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to TA to 75oC

HC-5524-9 . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to TA to 85oC

Relay Driver Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V to 12V

Positive Power Supply (VB+) . . . . . . . . . . . . . . . . . . . . . . . . 5V ±5%

Negative Power Supply (VB-). . . . . . . . . . . . . . . . . . . . -20V to -28V

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTES:

1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional operability under any of these conditions is not necessarily implied.

2. θJA is measured with the component mounted on an evaluation PC board in free air.

Thermal Resistance (Typical, Note 2) θJA (oC/W)

PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Maximum Junction Temperature (Plastic Package). . . . . . . . 150oC

Maximum Storage Temperature Range. . . . . . -65oC to TA to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC

(PLCC and SOIC - Lead Tips Only)

Die Characteristics

Transistor Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224

Diode Count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . .174 mils x 120 mils

Substrate Potential. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connected

Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Bipolar-DI

Electrical Specifications Typical Parameters are at T

Over Operating Positive and Negative Battery Voltages and Over the Operating Temperature Range. All Parameters are Speciﬁed at 600W 2-Wire Terminating Impedance, Unless Otherwise Speciﬁed

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

AC TRANSMISSION PARAMETERS

RX Input Impedance 300Hz to 3.4kHz, (Note 3) - 100 - kΩ TX Output Impedance --20Ω 4-Wire Input Overload Level 300Hz to 3.4kHz, 600Ω Reference +1.0 - - V 2-Wire Return Loss Matched for 600Ω, (Note 3)

SRL LO 26 35 - dB ERL 30 40 - dB SRL HI 30 40 - dB

2-Wire Longitudinal to Metallic Balance Off Hook Per ANSI/IEEE STD 455-1976,

4-Wire Longitudinal Balance Off Hook Per ANSI/IEEE STD 455-1976,

Low Frequency Longitudinal Balance R.E.A. Test Circuit - -80 -67 dBmp

Longitudinal Current Capability I Insertion Loss

2-Wire/4-Wire -1.58dBm at 1kHz, Referenced 600Ω - ±0.05 ±0.2 dB 4-Wire/2-Wire 0dBm at 1kHz, Referenced 600Ω - ±0.05 ±0.2 dB 4-Wire/4-Wire -1.58dBm at 1kHz, Referenced 600Ω --±0.2 dB

Frequency Response 300Hzto 3400Hz, Referencedto Absolute Levelat

Level Linearity 2-Wire to 4-Wire and 4-Wire to 2-Wire

= 25oC, VB+ = 5V, VB- = -24V, AG = DG = BG = 0V. Min-Max Parameters are

PEAK

58 63 - dB

300Hz to 3400Hz, (Note 3)

50 55 - dB

300Hz to 3400Hz, (Note 3)

= 40mA, TA = 25oC (Note 3) - 10 23 dBrnC

LINE

= 40mA, TA = 25oC (Note 3) - - 40 mA

LINE

- ±0.02 ±0.06 dB

1kHz, 0dBm Referenced 600Ω (Note 3) Referenced to -10dBm, (Note 3)

+3 to -40dBm - - ±0.08 dB

-40 to -50dBm - - ±0.12 dB

-50 to -55dBm - - ±0.3 dB

RMS

Page 3

HC-5524

Electrical Specifications Typical Parameters are at T

= 25oC, VB+ = 5V, VB- = -24V, AG = DG = BG = 0V. Min-Max Parameters are

Over Operating Positive and Negative Battery Voltages and Over the Operating Temperature Range. All Parameters are Speciﬁed at 600W 2-Wire Terminating Impedance, Unless Otherwise Speciﬁed (Continued)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

Absolute Delay (Note 2)

2-Wire/4-Wire 300Hz to 3400Hz - - 1 µs 4-Wire/2-Wire 300Hz to 3400Hz - - 1 µs 4-Wire/4-Wire 300Hz to 3400Hz - 0.95 1.5 µs

Total Harmonic Distortion 2-Wire/4-Wire, 4-Wire/2-Wire, 4-Wire/4-Wire

Reference Level 0dBm at 600Ω, 300Hz to 3400Hz (Note 3)

- - -50 dB

Idle Channel Noise 2-Wire and 4-Wire

C-Message, (Note 3) - - 5 dBrnC Psophometric - - -85 dBmp 3kHz Flat - - 16 dBrn

Open Loop Voltage (V

TIP

- V

RING

+ = 5V, VB- = -24V - 15.8 - V

Power Supply Rejection Ratio

VB+ to 2-Wire 30Hz to 200Hz, RL = 600Ω, (Note 3) 20 40 - dB VB+ to 4-Wire 20 40 - dB VB- to 2-Wire 20 40 - dB VB- to 4-Wire 20 50 - dB VB+ to 2-Wire 200Hz to 16kHz, RL = 600Ω 30 40 - dB VB+ to 4-Wire 20 28 - dB VB- to 2-Wire 20 50 - dB VB- to 4-Wire 20 50 - dB

Ring Sync Pulse Width 50 - 500 µs

DC PARAMETERS

Loop Current Programming

Limit Range 20 - 60 mA

Accuracy 10 - - % Loop Current During Power Denial RL = 200Ω - ±4 ±7mA Fault Currents

TIP to Ground -30-mA

RING to Ground - 120 - mA

TIP and RING to Ground - 150 - mA Switch Hook Detection Threshold -1215mA Ground Key Detection Threshold -10-mA Thermal ALM Output Safe Operating Die Temperature Exceeded 140 - 160 Ring Trip Detection Threshold V

RING

= 105V

RMS

, f

= 20Hz - 10 - mA

RING

Ring Trip Detection Period - 100 150 ms Dial Pulse Distortion - 0.1 0.5 ms Relay Driver Outputs

On Voltage V

IOL (PR) = 60mA, IOL (RD) = 30mA - 0.2 0.5 V

Off Leakage Current VOH = 13.2V - ±10 ±100 µA TTL/CMOS Logic Inputs (F0, F1, RS, TST, PRI)

Logic ‘0’ V

Logic ‘1’ V

IL IH

- - 0.8 V

2.0 - 5.5 V Input Current (F0, F1, RS, TST, PRI) 0V ≤ VIN≤ 5V - - ±100 µA Logic Outputs

Logic ‘0’ V Logic ‘1’ V

OL OH

= 800µA - 0.1 0.5 V

LOAD

= 40µA 2.7 - - V

LOAD

Page 4

HC-5524

Electrical Specifications Typical Parameters are at T

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

Power Dissipation On Hook Relay Drivers Off - 60 - mW IB+V IB-V IB+V IB-V

UNCOMMITTED OP AMP PARAMETERS

Input Offset Voltage - ±5-mV Input Offset Current - ±10 - nA Differential Input Resistance (Note 3) - 1 - MΩ Output Voltage Swing RL = 10kΩ - ±3-V Small Signal GBW (Note 3) - 1 - MHz

NOTE:

3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and specification compliance.

= 25oC, VB+ = 5V, VB- = -24V, AG = DG = BG = 0V. Min-Max Parameters are

+ = 5.25V, VB- = -28V, R

+ = 5V, VB- = -24V, R

LOOP LOOP

= ∞ --4mA

LOOP

= ∞ -4 - - mA

LOOP

= 600Ω -36mA = 600Ω -28 -24 - mA

P-P

Pin Descriptions

SOIC PLCC SYMBOL DESCRIPTION

12 AG

(Note 4) 23V 34 C1Capacitor #C1- An external capacitor to be connected between this terminal and analog ground. Required for

4 8 F1 Function Address #1 - A TTL and CMOS compatible input used with F0 function address line to externally se-

5 9 F0 Function Address #0 - A TTL and CMOS compatible input used with F1 function address line to externally se-

6 10 RS Ring Synchronization Input - A TTL - compatible clock input. The clock is arranged such that a positive pulse

711SHD Switch Hook Detection - An active low LS TTL compatible logic output. A line supervisory output. 812GKD Ground Key Detection - An active low LS TTL compatible logic output. A line supervisory output. 913TST A TTL logic input. A low on this pin will set a latch and keep the SLIC in a power down mode until the proper

10 17 ALM A LS TTL compatible active low output which responds to the thermal detector circuit when a safe operating

11 18 I

12 19 OUT1 The analog output of the spare operational ampliﬁer. 13 20 -IN1 The inverting analog input of the spare operational ampliﬁer.

LIMIT

Analog Ground - Tobe connected to zero potential. Serves as a reference for the transmit output and receive input terminals.

+ Positive Voltage Source - Most Positive Supply.

proper operation of the loop current limiting function.

lect logic functions. The three selectable functions are mutually exclusive. See Truth Table on front page. F1 should be toggled high after power is applied.

lect logic functions. The three selectable functions are mutually exclusive. See Truth Table on front page.

(50µs - 500µs) occurs on the zero crossing of the ring voltage source, as it appears at the RFS terminal. For Tip side injected systems, the RS pulse should occur on the negative going zero crossing and for Ring injected systems, on the positive going zero crossing. This ensures that the ring delay activates and deactivates when the instantaneous ring voltage is near zero. If synchronization is not required, the pin should be tied to +5V.

F1, F0 state is set and will keep ALM low. See Truth Table on front page.

die temperature has been exceeded. When TST is forced low by an external control signal, ALM is latched low until the proper F1, F0 state and TST input is brought high. The ALM can be tied directly to the TST pin to powerdownthe part when a thermal faultisdetectedandthenreset with F0, F1. See TruthTableon front page. It is possible to ignore transient thermal overload conditions in the SLIC by delaying the response to the TST pin from the ALM. Care must be exercisedin attempting this as continued thermal overstress may reduce component life.

Loop Current Limit - Voltage on this pin sets the short loop current limiting conditions using a resistive voltage divider.

Page 5

HC-5524

Pin Descriptions

SOIC PLCC SYMBOL DESCRIPTION

14 22 TIP An analog input connected to the TIP (more positive) side of the subscriber loop through a feed resistor and

15 24 RING An analog input connected to the RING (more negative) side of the subscriber loop through a feed resistor.

16 25 RFS Ring Feed Sense - Senses RING side of the loop for Ground Key Detection. During Ring injected ringing the

17 27 V

18 31 C

19 32 V

20 33 PRI A TTL compatible input used to control PR. PRI active High = PR active low. 21 34 PR An active low open collector output. Can be used to drive a Polarity Reversal Relay. 22 35 DG

23 36 RD Ring Relay Driver - An active low open collector output. Used to drivea relaythat switchesringing signals onto

24 37 V

25 38 TF

NA 39 TF

26 41 RF

NA 42 RF

27 43 VB- The battery voltage source. The most negative supply. 28 44 BG

1,5, 6,7,

14, 15, 16, 21, 23, 26, 28, 29,

30, 40

NOTES:

4. All grounds (AG, BG, and DG) must be applied before VB+orVB-. Failure to do so may result in premature failure of the part. If a user wishes to run separate grounds off a line card, the AG must be applied first.

5. Although not used in the typical applications circuit, VFB may be used in matching complex 2-Wire impedances.

(Continued)

ring relay contact. Functions with the RING terminal to receive voice signals from the telephone and for loop monitoring purposes.

Functions with the TIP terminal to receive voice signals from the telephone and for loop monitoring purposes.

ring signal at this node is isolated from RF via the ring relay. For Tip injected ringing, the RF and RFS pins must be shorted.

(Note 4)

(Note 5)

(Note 4)

NC No internal connection.

Receive Input, 4-Wire Side - A high impedance analog input. AC signals appearing at this input drive the Tip Feed and Ring Feed ampliﬁers differentially.

Capacitor #2 - An external capacitor to be connected between this terminal and ground. It prevents false ring

trip detection from occurring when longitudinal currents are induced onto the subscriber loop from power lines and other noise sources. This capacitor should be nonpolarized.

Transmit Output, 4-Wire Side-Alowimpedance analog output which represents the differential voltage across TIP and RING. Transhybrid balancing must be performed beyond this output to completely implement two to four wire conversion. This output is referenced to analog ground. Since the DC level of this output varies with loop current, capacitive coupling to the next stage is necessary.

Digital Ground - To be connected to zero potential. Serves as a reference for all digital inputs and outputs on the SLIC.

the 2-Wire line. Feedback input to the tip feed ampliﬁer; may be used in conjunction with transmit output signal and the spare

op-amp to accommodate 2-Wire line impedance matching. (This is not used in the typical applications circuit). Tip Feed - A low impedance analog output connected to the TIP terminal through a feed resistor. Functions

with the RF terminal to provide loop current, and to feed voice signals to the telephone set and to sink longitudinal currents. Must be tied to TF1.

Tie directly to TF2 in the PLCC application.

Ring Feed-A lowimpedanceanalog output connected to the RING terminal through a feed resistor.Functions

with the TF terminal to provide loop current, feed voice signals to the telephone set, and to sink longitudinal currents. Tie directly to RF2.

Tie directly to RF1 in the PLCC application.

Battery Ground - To be connected to zero potential. All loop current and some quiescent current ﬂows into this ground terminal.

Page 6

Pinouts

VB+

F1 F0

SHD

GKD

TST

ALM

ILMT

OUT 1

-IN 1

TIP

HC-5524 (SOIC)

TOP VIEW

1 2 3 4 5 6 7 8 9

HC-5524

HC-5524 (PLCC)

TOP VIEW

VBRF

VFB

21 20

PRI

VTX

VRX

RFS

RING

F1 F0 Action

0 0 Normal Loop Feed 01RD Active 1 0 Power Down Latch

1 0 Power on RESET 1 1 Loop Power

TRUTH TABLE

RESET

Denial Active

N/C

SHD

GKD

TST

N/C N/C N/C

ALM

7 8

10 11 12 13 14 15 16 17

18 19 20 21 22 23 24 25 26

N/C

ILMT

N/C

-IN 1

OUT 1

VB+

N/C

TIP

N/C

1234564041424344

N/C

RING

VB-

RFS

RF2

N/C

RF1

VRX

N/C

TF1 TF2

38 37

VFB

PRI

VTX C2

31 30

N/C

Page 7

Functional Diagram

TIP

RING

RFS

R = 108kΩ

R R

4.5kΩ

100kΩ 100kΩ

4.5kΩ

90kΩ 90kΩ

R/2

25kΩ

HC-5524

DIP OR SOIC

RX OUT1

90kΩ

17 12

RF1

90kΩ

VB/2

REF

SHD

RTD GKD

-IN1

OP AMP

13 24 19 2 22 1

FAULT

DET

THERM

LIMIT

LTD

VB+

BIAS

NETWORK

TSD

RFC

IIL LOGIC INTERFACE

VB-

TST

PRI

SHD

GKD

ALM

TF2

TF1

TIP

RING

RFS

RF2

RF1

PLCC

R R

4.5kΩ

100kΩ 100kΩ

4.5kΩ

OUT 1

90kΩ

27 19

RF1

90kΩ

VB/2

REF

SHD

RTD GKD

R/2

25kΩ

90kΩ 90kΩ

-IN 1

OP AMP

31 18

20 37 32 3 35 2

FAULT

DET

THERM

LTD

VB+

NOTES:

6. R = 108kΩ.

BIAS

NETWORK

TSD

RFC

VB-

TST

PRI

IIL LOGIC INTERFACE

SHD

GKD

ALM

7. NC = 1, 5, 6, 7, 14, 15, 16, 21,

LIMIT

23, 26, 28, 29, 30, 40.

Page 8

Logic Diagram

TTL TO I

TTL TO I2L

HC-5524

THERMAL SHUT DOWN

RELAY

DRIVER

I2L TO TTL

L TO TTL

GKD

SHD

ALM

THERMAL

SHUTDOWN

LATCH

TTL TO I

TEST

Overvoltage Protection and Longitudinal Current Protection

The SLIC device, in conjunction with an external protection bridge, will withstand high voltage lightning surges and power line crosses.

High voltage surge conditions are as speciﬁed in Table 1. The SLIC will withstand longitudinal currents up to a maxi-

mum or 40mA

RMS

, 20mA

per leg, without any perfor-

RMS

mance degradation.

PARAMETER

Longitudinal Surge

Metallic Surge 10µs Rise/ ±1000 (Plastic) V

T/GND 10µs Rise/ ±1000 (Plastic) V R/GND 1000µs Fall 50/60Hz Current

T/GND 11 Cycles 700 (Plastic) V R/GND Limited to

TO BIAS NETWORK

INJ

A B

KEY

A B C

TABLE 1.

TEST

CONDITION

PERFORMANCE

(MAX) UNITS

10µs Rise/ ±1000 (Plastic) V 1000µs Fall

1000µs Fall

10A

RMS

PEAK

RMS

Page 9

Typical Applications

S1CS1

TIP

PRIMARY

PROTECTION

RING

SECONDARY PROTECTION (NOTE 6)

PTC

150V

RING

PEAK

(MAX)

R C

HC-5524

RD PR

TIP TF

VB-

RF2(NOTE 7)

S2 S2

RF1(NOTE 7)

RFS

RING

SYSTEM CONTROLLER

PRI RS F1 F0SHD GKD TEST ALARM

(NOTE 7)

VB-BG

SLIC

HC-5524

DG AG VB+

LIMIT

VRX+

-IN1

OUT1

K(Z0- R /2)

FROM PCM FILTER/CODER

TO HYBRID BALANCE NETWORK

FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC

Typical Component Values

= 0.5µF, 20V.

= 1.0µF ±10%, 20V (for other values of C2, refer to

AN9667).

= 0.01µF, 50V ±20%.

= 0.5µF, 20V.

- RF/2) = 50kΩ, (Z0 = 600Ω, K = Scaling Factor = 100).

K(Z

, RL2; Current Limit Setting Resistors.

NOTES:

8. All grounds (AG, BG, and DG) must be applied before VB+orVB-. Failure to do so may result in premature failure of the part. If a user wishes

9. Application shows Ring Injected Ringing, Balanced or Tip injected configuration may be used.

10. Secondary protection diode bridge recommended is 3A, 200V type.

11. TF1, TF2 and RF1, RF2 are on PLCC only and should be connected together as shown.

> 90kΩ.

L1+RL2

to run separate grounds off a line card, the AG must be applied first.

= (.6) (RL1 + RL2)/(200 x RL2), RL1 typically 100kΩ.

LIMIT

= 20kΩ, RF = 2(RB1+RB2), K = Scaling Factor = 100).

B1=RB2

=50Ω (1% absolute, matching requirements cov-

ered in a Tech Brief).

= RS2 = 1kΩ typically.

S1=CS2

= 0.1µF, 200V typically, depending on V

line length.

= 150V to 200V transient protector. PTC used as ring

generator ballast.

Ring

and

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