• Zero Crossing Ring Trip Detection and Ring Relay
Release
• Parallel Digital Control and Status Monitoring
• Protection Resistors Inside Feedback Loop Allows the
Use of PTC Devices Without Impact on Longitudinal
Balance
• Thermal Management Features
Applications
• CO/PABX Line Circuits
Description
The HC5520 is a Monolithic Subscriber Line Interface Circuit
(SLIC) for Analog Subscriber Line cards in Central Office
and PABX switches.
The HC5520 provides a comprehensive set of features for
these applications including loop reversal, zero crossing
ringing relay operation, long loop drive and a mutually independent setting of the receive and transmit gains, and the
two wire impedance synthesis. Advanced power management features combined with a small 44 lead MQFP package allow significant board space to be freed up for
additional line circuits.
The HC5520 is fabricated in a Harris state-of-the-art Bonded
Wafer High Voltage process, providing freedom from traditional JI latch-up phenomena without the use of additional
power supply filtering components or substrate tie connections. The very low parasitics and leakages associated with
this process provide an exceptionally flat performance over
frequency and temperature.
Ordering Information
TEMP.
PART NUMBER
HC5520CQ0 to 7044 Ld MQFPQ44.10x10
HC5520CM0 to 7044 Ld PLCCN44.65
RANGE (oC)PACKAGEPKG. NO.
Block Diagram
R
TXT
X
TA
TB
TSDO
SHDO
PRI
PDI
RCI
TBI
TAI
AGND
BGND
RGND
V
BAT
V
CC
V
EE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Recommended Operating Conditions
For maximum integrity, nominal operating conditions should be selected so that operation is always within the following ranges:
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(Lead tips only)
-42-48-58V
4.7555.25V
-4.75-5-5.25V
607590V
DC
DC
DC
RMS
200-1800Ω
02570
--150
o
C
o
C
o
Electrical Specifications Unless Otherwise Specified: Typical Parameters are at T
= 25oC, VCC = +5V, VEE = -5V, V
A
BAT
= -48V,
AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600Ω 2-Wire Terminating Impedance with 0dB transmit and receive gain.
Electrical Specifications Unless Otherwise Specified: Typical Parameters are at T
= 25oC, VCC = +5V, VEE = -5V, V
A
BAT
= -48V,
AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600Ω 2-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued)
CONDITIONS
V
RING
V
TIP
V
RING
PARAMETER
normal
reverse
normal
reverse
normal
reverse
OTHER
BAT
CONDITIONS
Open-48V-45.54
Open-42V-5.00
Open-42V-39.54
FREQ/
LEVEL
MINTYPMAXUNITSMODELOADV
-6.00
-40.00
-5.00
-43.80
-4.26
-3.68
-38.12
-38.34
-3.78
-42.50
-2.00
-2.46
-37.00VV
-37.00
-2.00
V
V
V
V
BATTERY FEED CHARACTERISTICS - LOOP CURRENT (Figure 5)
LOOP SUPERVISION - POLARITY REVERSAL TIME (Figure 9)
Polarity Reversal Timenormal
1800Ω-42V-0.0410ms
to
reverse
Polarity Reversal Timereverse
1800Ω-42V-0.0410ms
to
normal
LOOP SUPERVISION - DIGITAL INTERFACE
Input Low Voltage, V
Input High Voltage, V
Input Low Current, I
Input High Current, I
Output Low Voltage, V
Output High Voltage, V
IL
IH
IL
IH
OL
OH
Relay Driver Output Low Voltage, V
Relay Driver Output High Current, I
All Digital Inputs--0.8V
All Digital Inputs2.0--V
AGND < VIN < V
VIH < VIN < V
CC
IL
-20--µA
-0+10µA
1 LSTTL Load--0.4V
1 LSTTL Load2.4--V
OLVCC
OHVCC
= 4.75V, Load = 35mA-0.40.8V
= 5.25V--10µA
3
Page 4
HC5520
Electrical Specifications Unless Otherwise Specified: Typical Parameters are at T
AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600Ω 2-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued)
CONDITIONS
PARAMETER
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE RECEIVE GAIN (Figure 10)
Absolute Receive Gain, ARGnormal
reverse
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE FREQUENCY RESPONSE (Figure 10)
Receive Frequency Response
Relative to ARG
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE GAIN TRACKING (Figure 10)
Receive Gain Tracking Relative to
ARG
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE SIGNAL TO DISTORTION (Figure 10)
Electrical Specifications Unless Otherwise Specified: Typical Parameters are at T
= 25oC, VCC = +5V, VEE = -5V, V
A
BAT
= -48V,
AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600Ω 2-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued)
CONDITIONS
PARAMETER
BAT
OTHER
CONDITIONS
FREQ/
LEVEL
MINTYPMAXUNITSMODELOADV
TRANSMISSION PARAMETERS - 4-WIRE TO 4-WIRE ABSOLUTE DELAY
Absolute Delaynormal
reverse
600Ω-48V1020Hz
0dBm
1.5µs
TRANSMISSION PARAMETERS - OVER LOAD LEVEL (Figures 14, 15)
The HC5520 is a current feed voltage senseSubscriberLine
Interface Circuit (SLIC). It provides extensive digitally con-
trolled supervisory functions, DC loop feed functions, and
user selectable 2 wire impedance matching functions.
Modes of Operation
The HC5520 has seven possible modes of operation. These
modes of operation are either controlled by the digital control
inputs to the SLIC or controlled by the loop status output of
the SLIC. The modes of operation and the function of the
digital control inputs are given in Table 1.
TABLE 1.
SLIC
OPERATIONMODE
Normal
Loop Feed
Reverse
Loop Feed
Loop
Powerdown
RingingRingingRing trip
Test outTest-outNormalTAI = Low
Test inTest-inNormalTBI = Low
Thermal
Shut Down
NormalNormalPRI = High
ReverseNormalPRI = Low
P’downLoop
TSDLoop
FUNCTION
power down
detection only
Powerdown
Normal Loop Feed Mode
When PDI = 1, setting the PRI to a logic “1” places the SLIC
in the Normal Loop Feed mode. This is the normal operational mode of the SLIC. With a nominal battery supply of 48V and an on-hook condition, the voltage at the Tip terminal will be approximately 8% of the battery supply voltage. In
this case the Tip voltage is about -3.8V. Similarly, the voltage
at the Ring terminal will be approximately 92% of the battery
supply voltage or about -44.2V.
In the Normal mode the Tip voltage is more positive than
the Ring voltage; therefore, in an off-hook condition, the DC
loop current flows from Tip to Ring. The loop feeding
characteristics will be given in the battery feed section. All of
the specifications applicable to this mode of operation are
provided in the electrical specifications portion of the
HC5520 data sheet.
Reverse Loop Feed Mode
When PDI = 1, setting the PRI to a logic “0” places the SLIC
in the Reverse Loop Feed mode. In this mode, the Ring terminal voltage is more positive than the Tip terminal voltage.
Thus, in an off-hook condition, the DC loop current flows
from Ring to Tip. The loop feeding characteristics in the
Reverse mode are the same as in the Normal mode. All of
CONTROL
INPUTS
PDI = Low
RCI = Low
the specifications applicable to this mode of operation are
provided in the electrical specifications portion of the
HC5520 data sheet.
Battery Feed
The HC5520 is designed to provide a 300Ω resistive feed
(150Ω per wire) for long loop applications. It will supply a DC
loop feed current of 18mA into an 1800Ω loop at the nominal
battery supply of -48V. At shorter loop lengths or higher battery supply voltages, the DC feed is current-limited to nominally 26mA in order to conserve power. For internal chip
power management purposes, external power sharing resistors are used to provide some of the DC loop current. This
allows a substantial amount of the power to be dissipated off
the chip, particularly in short loop applications. A typical loop
feeding characteristic for Normal and Reverse Loop Feed
Modes of operation is shown in Figure 1.
I
LOOP
30
mA
20
10
600
800 1.0K 1.2K 1.4K 1.6K 1.8K 2.0K 2.2K 2.4K
FIGURE 1. BATTERY FEED CHARACTERISTICS
R
LOOP
Loop Supervision - Switch Hook Detection
The Loop Supervision circuit operates in the Normal and
Reverse Loop Feed modes. The DC loop current is monitored and the off-hook condition is indicated when the loop
resistance is less than 2.4kΩ . When this occurs, the SHDO
output will be set to a logic low in order to signal the system
that an off-hook condition exists. If the subscriber is using a
rotary dial telephone, the system can monitor the dial pulses
through the SHDO output.
Ringing - Ring Trip Detection Mode
The ringing voltage is cadenced to a subscriber loop by
applying a logic signal to the Rci input. When a logic “0” is
received at the RCI input, the HC5520 will set the RD output
to low and thus pull current through the ring relay coil and
energize the ring relay. This causes the subscriber’s telephone to begin ringing. At this time the ringing current
through the ring ballast resistor is monitored to determine
whether an off-hook condition is present. Once the subscriber goes off-hook, the ring trip circuit will turn off the ring
relay after the next occurrence of a zero net current flow
through the ring ballast resistor. At the same time, the SHDO
output will be set to a logic low to indicate the ring trip detec-
6
Page 7
HC5520
tion. The ring relay can not be reenergized until the system
acknowledges that a ring trip has occurred. Acknowledgment is achieved by setting the RCI to a logic high.
If the subscriber goes off-hook during the silent portion of
the ringing cadence, the off-hook condition is detected in the
same manner as a switch hook detection. The SHDO output
will be set to a logic low in order to indicate that the subscriber has answered the call and that ringing of the line
should cease.
Loop Power Down Mode
Under any condition when PDI is set to a logic “0”, the SLIC
will power down the two wire loop. Dur ing loop power down,
the voltages at Tip and Ring are both collapsed to one-half
of the battery voltage and the outputs of the Tip and Ring
feed amplifiers are in a high impedance state. Therefore all
of the supervisory functions and transmission functions are
disabled. The HC5520 will resume normal operation once
the loop power down command is removed.
Thermal Shutdown Mode
The SLIC will power down the loop by itself once the
temperature of the SLIC die reaches 150
o
C. During this
thermal shutdown condition, both TSDO and SHDO outputs
will be set to a default logic low to indicate the condition. The
supervisory functions and transmission functions are
disabled. Once the SLIC die temperature drops 10
o
C lower
than the thermal shutdown temperature, the SLIC will
resume operation.
Test-Out and Test-In Modes
Two additional relay drivers are provided for test-out and
test-in functions. Unlike the ring relay driver circuit, these
relay drivers are operated independently of the rest of the
HC5520 circuitry. The designation of test-out and test-in is
purely arbitrary. When desired, the subscriber’s loop condition can be interrogated through the test-out relay. Likewise,
through the test-in relay, the various SLIC functions and signal integrity can be examined.
Hybrid Transmission Model
Figure 2 shows a simplified model for bidirectional signal
transmission and 2-wire impedance synthesis. The term
R
external 100kΩ sense resistors R
used in the equations below refers to the pair of
SENSE
TPS
and R
RGS
. The
HC5520 architecture gives the user the flexibility to set the
gains and 2-wire impedance with external resistors and
resistor ratios. However, to prevent adversely affecting other
SLIC control functions, the value of R
SENSE
should always
be selected to be 100kΩ.
2W Impedance
The 2W impedance is the AC input impedance synthesized
by the SLIC between the Tip and Ring terminals and will be
referred to as ZO. The value of ZO is user programmable by
varying the value R
less than 7kΩ. Z
and Z
N
can be either a real resistance or a
KZO
. RN is recommended to be
KZO
complex impedance network. ZO is determined by the following equation:
The signal level voltage gain from the 4-wire analog input
(RX) to the 2-wire ∆VTR voltage is user programmable using
the following equation:
R–
SENSE
42–
-----------------------------=
R
X
is constrained to be 100kΩ. The SLIC has a
SENSE
A
where R
built-in +6.02dB gain to compensate for the divider effect of
matching the load impedance, making it transparent to the
user.
2W to 4W Gain
The signal level v oltage gain from the Tip and Ring terminals
(∆V
) to the output of the 4-wire signal amplifier (R4W) is
TR
user programmable using the following equation:
R
A
24–
4W
--------------------------=
R
SENSE
Transhybrid Balance
Functionally, when a voice signal is received at V
RX
a current which is proportional to the voice signal will pass
through the SLIC 4 wire input R
pin. This voice input cur-
X
rent will be amplified and inverted to drive the load across
the Tip and Ring. The AC voltages at Tip and Ring are fed
back to the SLIC and reproduced as the transmit signal at
the T
pin. This received voice signal returned from 2 wire
X
side of the SLIC will have the same amplitude as the
received AC signal but will be 180 degrees out of phase.
This signal needs to be eliminated from transmission to prevent far end echo.
The most common way of implementing the transhybr id balance function is to use the analog voice input amplifier in the
Combo as a summing amplifier. The circuit connections are
as shown in Figure 3. Notice that the input impedance networks for both received signal and returned signal are bascally the same, if the 62pF capacitor were not added. The
addition of the 62pF capacitor to ground is to compensate for
the phase shift of the returned signal to achieve 15dB or
more improvement in the 2k to 4kHz frequency band as
compared to the data collected from the test circuit.
Sensitive Pins
Tipsen, Ringsen Pins - These pins are very low imped-
ance virtual grounds used for providing feedback current to
the HC5520 DC, AC, and Longitudinal control loops. Parasitic capacitance on these pins from the PC board layout
and external components should be minimized to prevent
oscillation.
7
Page 8
HC5520
∆V
∆I
HC5520
KZO
A2
-
+
∆I
∆I
RS
TS
∆I
RX
TR
A = 400
TIP
∆I
R
TPS
∆I
L
Z
L
+
E
G
R
RGS
TS
∆I
RS
-
A = 400
RING
2x∆I
RX
∆I
KZO
∆I
∆I
RS
TS
FIGURE 2. SIMPLIFIED AC TRANSMISSION CIRCUIT
C
VRX
0.47µF
X
0.47µF
C
VTX
0.47µF
V
RX
50kΩ
V
TX
600Ω
TIP
RING
R
TPS
100kΩ
R
PT
50Ω
R
PR
50Ω
R
RGS
100kΩ
TIPSEN
TIP
HC5520
RING
RINGSEN
T
X4W
R
X
R
100kΩ
R
4W
100kΩ
T
X
FIGURE 3. TRANSHYBRID BALANCE CIRCUIT WITH HIGH AND LOW FREQUENCY COMPENSATION
A1
+
-
62pF
∆I
KZO
50kΩ
100kΩ
R
4W
R
X
R
N
Z
KZO
100kΩ
-
+
VOICE INPUT
AMPLIFIER
+
V
TX
-
+
V
RX
-
Pin - The 2-wire impedance that is synthesized by the
K
ZO
HC5520 is a direct function of the network connected to this
pin (see equations). Parasitic capacitance and inductance
from the PC board layout and the external components is
magnified by the same K factor that is utilized to synthesize
the 2-wire impedance. Excessive parasitics can cause insertion loss and return loss degradation, especially at higher
voice band frequencies. Good PC board layout techniques
and proper component selection can minimize these effects
to a negligible level.
R
Pin - This pin connects an external resistor to the input
N
of an internal buffer. The value of this resistor is user specified based upon the impedance desired at the 2-wire interface (see equations). The value chosen must not have a
value greater than 7kΩ or the input voltage range of the
buffer may be exceeded during transients.
R
Pin - An external resistor connected to VCC is required
DC
at this pin to provide an accurate reference for the DC currents which feed the subscriber loop. PC board traces
should be made to have low resistance and should connect
directly to V
CC
.
C
Pin - This pin provides a connection to the DC refer-
DC
ence nodes that control the DC loop feed current. These
internal blocks are referenced to V
the capacitor be referenced to V
and it is important that
EE
or else the PSRR perfor-
EE
mance will be degraded.
C
Pin - Capacitor CP connects to this pin to create a low-
P
pass filter for the half-battery internal reference point. It is
important that this capacitor be referenced to BGND/AGND
to minimize the effect of noise injected into the subscriber
loop from the battery supply.
R
, R
, R
, R
PSG
PST
PSR
Pins - These pins are connected
PSB
to critical nodes inside the HC5519R3931 feedback control
loops. Parasitic capacitance should be minimized in order to
prevent oscillations.
RD, TB, TA Pins - The pins connect to the dr iver coils of the
Ring and Test relays and activate the relays by pulling down
the coil voltage to ground. The driver outputs are internally
clamped to V
by diodes to prevent the inductive voltage
CC
transient during relay turn-off from damaging the driver.
Relays attached to any voltage other than V
will not func-
CC
tion properly.
8
Page 9
Test Information
FIGURE 4. POWER SUPPLY CURRENT AND TIP AND RING VOLTAGE TEST CIRCUIT
PARAMETERINPUTMEASUREMENTSPECIFICATIONS
V
V
TIP
RING
TIP
RING
HC5520
R
TPS
100kΩ
50Ω
R
PT
R
PR
50Ω
100kΩ
R
RGS
TIPSEN
TIP
HC5520
RING
RINGSEN
T
R
X4W
C
VRX
R
X
0.47µF
100kΩ
X
I
CC
I
EE
I
BB
T
X
100kΩ
R
4W
C
VTX
0.47µF
V
RX
V
CC
V
EE
V
BAT
V
TX
Power Supply Current, I
Power Supply Current, I
Power Supply Current, I
V
TIP
V
RING
CC
EE
BB
VCC = +4.75 ~ +5.25VICC Direct MeasurementI
VEE = -4.75 ~ -5.25VIEE Direct MeasurementI
V
= -42 ~ -58VIBB Direct MeasurementI
BAT
V
BAT
V
BAT
R
TPS
TR
100kΩ
50Ω
R
PT
R
PR
50Ω
100kΩ
R
RGS
I
L
TIP
R
L
V
RING
V
TIPSEN
TIP
HC5520
RING
RINGSEN
V
Direct MeasurementV
TIP
Direct MeasurementV
RING
C
VRX
R
X
0.47µF
100kΩ
T
R
T
X4W
X
X
100kΩ
R
4W
C
VTX
0.47µF
V
RX
V
TX
CC
EE
BB
TIP
RING
FIGURE 5. LOOP CURRENT TEST CIRCUIT
PARAMETERINPUTMEASUREMENTSPECIFICATIONS
Loop Current, I
L
Short Circuit Loop CurrentV
V
and R
BAT
= -48V and RL= 100ΩV
BAT
L
V
TR
TR
IL = VTR/R
IL = VTR/R
9
L
L
Page 10
HC5520
R
TPS
>9kΩ
SW
2.4kΩ
TIP
RING
100kΩ
50Ω
R
R
50Ω
100kΩ
R
PT
PR
RGS
TIPSEN
TIP
HC5520
RING
RINGSEN
R
SHDO
T
X4W
X
T
X
FIGURE 6. SWITCH HOOK DETECTION TEST CIRCUIT
PARAMETERINPUTMEASUREMENTSPECIFICATIONS
On Hook ConditionSW = LeftSHDOSHDO = Hi
Off Hook DetectionSW = RightSHDOSHDO = Lo
R
X
100kΩ
100kΩ
R
4W
C
VRX
0.472µF
C
VTX
0.47µF
V
RX
V
TX
R
SW
SHDO
ON
OFF
SW
TPS
PT
PR
RGS
TIPSEN
TIP
HC5520
RING
RINGSEN
t
BREAK
ON-HOOK
t
MEAS
SHDO
T
X4W
t
PERIOD
R
X
T
X
100kΩ
TIP
R
L
RING
OFF-HOOKOFF-HOOK
OFF-HOOKOFF-HOOKON-HOOK
50Ω
R
R
50Ω
100kΩ
R
R
100kΩ
100kΩ
R
4W
t
MAKE
C
VRX
X
0.47µF
V
RX
C
VTX
0.47µF
V
TX
FIGURE 7. DIAL PULSE DISTORTION TEST CIRCUIT AND WAVEFORMS
PARAMETERINPUTMEASUREMENTSPECIFICATIONS
Percent BreakSW = On, Off, . . .t
Dial Pulse DistortionSW = On, Off, . . .t
BREAK
BREAK
and t
and t
PERIOD
10
PERIOD
and t
MEAS
Abs[(t
(t
BREAK/tPERIOD
- t
BREAK
MEAS
) x 100%
)/t
PERIOD
] x 100%
Page 11
1 REN
1600Ω
200Ω
HC5520
1kΩ
R
237kΩ
R
BL
TIPSEN
TIP
HC5520
RING
RINGSEN
RD
BAL
R
BL
R
TPS
100kΩ
TIP
50Ω
R
PT
20kΩ
3 REN
R
PR
SW
RING
50Ω
100kΩ
R
RGS
V
V
RINGING
BAT
FIGURE 8. RING TRIP DETECTION TEST CIRCUIT
R
BH
R
SHDO
C
RTD
T
T
X4W
R
BH
237kΩ
C
VRX
R
X
0.47µF
100kΩ
X
C
RTD
1µF
V
RX
-5V
C
VTX
0.47µF
X
V
TX
100kΩ
R
4W
PARAMETERINPUTMEASUREMENTSPECIFICATIONS
No Ring Trip DetectionSW = UpSHDOSHDO = Hi
Ring Trip DetectionSW = DownSHDOSHDO = Lo
R
TIP
V
T
1800Ω
V
R
RING
POLARITY REVERSAL COMMAND
V
T
TPS
100kΩ
50Ω
R
PT
R
PR
50Ω
100kΩ
R
RGS
TIPSEN
TIP
HC5520
RING
RINGSEN
T
R
PRI
T
X4W
X
X
t
RX
100kΩ
100kΩ
R
4W
REV
90%
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
V
R
90%
FIGURE 9. POLARITY REVERSAL TIME TEST CIRCUIT AND WAVEFORMS
PARAMETERINPUTMEASUREMENTSPECIFICATIONS
Polarity Reversal TimeReversal Commandt
REV
t
REV
11
Page 12
HC5520
R
TPS
PT
PR
RGS
TIPSEN
TIP
HC5520
RING
RINGSEN
T
R
T
X4W
X
X
600Ω
TIP
V
TR
RING
100kΩ
50Ω
R
R
50Ω
100kΩ
R
FIGURE 10. 4W TO 2W TRANSMISSION TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETERINPUT AT VRXMEASUREMENTSPECIFICATIONS AT 600Ω
Absolute Receive Gain, AGR0dBm0 at 1020HzVTR at 1020HzAGR = 20log(VTR/VRX)
Receive Frequency Response0dBm0 at FreqVTR at Freq20log(VTR/VRX) - AGR
Receive Gain TrackingLevel at 1020HzVTR at 1020Hz20log(VTR/Level) - AGR
Receive Signal to DistortionLevel at 1020HzVTR at 2nd to 5th Harmonics20log(Level/VTR)
R
X
100kΩ
100kΩ
R
4W
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
Receive Idle Channel Noise0V
TIP
600Ω
V
AC
RING
RMS
R
TPS
100kΩ
50Ω
R
PT
R
PR
50Ω
100kΩ
R
RGS
TIPSEN
TIP
HC5520
RING
RINGSEN
T
R
X4W
V
TR
C
VRX
R
X
0.47µF
100kΩ
X
C
VTX
T
X
100kΩ
0.47µF
R
4W
20log(VTR/0.7746V
V
RX
V
TX
FIGURE 11. 2W TO 4W TRANSMISSION TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETERINPUT AT V
AC
MEASUREMENTSPECIFICATIONS AT 600Ω
Absolute Transmit Gain, AGT2x(0dBm0) at 1020HzVTX at 1020HzAGT = 20log(VTX/0.7746V
Transmit Frequency Response2x(0dBm0) at FreqVTX at Freq20log(VTX/0.7746V
RMS
Transmit Gain Tracking2x(Level) at 1020HzVTX at 1020Hz20log(VTX/Level) - AGT
)
RMS
RMS
) - AGT
)
Transmit Signal to Distortion2x(Level) at 1020HzVTX at 2nd to 5th Harmonics20log(Level/VTX)
Transmit Idle Channel Noise0V
RMS
V
TX
20log(VTX/0.7746V
12
RMS
)
Page 13
HC5520
R
TPS
600Ω
V
AC
100kΩ
TIP
Z
L
V
TR
RING
50Ω
R
R
50Ω
100kΩ
R
PT
PR
RGS
Z
S
TIPSEN
TIP
HC5520
RING
RINGSEN
T
R
X4W
X
T
X
FIGURE 12. 2W RETURN LOSS TEST CIRCUIT - NORMAL AND REVERSE MODES
DEFINITION : 2W Return Loss = 20 log[(ZS + ZL) / Abs(ZS - ZL)]. Where ZS is the source impedance and ZL is the load impedance.
R
X
100kΩ
100kΩ
R
4W
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
PARAMETERINPUT AT V
AC
2W Return Loss0dBm0 at FreqV
R
TPS
PT
PR
RGS
TIPSEN
TIP
HC5520
RING
RINGSE
N
T
X4W
600Ω
TIP
RING
100kΩ
50Ω
R
R
50Ω
100kΩ
R
MEASUREMENTSPECIFICATIONS FOR 600Ω
at Freq20log[VAC/Abs(2xVTR- VAC)]
TR
C
R
100kΩ
R
X
T
X
100kΩ
R
4W
VRX
X
0.47µF
C
0.47µF
VTX
V
RX
100kΩ
100kΩ
V
TX
1MΩ
-
+
50kΩ
FIGURE 13. 4W TO 4W INSERTION LOSS AND TRANSHYBRID BALANCE - NORMAL AND REVERSE MODES
PARAMETERINPUT AT V
RX
4W to 4W Insertion Loss0dBm0 at FreqV
Transhybrid Balance0dBm0 at FreqV
R
TPS
100kΩ
600Ω
TIP
V
TR
RING
50Ω
R
PT
R
PR
50Ω
100kΩ
R
RGS
FIGURE 14. RECEIVE OVER LOAD LEVEL AT 4W AND 2W TEST CIRCUIT - NORMAL AND REVERSE MODES
MEASUREMENTSPECIFICATIONS FOR 600Ω
at Freq20log[VRX/VTX]
TX
at Freq20log[VRX/V
THB
C
VRX
R
TIPSEN
TIP
HC5520
RING
RINGSEN
T
R
T
X4W
X
0.47µF
100kΩ
X
X
100kΩ
R
4W
C
VTX
0.47µF
V
RX
V
TX
V
THB
THB
] + 20dB
INPUT AT VRX
AT 1kHz
= 2.50V
V
RX
PEAK
SLIC OUTPUT
IMPEDANCE
SLIC
VOLTAGE GAINMEASUREMENT
SPECIFICATION
AT 600Ω
600Ω0dBVTR at 2nd to 5th Harmonics20log(VTR/VRX)
13
Page 14
HC5520
R
TPS
600Ω
V
AC
I
L
TIP
100kΩ
50Ω
R
V
TR
R
RING
50Ω
100kΩ
R
PT
PR
RGS
TIPSEN
TIP
HC5520
RING
RINGSEN
T
R
X4W
X
T
X
FIGURE 15. TRANSMIT OVER LOAD LEVEL AT 2W AND 4W TEST CIRCUIT - NORMAL AND REVERSE MODES
R
X
100kΩ
100kΩ
R
4W
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
INPUT AT V
AT 1kHz
VAC = 2x(2.15V
AC
)600Ω0dBVTRand VTX at
PEAK
SLIC OUTPUT
IMPEDANCE
I
LONG
SLIC TRANSMIT
GAINMEASUREMENTSPECIFICATION AT 600Ω
R
100kΩ
TIP
TPS
50Ω
368Ω
368Ω
V
T
V
R
RING
V
2.16µF
AC
I
LONG
R
PT
R
PR
50Ω
100kΩ
R
RGS
FIGURE 16. LONGITUDINAL IMPEDANCE TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETERINPUTMEASUREMENTSPECIFICATIONS
Longitudinal Impedance, Tip SideVAC = 0dBm0 at FreqI
Longitudinal Impedance, Ring SideVAC = 0dBm0 at FreqI
2nd to 5th Harmonics
R
TIPSEN
TIP
R
HC5520
RING
RINGSEN
LONG
(rms) and VR(rms)Z
LONG
T
T
X4W
(rms) and VT(rms)Z
X
100kΩ
X
X
100kΩ
R
4W
20log[VTR/(VAC/2)]
and 20log[VTX/(VAC/2)]
C
VRX
0.47µF
V
RX
C
VTX
0.47µF
V
TX
LONG
LONG
= VT/I
= VR/I
LONG
LONG
R
TRIANGULAR
WAVEFORM
TPS
PT
TIPSEN
TIP
R
SHDO
X
I
LONG
TIP
100kΩ
50Ω
V
AC
2.16µF
20µF
R
HC5520
R
PR
50Ω
100kΩ
R
RGS
RING
RINGSEN
T
T
X4W
X
I
LONG
20µF
RING
R
X
100kΩ
100kΩ
R
4W
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
FIGURE 17. ON-HOOK LONGITUDINAL CURRENT LIMIT TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETERINPUTMEASUREMENTSPECIFICATIONS
Longitudinal Current LimitVAC at Freq, I
LONG
= 15mA
PEAK
SHDOSHDO = Hi
14
Page 15
HC5520
R
TPS
50Ω
R
PT
PR
50Ω
RGS
TIPSEN
TIP
HC5520
RING
RINGSEN
T
R
X4W
X
T
X
I
LONG
AC
2.16µF
I
LONG
V
368Ω
368Ω
TIP
V
R
RING
100kΩ
R
100kΩ
R
FIGURE 18. 2W AND 4W LONGITUDINAL BALANCE TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETERINPUTMEASUREMENTSPECIFICATIONS
2W Longitudinal BalanceVAC= 0dBm0 at FreqVTR at Freq20log(VAC/VTR)
4W Longitudinal BalanceVAC= 0dBm0 at FreqVTX at Freq20log(VAC/VTX)
R
X
100kΩ
100kΩ
R
4W
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
R
600Ω
TIP
V
TR
RING
TPS
100kΩ
50Ω
R
PT
R
PR
50Ω
100kΩ
R
RGS
TIPSEN
TIP
HC5520
RING
RINGSEN
T
R
X4W
X
T
X
R
X
100kΩ
100kΩ
R
4W
C
VRX
0.47µF
V
AC
C
VTX
0.47µF
V
RX
V
CC
V
EE
V
BB
V
TX
FIGURE 19. OFF HOOK PSRR 4W AND 2W TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETERINPUTMEASUREMENTSPECIFICATIONS
PSRR V
PSRR V
PSRR VCC to 4WVCC = +5V + V
PSRR VCC to 2WVCC = +5V + V
PSRR VEE to 4WVEE = -5V + V
PSRR VEE to 2WVEE = -5V + V
to 4WV
BAT
to 2WV
BAT
= -48V + V
BAT
= -48V + V
BAT
AC
AC
AC
AC
AC
AC
VTX at Freq20log(VAC/VTX) at Freq
VTR at Freq20log(VAC/VTR) at Freq
VTX at Freq20log(VAC/VTX) at Freq
VTR at Freq20log(VAC/VTR) at Freq
VTX at Freq20log(VAC/VTX) at Freq
VTR at Freq20log(VAC/VTR) at Freq
15
Page 16
HC5520
Pin Descriptions
MQFPPLCCSYMBOLDESCRIPTION
17R
28AGNDAnalog ground pin. This pin must be tied to the BGND and RGND pins.
39 T
410T
X4W
511KZO2W impedance setting pin, connecting a network K(ZL) between KZO pin and AGND will program the 2W
2328RINGSEN Ring sense input pin.
2429R
2530R
2631C
RTD
2732RDRing relay driver pin, open collector output. Diode protected internally.
2833TBTest access relay driver pin, open collector output. Diode protected internally.
2934TATest access relay driver pin, open collector output. Diode protected internally.
3035RGNDRelay driver ground current return pin. This pin must be tied to the AGND and BGND pins.
3136V
3237NCNo connect.
3338NCNo connect.
3439NCNo connect.
40NCNo connect.
3541TAITA Relay Driver Control Input.
3642TBITB Relay Driver Control Input.
3743RCIRD Relay Driver Control Input.
3844PRILoop Feed Polarity Control Input.
391PDILoop Feed Control Input.
402NCNo connect.
413NCNo connect.
424TSDOThermal Shutdown Indicator Output.
435SHDOOff Hook Detect Indicator Output.
446NCNo connect.
4W receive input pin, a ground referenced current sense input.
X
4W transmit output pin, a ground referenced voltage source.
X
Transmit gain setting pin - connecting a resistor between T
X4W
impedance to be ZL.
Resistor divider pin for ZO, in conjunction with KZO it defines the 2W impedance.
N
Half battery voltage reference pin.
P
Negative power supply pin, VEE = -5V at 5%.
EE
Power sharing resistor ground side connection pin.
Power sharing resistor Tip side connection pin.
Power sharing resistor Ring side connection pin.
Power sharing resistor battery side connection pin.
Battery power supply pin, V
Ring trip amplifier ground side sense input pin.
BH
Ring trip amplifier line side sense input pin.
BL
= -42V to -58V.
BAT
Ring trip capacitor pin.
Positive power supply pin, VCC = +5V at 5%.
CC
and TX establishes the 2W to 4W gain.
16
Page 17
Typical Application Circuit Diagram
R
BH
237KΩ
R
BAL
TIP
RING
TEST
ACCESS
RELAY
RING
RELAY
TO RING
GENERATOR
±5V GND
BATTERY GND
1KΩ
+5V
+5V
-5V
-48V
R
BL
237KΩ
R
TPS
100KΩ
50Ω
R
PT
SURGECTOR
R
PR
50Ω
100KΩ
R
RGS
R
PST
910Ω
910
910Ω
R
PSR
RELAY
RELAY
RELAY
0.1µF
0.1µF
0.1µF
0.1µF
HC5520
R
BH
R
BL
TIPSEN
TIP
RING
RINGSEN
R
PSG
R
PST
R
PSR
R
PSB
TA
TB
RD
RGND
V
CC
AGND
V
EE
BGND
V
BAT
HC5520
R
T
X4W
T
R
K
ZO
C
C
DC
C
RTD
R
DC
SHDO
TSDO
TAI
TBI
RCI
PDI
PRI
R
X
0.47µF
X
100KΩ
V
RX
CVRX
100KΩ
C
R
X
N
4W
R
N
6.49KΩ
R
KZO
VTX
0.47µF
V
TX
15.4KΩ
R
CP
P
200Ω
C
DC
C
1µF
P
-5V
4.7µF
C
RTD
1µF
2.15KΩ
R
DC
+5V
GROUND PLANE
EARTH GROUND
NOTE: The HC5520 application circuit is configured to provide a receive gain of 0dB, a transmit gain of 0dB, and a synthesized 2W impedance of 593Ω. Note, the value of R
1. Controlling dimension: INCH. Converted millimeter dimensions
are not necessarily exact.
2. Dimensions and tolerancing per ANSI Y14.5M-1982.
3. Dimensions D1 and E1 do not include mold protrusions. Allowable mold protrusion is 0.010 inch (0.25mm) per side.
4. To be measured at seating plane contact point.
-C-
5. Centerline to be determined where center leads exit plastic body.
6. “N” is the number of terminal positions.
All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Harris Semiconductor products are sold by description only. Harris Semiconductor reser ves the right to make changes in circuit design and/or specifications at
any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is
believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other
rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.
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For general information regarding Harris Semiconductor and its products, call 1-800-4-HARRIS
NORTH AMERICA
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