Datasheet HC5520 Datasheet (Intersil Corporation)

Page 1
April 1997
SEMICONDUCTOR
HC5520
CO/PABX Polarity Reversal
Subscriber Line Interface Circuit
Features
• Normal and Reversed DC Feed
• Ringing, Test-In, and Test-Out Relay Drivers
• Thermal Shutdown Protection with Alert Signal
• On-Hook Transmission
• Selectable Transmit and Receive Gain Setting
• Selectable 2-Wire Impedance Matching
• Zero Crossing Ring Trip Detection and Ring Relay Release
• Parallel Digital Control and Status Monitoring
• Protection Resistors Inside Feedback Loop Allows the Use of PTC Devices Without Impact on Longitudinal Balance
• Thermal Management Features
Applications
• CO/PABX Line Circuits
Description
The HC5520 is a Monolithic Subscriber Line Interface Circuit (SLIC) for Analog Subscriber Line cards in Central Office and PABX switches.
The HC5520 provides a comprehensive set of features for these applications including loop reversal, zero crossing ringing relay operation, long loop drive and a mutually inde­pendent setting of the receive and transmit gains, and the two wire impedance synthesis. Advanced power manage­ment features combined with a small 44 lead MQFP pack­age allow significant board space to be freed up for additional line circuits.
The HC5520 is fabricated in a Harris state-of-the-art Bonded Wafer High Voltage process, providing freedom from tradi­tional JI latch-up phenomena without the use of additional power supply filtering components or substrate tie connec­tions. The very low parasitics and leakages associated with this process provide an exceptionally flat performance over frequency and temperature.
Ordering Information
TEMP.
PART NUMBER
HC5520CQ 0 to 70 44 Ld MQFP Q44.10x10 HC5520CM 0 to 70 44 Ld PLCC N44.65
RANGE (oC) PACKAGE PKG. NO.
Block Diagram
R
TXT
X
TA TB
TSDO
SHDO
PRI PDI RCI
TBI TAI
AGND BGND RGND
V
BAT
V
CC
V
EE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
© Harris Corporation 1997
TEST CONTROL
LOGIC
BIAS
BATTERY
REFERENCE
C
P
4-WIRE INTERFACE / Z
HC5520
MANAGEMENT
C
R
DC
DC
1
R
X4W
INTERFACE
N
2-WIRE
RING
CONTROL
POWER
K
ZO
0
TIP TIPSEN RINGSEN RING
RD R
BH
R
BL
C
RTD
R
PSB
R
PSR
R
PST
R
PSG
File Number 4148.2
Page 2
HC5520
Absolute Maximum Ratings (Note 1) Thermal Information
VCC to AGND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
VEE to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V
V
to BGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80V
BAT
AGND to BGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3V
Digital Pins to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
ESD Withstand (Human Body Model) . . . . . . . . . . . . . . . . . . . 500V
Operating Conditions
Temperature Range
HC5520CQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC
HC5520CM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Recommended Operating Conditions
For maximum integrity, nominal operating conditions should be selected so that operation is always within the following ranges:
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Battery Supply V Positive Supply V Negative Supply V Ringing Supply V Loop Resistance R Ambient Temperature T Die Temperature T
BAT
CC EE
RINGING
L A D
Thermal Resistance (Typical, Note 1) θJA (oC/W)
MQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
PLCC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Maximum Power Dissipation
MQFP package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.21W
PLCC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.74W
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . 150
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(Lead tips only)
-42 -48 -58 V
4.75 5 5.25 V
-4.75 -5 -5.25 V 60 75 90 V
DC DC DC
RMS
200 - 1800
02570
- - 150
o
C
o
C
o
Electrical Specifications Unless Otherwise Specified: Typical Parameters are at T
= 25oC, VCC = +5V, VEE = -5V, V
A
BAT
= -48V,
AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parame­ters are Specified at 6002-Wire Terminating Impedance with 0dB transmit and receive gain.
CONDITIONS
PARAMETER
BAT
OTHER
CONDITIONS
FREQ/
LEVEL
MIN TYP MAX UNITSMODE LOAD V
POWER SUPPLY CURRENTS (Figure 4)
I
I
I
CC
EE
BB
normal
reverse
p’down normal
reverse
p’down normal
reverse
p’down
Open -48V VCC = 5V 5.0
6.0
2.0
Open -48V VEE = -5V -6.0
-7.0
-3.0
Open -48V VCC = 5V,
VEE = -5V
-7.0
-7.0
-1.0
8.0
8.9
3.7
-3.6
-4.9
-1.7
-4.2
-4.0
-0.4
11.0
12.0
5.5
-2.0
-3.0
-0.7
-2.0
-2.0
0.0
mA mA mA
mA mA mA
mA mA mA
THERMAL SHUTDOWN
Thermal Shutdown Temperature, Die Temperature
normal
reverse
-48V - 150 -
o
C
BATTERY FEED CHARACTERISTICS - 2W VOLTAGES (Figure 4)
V
TIP
normal
reverse
Open -48V -5.50
-46.00
-4.16
-43.60
-2.46
-42.00VV
2
Page 3
HC5520
Electrical Specifications Unless Otherwise Specified: Typical Parameters are at T
= 25oC, VCC = +5V, VEE = -5V, V
A
BAT
= -48V,
AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parame­ters are Specified at 6002-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued)
CONDITIONS
V
RING
V
TIP
V
RING
PARAMETER
normal
reverse
normal
reverse
normal
reverse
OTHER
BAT
CONDITIONS
Open -48V -45.54
Open -42V -5.00
Open -42V -39.54
FREQ/
LEVEL
MIN TYP MAX UNITSMODE LOAD V
-6.00
-40.00
-5.00
-43.80
-4.26
-3.68
-38.12
-38.34
-3.78
-42.50
-2.00
-2.46
-37.00VV
-37.00
-2.00
V V
V V
BATTERY FEED CHARACTERISTICS - LOOP CURRENT (Figure 5)
Normal Loop Current normal
reverse
Normal Loop Current normal
reverse
Short Circuit Loop Current Limit normal
reverse
1800 -42V 14.5
14.5
1800 -48V 18.0
18.0
100 -48V 22.0
22.0
16.5
16.3
18.8
18.6
26.4
27.0
19.0
19.0mAmA
22.0
22.0mAmA
42.0
42.0mAmA
LOOP SUPERVISION - SWITCH HOOK DETECTION (Figure 6)
Off-Hook Detection normal
-48V 2.4K 4.6K 9K
reverse
LOOP SUPERVISION - DIAL PULSE DISTORTION (Figure 7)
Dial Pulse Distortion normal 100 -58V 25 Dial Pulse Distortion normal 1800 -42V 25
o
C - 0.1 3 %
o
C - 0.1 3 %
LOOP SUPERVISION - RING TRIP DETECTION (Figure 8)
Ring Trip Detect Ringing 1800
+1REN
Ring Trip Non-Detect Ringing 3REN//
20K
60V
90V
-42V
RMS
-58V
RMS
- - 150 ms
20K - -
LOOP SUPERVISION - POLARITY REVERSAL TIME (Figure 9)
Polarity Reversal Time normal
1800 -42V - 0.04 10 ms
to
reverse
Polarity Reversal Time reverse
1800 -42V - 0.04 10 ms
to
normal
LOOP SUPERVISION - DIGITAL INTERFACE
Input Low Voltage, V Input High Voltage, V Input Low Current, I Input High Current, I Output Low Voltage, V Output High Voltage, V
IL
IH
IL
IH
OL
OH
Relay Driver Output Low Voltage, V Relay Driver Output High Current, I
All Digital Inputs - - 0.8 V All Digital Inputs 2.0 - - V AGND < VIN < V VIH < VIN < V
CC
IL
-20 - - µA
- 0 +10 µA 1 LSTTL Load - - 0.4 V 1 LSTTL Load 2.4 - - V
OLVCC
OHVCC
= 4.75V, Load = 35mA - 0.4 0.8 V = 5.25V - - 10 µA
3
Page 4
HC5520
Electrical Specifications Unless Otherwise Specified: Typical Parameters are at T
AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parame­ters are Specified at 6002-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued)
CONDITIONS
PARAMETER
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE RECEIVE GAIN (Figure 10)
Absolute Receive Gain, ARG normal
reverse
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE FREQUENCY RESPONSE (Figure 10)
Receive Frequency Response Relative to ARG
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE GAIN TRACKING (Figure 10)
Receive Gain Tracking Relative to ARG
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE SIGNAL TO DISTORTION (Figure 10)
Receive Signal to Distortion and Noise
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE IDLE CHANNEL NOISE (Figure 10)
Idle Channel Noise normal
TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE TRANSMIT GAIN (Figure 11)
Absolute Transmit Gain, ATG normal
TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE FREQUENCY RESPONSE (Figure 11)
Transmit Frequency Response Relative to ATG
TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE GAIN TRACKING (Figure 11)
Transmit Gain Tracking Relative to ATG
TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE SIGNAL TO DISTORTION (Figure 11)
Transmit Signal to Distortion and Noise
TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE IDLE CHANNEL NOISE (Figure 11)
Idle Channel Noise normal
TRANSMISSION PARAMETERS - 2-WIRE RETURN LOSS (Figure 12)
2-Wire Return Loss normal
TRANSMISSION PARAMETERS - 4-WIRE TO 4-WIRE INSERTION LOSS (Figure 13)
4-Wire to 4-Wire Insertion Loss normal
TRANSMISSION PARAMETERS - TRANSHYBRID BALANCE (Figure 13)
Transhybrid Balance normal
normal
reverse
normal
reverse
normal
reverse
reverse
reverse
normal
reverse
normal
reverse
normal
reverse
reverse
reverse
reverse
reverse
600 -48V 1020Hz
600 -48V 300 to 3.4kHz 0dBm -0.15 0 +0.15 dB
600 -48V +3 to -40dBm0
600 -48V +3 to -40dBm0
600 -48V P-Message 73 78 -
600 -48V 1020Hz
600 -48V 300 to 3.4kHz 0dBm -0.2 -0.04 +0.2 dB
600 -48V +3 to -40dBm0
600 -48V +3 to -40dBm0
600 -48V P Message 73 78 - dB
600 -48V R
600 -48V 1020Hz
600 -48V 1020Hz
BAT
OTHER
CONDITIONS
-40 to -50dBm0
-40 to -50dBm0
-40 to -50dBm0
-40 to -50dBm0
= 6490
N
KZO = 15400
= 25oC, VCC = +5V, VEE = -5V, V
A
FREQ/
LEVEL
0dBm
1020Hz -0.12
1020Hz 33
0dBm
1020Hz -0.12
1020Hz 33
1020Hz
0dBm
0dBm
0dBm
MIN TYP MAX UNITSMODE LOAD V
-0.2 0 +0.2 dB
0
-
-
-0.2 -0.07 +0.2 dB
-
-
30 45 - dB
-0.2 -0.02 +0.2 dB
30 38 - dB
0
38 33
0
0.02
38 33
= -48V,
BAT
+0.12-dB
dB
-
dB
-
dB
dBm0P
+0.12-dB
dB
-dB dB
4
Page 5
HC5520
Electrical Specifications Unless Otherwise Specified: Typical Parameters are at T
= 25oC, VCC = +5V, VEE = -5V, V
A
BAT
= -48V,
AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parame­ters are Specified at 6002-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued)
CONDITIONS
PARAMETER
BAT
OTHER
CONDITIONS
FREQ/
LEVEL
MIN TYP MAX UNITSMODE LOAD V
TRANSMISSION PARAMETERS - 4-WIRE TO 4-WIRE ABSOLUTE DELAY
Absolute Delay normal
reverse
600 -48V 1020Hz
0dBm
1.5 µs
TRANSMISSION PARAMETERS - OVER LOAD LEVEL (Figures 14, 15)
Receive Over Load Level at 4W and 2W
Transmit Over Load Level at 2W and 4W
normal
reverse
normal
reverse
600 -42V 1% THD 1020Hz 2.5 - - V
600 -42V 1% THD 1020Hz 2.15 - - V
PEAK
PEAK
TRANSMISSION PARAMETERS - LONGITUDINAL IMPEDANCE (Figure 16)
Longitudinal Impedance per Wire normal
reverse
- -48V 40Hz to 100Hz
-50-
TRANSMISSION PARAMETERS - LONGITUDINAL CURRENT CAPABILITY (Figure 17)
Longitudinal Current Limit per Wire normal
reverse
- -42V Triangle
Waveform
40Hz to
100Hz
15 - - mA
PEAK
TRANSMISSION PARAMETERS - LONGITUDINAL BALANCE (Figure 18)
2-Wire Longitudinal Balance normal
reverse
4-Wire Longitudinal Balance normal
reverse
368 +
368
368 +
368
-48V 300Hz 1020Hz 3400Hz
-48V 300Hz 1020Hz 3400Hz
42 48 48
42 48 48
62.2
58.7
69.5
66.0
67.2
77.0
-dB dB dB
-dB dB dB
POWER SUPPLY REJECTION RATIO (Figure 19)
PSRR V
PSRR V
PSRR V
PSRR V
PSRR V
PSRR V
To 4-Wire normal
BAT
To 2-Wire normal
BAT
To 4-Wire normal
CC
To 2-Wire normal
CC
To 4-Wire normal
EE
To 2-Wire normal
EE
reverse
reverse
reverse
reverse
reverse
reverse
600 -48V V
600 -48V V
= -48V +
BAT
100mV
= -48V +
BAT
100mV
RMS
RMS
600 -48V VCC = 4.75V +
100mV
RMS
600 -48V VCC = 4.75V +
100mV
RMS
600 -48V VEE = -4.75V +
100mV
RMS
600 -48V VEE = -4.75V +
100mV
RMS
300Hz 30 42 - dBC
300Hz 30 42 - dBC
300Hz 20 33 - dBC
3420Hz 20 24 - dBC
2500Hz 20 30 - dBC
2500Hz 20 32 - dBC
5
Page 6
HC5520
Circuit Operation and Design Information
The HC5520 is a current feed voltage senseSubscriberLine Interface Circuit (SLIC). It provides extensive digitally con-
trolled supervisory functions, DC loop feed functions, and user selectable 2 wire impedance matching functions.
Modes of Operation
The HC5520 has seven possible modes of operation. These modes of operation are either controlled by the digital control inputs to the SLIC or controlled by the loop status output of the SLIC. The modes of operation and the function of the digital control inputs are given in Table 1.
TABLE 1.
SLIC
OPERATION MODE
Normal Loop Feed
Reverse Loop Feed
Loop Powerdown
Ringing Ringing Ring trip
Test out Test-out Normal TAI = Low Test in Test-in Normal TBI = Low Thermal
Shut Down
Normal Normal PRI = High
Reverse Normal PRI = Low
P’down Loop
TSD Loop
FUNCTION
power down
detection only
Powerdown
Normal Loop Feed Mode
When PDI = 1, setting the PRI to a logic “1” places the SLIC in the Normal Loop Feed mode. This is the normal opera­tional mode of the SLIC. With a nominal battery supply of ­48V and an on-hook condition, the voltage at the Tip termi­nal will be approximately 8% of the battery supply voltage. In this case the Tip voltage is about -3.8V. Similarly, the voltage at the Ring terminal will be approximately 92% of the battery supply voltage or about -44.2V.
In the Normal mode the Tip voltage is more positive than the Ring voltage; therefore, in an off-hook condition, the DC loop current flows from Tip to Ring. The loop feeding characteristics will be given in the battery feed section. All of the specifications applicable to this mode of operation are provided in the electrical specifications portion of the HC5520 data sheet.
Reverse Loop Feed Mode
When PDI = 1, setting the PRI to a logic “0” places the SLIC in the Reverse Loop Feed mode. In this mode, the Ring ter­minal voltage is more positive than the Tip terminal voltage. Thus, in an off-hook condition, the DC loop current flows from Ring to Tip. The loop feeding characteristics in the Reverse mode are the same as in the Normal mode. All of
CONTROL
INPUTS
PDI = Low
RCI = Low
the specifications applicable to this mode of operation are provided in the electrical specifications portion of the HC5520 data sheet.
Battery Feed
The HC5520 is designed to provide a 300 resistive feed (150 per wire) for long loop applications. It will supply a DC loop feed current of 18mA into an 1800 loop at the nominal battery supply of -48V. At shorter loop lengths or higher bat­tery supply voltages, the DC feed is current-limited to nomi­nally 26mA in order to conserve power. For internal chip power management purposes, external power sharing resis­tors are used to provide some of the DC loop current. This allows a substantial amount of the power to be dissipated off the chip, particularly in short loop applications. A typical loop feeding characteristic for Normal and Reverse Loop Feed Modes of operation is shown in Figure 1.
I
LOOP
30
mA
20
10
600
800 1.0K 1.2K 1.4K 1.6K 1.8K 2.0K 2.2K 2.4K
FIGURE 1. BATTERY FEED CHARACTERISTICS
R
LOOP
Loop Supervision - Switch Hook Detection
The Loop Supervision circuit operates in the Normal and Reverse Loop Feed modes. The DC loop current is moni­tored and the off-hook condition is indicated when the loop resistance is less than 2.4k. When this occurs, the SHDO output will be set to a logic low in order to signal the system that an off-hook condition exists. If the subscriber is using a rotary dial telephone, the system can monitor the dial pulses through the SHDO output.
Ringing - Ring Trip Detection Mode
The ringing voltage is cadenced to a subscriber loop by applying a logic signal to the Rci input. When a logic “0” is received at the RCI input, the HC5520 will set the RD output to low and thus pull current through the ring relay coil and energize the ring relay. This causes the subscriber’s tele­phone to begin ringing. At this time the ringing current through the ring ballast resistor is monitored to determine whether an off-hook condition is present. Once the sub­scriber goes off-hook, the ring trip circuit will turn off the ring relay after the next occurrence of a zero net current flow through the ring ballast resistor. At the same time, the SHDO output will be set to a logic low to indicate the ring trip detec-
6
Page 7
HC5520
tion. The ring relay can not be reenergized until the system acknowledges that a ring trip has occurred. Acknowledg­ment is achieved by setting the RCI to a logic high.
If the subscriber goes off-hook during the silent portion of the ringing cadence, the off-hook condition is detected in the same manner as a switch hook detection. The SHDO output will be set to a logic low in order to indicate that the sub­scriber has answered the call and that ringing of the line should cease.
Loop Power Down Mode
Under any condition when PDI is set to a logic “0”, the SLIC will power down the two wire loop. Dur ing loop power down, the voltages at Tip and Ring are both collapsed to one-half of the battery voltage and the outputs of the Tip and Ring feed amplifiers are in a high impedance state. Therefore all of the supervisory functions and transmission functions are disabled. The HC5520 will resume normal operation once the loop power down command is removed.
Thermal Shutdown Mode
The SLIC will power down the loop by itself once the temperature of the SLIC die reaches 150
o
C. During this thermal shutdown condition, both TSDO and SHDO outputs will be set to a default logic low to indicate the condition. The supervisory functions and transmission functions are disabled. Once the SLIC die temperature drops 10
o
C lower than the thermal shutdown temperature, the SLIC will resume operation.
Test-Out and Test-In Modes
Two additional relay drivers are provided for test-out and test-in functions. Unlike the ring relay driver circuit, these relay drivers are operated independently of the rest of the HC5520 circuitry. The designation of test-out and test-in is purely arbitrary. When desired, the subscriber’s loop condi­tion can be interrogated through the test-out relay. Likewise, through the test-in relay, the various SLIC functions and sig­nal integrity can be examined.
Hybrid Transmission Model
Figure 2 shows a simplified model for bidirectional signal transmission and 2-wire impedance synthesis. The term R external 100k sense resistors R
used in the equations below refers to the pair of
SENSE
TPS
and R
RGS
. The HC5520 architecture gives the user the flexibility to set the gains and 2-wire impedance with external resistors and resistor ratios. However, to prevent adversely affecting other SLIC control functions, the value of R
SENSE
should always
be selected to be 100k.
2W Impedance
The 2W impedance is the AC input impedance synthesized by the SLIC between the Tip and Ring terminals and will be referred to as ZO. The value of ZO is user programmable by varying the value R less than 7k. Z
and Z
N
can be either a real resistance or a
KZO
. RN is recommended to be
KZO
complex impedance network. ZO is determined by the fol­lowing equation:
R
SENSEZKZO
Z
-------------------------------------------------=
O
where R
SENSE
400 RN•
is constrained to be 100k.
4W to 2W Gain
The signal level voltage gain from the 4-wire analog input (RX) to the 2-wire VTR voltage is user programmable using the following equation:
R
SENSE
42
-----------------------------=
R
X
is constrained to be 100kΩ. The SLIC has a
SENSE
A
where R built-in +6.02dB gain to compensate for the divider effect of matching the load impedance, making it transparent to the user.
2W to 4W Gain
The signal level v oltage gain from the Tip and Ring terminals (V
) to the output of the 4-wire signal amplifier (R4W) is
TR
user programmable using the following equation:
R
A
24
4W
--------------------------=
R
SENSE
Transhybrid Balance
Functionally, when a voice signal is received at V
RX
a cur­rent which is proportional to the voice signal will pass through the SLIC 4 wire input R
pin. This voice input cur-
X
rent will be amplified and inverted to drive the load across the Tip and Ring. The AC voltages at Tip and Ring are fed back to the SLIC and reproduced as the transmit signal at the T
pin. This received voice signal returned from 2 wire
X
side of the SLIC will have the same amplitude as the received AC signal but will be 180 degrees out of phase. This signal needs to be eliminated from transmission to pre­vent far end echo.
The most common way of implementing the transhybr id bal­ance function is to use the analog voice input amplifier in the Combo as a summing amplifier. The circuit connections are as shown in Figure 3. Notice that the input impedance net­works for both received signal and returned signal are bas­cally the same, if the 62pF capacitor were not added. The addition of the 62pF capacitor to ground is to compensate for the phase shift of the returned signal to achieve 15dB or more improvement in the 2k to 4kHz frequency band as compared to the data collected from the test circuit.
Sensitive Pins Tipsen, Ringsen Pins - These pins are very low imped-
ance virtual grounds used for providing feedback current to the HC5520 DC, AC, and Longitudinal control loops. Para­sitic capacitance on these pins from the PC board layout and external components should be minimized to prevent oscillation.
7
Page 8
HC5520
V
I
HC5520
KZO
A2
-
+
I
I
RS
TS
I
RX
TR
A = 400
TIP
I
R
TPS
I
L
Z
L
+
E
G
R
RGS
TS
I
RS
-
A = 400
RING
2xI
RX
I
KZO
I
I
RS
TS
FIGURE 2. SIMPLIFIED AC TRANSMISSION CIRCUIT
C
VRX
0.47µF
X
0.47µF
C
VTX
0.47µF
V
RX
50k
V
TX
600
TIP
RING
R
TPS
100k
R
PT
50
R
PR
50
R
RGS
100k
TIPSEN TIP
HC5520
RING RINGSEN
T
X4W
R
X
R
100k
R
4W
100k
T
X
FIGURE 3. TRANSHYBRID BALANCE CIRCUIT WITH HIGH AND LOW FREQUENCY COMPENSATION
A1
+
-
62pF
I
KZO
50k
100k
R
4W
R
X
R
N
Z
KZO
100k
-
+
VOICE INPUT
AMPLIFIER
+
V
TX
-
+
V
RX
-
Pin - The 2-wire impedance that is synthesized by the
K
ZO
HC5520 is a direct function of the network connected to this pin (see equations). Parasitic capacitance and inductance from the PC board layout and the external components is magnified by the same K factor that is utilized to synthesize the 2-wire impedance. Excessive parasitics can cause inser­tion loss and return loss degradation, especially at higher voice band frequencies. Good PC board layout techniques and proper component selection can minimize these effects to a negligible level.
R
Pin - This pin connects an external resistor to the input
N
of an internal buffer. The value of this resistor is user speci­fied based upon the impedance desired at the 2-wire inter­face (see equations). The value chosen must not have a value greater than 7k or the input voltage range of the buffer may be exceeded during transients.
R
Pin - An external resistor connected to VCC is required
DC
at this pin to provide an accurate reference for the DC cur­rents which feed the subscriber loop. PC board traces should be made to have low resistance and should connect directly to V
CC
.
C
Pin - This pin provides a connection to the DC refer-
DC
ence nodes that control the DC loop feed current. These internal blocks are referenced to V the capacitor be referenced to V
and it is important that
EE
or else the PSRR perfor-
EE
mance will be degraded.
C
Pin - Capacitor CP connects to this pin to create a low-
P
pass filter for the half-battery internal reference point. It is important that this capacitor be referenced to BGND/AGND to minimize the effect of noise injected into the subscriber loop from the battery supply.
R
, R
, R
, R
PSG
PST
PSR
Pins - These pins are connected
PSB
to critical nodes inside the HC5519R3931 feedback control loops. Parasitic capacitance should be minimized in order to prevent oscillations.
RD, TB, TA Pins - The pins connect to the dr iver coils of the Ring and Test relays and activate the relays by pulling down the coil voltage to ground. The driver outputs are internally clamped to V
by diodes to prevent the inductive voltage
CC
transient during relay turn-off from damaging the driver. Relays attached to any voltage other than V
will not func-
CC
tion properly.
8
Page 9
Test Information
FIGURE 4. POWER SUPPLY CURRENT AND TIP AND RING VOLTAGE TEST CIRCUIT
PARAMETER INPUT MEASUREMENT SPECIFICATIONS
V
V
TIP
RING
TIP
RING
HC5520
R
TPS
100k
50 R
PT
R
PR
50
100k
R
RGS
TIPSEN
TIP
HC5520
RING
RINGSEN
T
R
X4W
C
VRX
R
X
0.47µF
100k
X
I
CC
I
EE
I
BB
T
X
100k
R
4W
C
VTX
0.47µF
V
RX
V
CC
V
EE
V
BAT
V
TX
Power Supply Current, I Power Supply Current, I Power Supply Current, I
V
TIP
V
RING
CC
EE
BB
VCC = +4.75 ~ +5.25V ICC Direct Measurement I
VEE = -4.75 ~ -5.25V IEE Direct Measurement I
V
= -42 ~ -58V IBB Direct Measurement I
BAT
V
BAT
V
BAT
R
TPS
TR
100k
50 R
PT
R
PR
50
100k R
RGS
I
L
TIP
R
L
V
RING
V
TIPSEN TIP
HC5520
RING
RINGSEN
V
Direct Measurement V
TIP
Direct Measurement V
RING
C
VRX
R
X
0.47µF
100k
T
R
T
X4W
X
X
100k
R
4W
C
VTX
0.47µF
V
RX
V
TX
CC
EE
BB
TIP
RING
FIGURE 5. LOOP CURRENT TEST CIRCUIT
PARAMETER INPUT MEASUREMENT SPECIFICATIONS
Loop Current, I
L
Short Circuit Loop Current V
V
and R
BAT
= -48V and RL= 100 V
BAT
L
V
TR
TR
IL = VTR/R IL = VTR/R
9
L
L
Page 10
HC5520
R
TPS
>9k
SW
2.4k
TIP
RING
100k
50
R
R 50
100k R
PT
PR
RGS
TIPSEN TIP
HC5520
RING
RINGSEN
R
SHDO
T
X4W
X
T
X
FIGURE 6. SWITCH HOOK DETECTION TEST CIRCUIT
PARAMETER INPUT MEASUREMENT SPECIFICATIONS
On Hook Condition SW = Left SHDO SHDO = Hi Off Hook Detection SW = Right SHDO SHDO = Lo
R
X
100k
100k
R
4W
C
VRX
0.472µF
C
VTX
0.47µF
V
RX
V
TX
R
SW
SHDO
ON
OFF
SW
TPS
PT
PR
RGS
TIPSEN TIP
HC5520
RING
RINGSEN
t
BREAK
ON-HOOK
t
MEAS
SHDO
T
X4W
t
PERIOD
R
X
T
X
100k
TIP
R
L
RING
OFF-HOOK OFF-HOOK
OFF-HOOK OFF-HOOKON-HOOK
50 R
R
50
100k
R
R
100k
100k
R
4W
t
MAKE
C
VRX
X
0.47µF
V
RX
C
VTX
0.47µF
V
TX
FIGURE 7. DIAL PULSE DISTORTION TEST CIRCUIT AND WAVEFORMS
PARAMETER INPUT MEASUREMENT SPECIFICATIONS
Percent Break SW = On, Off, . . . t
Dial Pulse Distortion SW = On, Off, . . . t
BREAK
BREAK
and t
and t
PERIOD
10
PERIOD
and t
MEAS
Abs[(t
(t
BREAK/tPERIOD
- t
BREAK
MEAS
) x 100%
)/t
PERIOD
] x 100%
Page 11
1 REN
1600
200
HC5520
1k R
237k
R
BL
TIPSEN TIP
HC5520
RING
RINGSEN
RD
BAL
R
BL
R
TPS
100k
TIP
50 R
PT
20k
3 REN
R
PR
SW
RING
50
100k
R
RGS
V
V
RINGING
BAT
FIGURE 8. RING TRIP DETECTION TEST CIRCUIT
R
BH
R
SHDO
C
RTD
T
T
X4W
R
BH
237k
C
VRX
R
X
0.47µF
100k
X
C
RTD
1µF
V
RX
-5V C
VTX
0.47µF
X
V
TX
100k
R
4W
PARAMETER INPUT MEASUREMENT SPECIFICATIONS
No Ring Trip Detection SW = Up SHDO SHDO = Hi
Ring Trip Detection SW = Down SHDO SHDO = Lo
R
TIP
V
T
1800
V
R
RING
POLARITY REVERSAL COMMAND
V
T
TPS
100k
50 R
PT
R
PR
50
100k
R
RGS
TIPSEN TIP
HC5520
RING
RINGSEN
T
R
PRI
T
X4W
X
X
t
RX
100k
100k
R
4W
REV
90%
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
V
R
90%
FIGURE 9. POLARITY REVERSAL TIME TEST CIRCUIT AND WAVEFORMS
PARAMETER INPUT MEASUREMENT SPECIFICATIONS
Polarity Reversal Time Reversal Command t
REV
t
REV
11
Page 12
HC5520
R
TPS
PT
PR
RGS
TIPSEN TIP
HC5520
RING
RINGSEN
T
R
T
X4W
X
X
600
TIP
V
TR
RING
100k
50 R
R 50
100k
R
FIGURE 10. 4W TO 2W TRANSMISSION TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETER INPUT AT VRX MEASUREMENT SPECIFICATIONS AT 600
Absolute Receive Gain, AGR 0dBm0 at 1020Hz VTR at 1020Hz AGR = 20log(VTR/VRX)
Receive Frequency Response 0dBm0 at Freq VTR at Freq 20log(VTR/VRX) - AGR
Receive Gain Tracking Level at 1020Hz VTR at 1020Hz 20log(VTR/Level) - AGR
Receive Signal to Distortion Level at 1020Hz VTR at 2nd to 5th Harmonics 20log(Level/VTR)
R
X
100k
100k
R
4W
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
Receive Idle Channel Noise 0V
TIP
600
V
AC
RING
RMS
R
TPS
100k
50 R
PT
R
PR
50
100k R
RGS
TIPSEN TIP
HC5520
RING
RINGSEN
T
R
X4W
V
TR
C
VRX
R
X
0.47µF
100k
X
C
VTX
T
X
100k
0.47µF
R
4W
20log(VTR/0.7746V
V
RX
V
TX
FIGURE 11. 2W TO 4W TRANSMISSION TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETER INPUT AT V
AC
MEASUREMENT SPECIFICATIONS AT 600
Absolute Transmit Gain, AGT 2x(0dBm0) at 1020Hz VTX at 1020Hz AGT = 20log(VTX/0.7746V
Transmit Frequency Response 2x(0dBm0) at Freq VTX at Freq 20log(VTX/0.7746V
RMS
Transmit Gain Tracking 2x(Level) at 1020Hz VTX at 1020Hz 20log(VTX/Level) - AGT
)
RMS
RMS
) - AGT
)
Transmit Signal to Distortion 2x(Level) at 1020Hz VTX at 2nd to 5th Harmonics 20log(Level/VTX)
Transmit Idle Channel Noise 0V
RMS
V
TX
20log(VTX/0.7746V
12
RMS
)
Page 13
HC5520
R
TPS
600
V
AC
100k
TIP
Z
L
V
TR
RING
50 R
R 50
100k R
PT
PR
RGS
Z
S
TIPSEN TIP
HC5520
RING
RINGSEN
T
R
X4W
X
T
X
FIGURE 12. 2W RETURN LOSS TEST CIRCUIT - NORMAL AND REVERSE MODES
DEFINITION : 2W Return Loss = 20 log[(ZS + ZL) / Abs(ZS - ZL)]. Where ZS is the source impedance and ZL is the load impedance.
R
X
100k
100k
R
4W
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
PARAMETER INPUT AT V
AC
2W Return Loss 0dBm0 at Freq V
R
TPS
PT
PR
RGS
TIPSEN TIP
HC5520
RING
RINGSE
N
T
X4W
600
TIP
RING
100k
50 R
R 50
100k
R
MEASUREMENT SPECIFICATIONS FOR 600
at Freq 20log[VAC/Abs(2xVTR- VAC)]
TR
C
R
100k
R
X
T
X
100k
R
4W
VRX
X
0.47µF
C
0.47µF
VTX
V
RX
100k
100k
V
TX
1M
-
+
50k
FIGURE 13. 4W TO 4W INSERTION LOSS AND TRANSHYBRID BALANCE - NORMAL AND REVERSE MODES
PARAMETER INPUT AT V
RX
4W to 4W Insertion Loss 0dBm0 at Freq V
Transhybrid Balance 0dBm0 at Freq V
R
TPS
100k
600
TIP
V
TR
RING
50 R
PT
R
PR
50
100k
R
RGS
FIGURE 14. RECEIVE OVER LOAD LEVEL AT 4W AND 2W TEST CIRCUIT - NORMAL AND REVERSE MODES
MEASUREMENT SPECIFICATIONS FOR 600
at Freq 20log[VRX/VTX]
TX
at Freq 20log[VRX/V
THB
C
VRX
R
TIPSEN TIP
HC5520
RING
RINGSEN
T
R
T
X4W
X
0.47µF
100k
X
X
100k
R
4W
C
VTX
0.47µF
V
RX
V
TX
V
THB
THB
] + 20dB
INPUT AT VRX
AT 1kHz
= 2.50V
V
RX
PEAK
SLIC OUTPUT
IMPEDANCE
SLIC
VOLTAGE GAIN MEASUREMENT
SPECIFICATION
AT 600
600 0dB VTR at 2nd to 5th Harmonics 20log(VTR/VRX)
13
Page 14
HC5520
R
TPS
600
V
AC
I
L
TIP
100k
50 R
V
TR
R
RING
50
100k R
PT
PR
RGS
TIPSEN TIP
HC5520
RING
RINGSEN
T
R
X4W
X
T
X
FIGURE 15. TRANSMIT OVER LOAD LEVEL AT 2W AND 4W TEST CIRCUIT - NORMAL AND REVERSE MODES
R
X
100k
100k
R
4W
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
INPUT AT V
AT 1kHz
VAC = 2x(2.15V
AC
) 600 0dB VTRand VTX at
PEAK
SLIC OUTPUT
IMPEDANCE
I
LONG
SLIC TRANSMIT
GAIN MEASUREMENT SPECIFICATION AT 600
R
100k
TIP
TPS
50
368
368
V
T
V
R
RING
V
2.16µF
AC
I
LONG
R
PT
R
PR
50
100k
R
RGS
FIGURE 16. LONGITUDINAL IMPEDANCE TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETER INPUT MEASUREMENT SPECIFICATIONS
Longitudinal Impedance, Tip Side VAC = 0dBm0 at Freq I
Longitudinal Impedance, Ring Side VAC = 0dBm0 at Freq I
2nd to 5th Harmonics
R
TIPSEN TIP
R
HC5520
RING
RINGSEN
LONG
(rms) and VR(rms) Z
LONG
T
T
X4W
(rms) and VT(rms) Z
X
100k
X
X
100k
R
4W
20log[VTR/(VAC/2)]
and 20log[VTX/(VAC/2)]
C
VRX
0.47µF
V
RX
C
VTX
0.47µF
V
TX
LONG
LONG
= VT/I = VR/I
LONG LONG
R
TRIANGULAR
WAVEFORM
TPS
PT
TIPSEN TIP
R
SHDO
X
I
LONG
TIP
100k
50
V
AC
2.16µF
20µF
R
HC5520
R
PR
50
100k
R
RGS
RING
RINGSEN
T
T
X4W
X
I
LONG
20µF
RING
R
X
100k
100k
R
4W
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
FIGURE 17. ON-HOOK LONGITUDINAL CURRENT LIMIT TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETER INPUT MEASUREMENT SPECIFICATIONS
Longitudinal Current Limit VAC at Freq, I
LONG
= 15mA
PEAK
SHDO SHDO = Hi
14
Page 15
HC5520
R
TPS
50 R
PT
PR
50
RGS
TIPSEN TIP
HC5520
RING
RINGSEN
T
R
X4W
X
T
X
I
LONG
AC
2.16µF
I
LONG
V
368
368
TIP
V
R
RING
100k
R
100k
R
FIGURE 18. 2W AND 4W LONGITUDINAL BALANCE TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETER INPUT MEASUREMENT SPECIFICATIONS
2W Longitudinal Balance VAC= 0dBm0 at Freq VTR at Freq 20log(VAC/VTR) 4W Longitudinal Balance VAC= 0dBm0 at Freq VTX at Freq 20log(VAC/VTX)
R
X
100k
100k
R
4W
C
VRX
0.47µF
C
VTX
0.47µF
V
RX
V
TX
R
600
TIP
V
TR
RING
TPS
100k
50 R
PT
R
PR
50
100k R
RGS
TIPSEN TIP
HC5520
RING
RINGSEN
T
R
X4W
X
T
X
R
X
100k
100k
R
4W
C
VRX
0.47µF
V
AC
C
VTX
0.47µF
V
RX
V
CC
V
EE
V
BB
V
TX
FIGURE 19. OFF HOOK PSRR 4W AND 2W TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETER INPUT MEASUREMENT SPECIFICATIONS
PSRR V PSRR V
PSRR VCC to 4W VCC = +5V + V PSRR VCC to 2W VCC = +5V + V PSRR VEE to 4W VEE = -5V + V PSRR VEE to 2W VEE = -5V + V
to 4W V
BAT
to 2W V
BAT
= -48V + V
BAT
= -48V + V
BAT
AC
AC
AC
AC
AC
AC
VTX at Freq 20log(VAC/VTX) at Freq VTR at Freq 20log(VAC/VTR) at Freq VTX at Freq 20log(VAC/VTX) at Freq VTR at Freq 20log(VAC/VTR) at Freq VTX at Freq 20log(VAC/VTX) at Freq VTR at Freq 20log(VAC/VTR) at Freq
15
Page 16
HC5520
Pin Descriptions
MQFP PLCC SYMBOL DESCRIPTION
17R 2 8 AGND Analog ground pin. This pin must be tied to the BGND and RGND pins. 39 T 410T
X4W
511KZO2W impedance setting pin, connecting a network K(ZL) between KZO pin and AGND will program the 2W
612R 713RDCDC feed reference pin. 814CDCDC feeding circuit low pass filter capacitor pin.
915C 10 16 V 11 17 TIPSEN Tip sense input pin. 12 18 BGND Battery ground pin. This pin must be tied to the AGND and RGND pins. 13 19 R
PSG
14 NC No connect. 15 20 R
PST
16 21 TIP Tip feed pin. 17 22 NC No connect. 18 23 RING Ring feed pin. 19 24 R
PSR
20 25 NC No connect. 21 26 R 22 27 V
PSB BAT
23 28 RINGSEN Ring sense input pin. 24 29 R 25 30 R 26 31 C
RTD
27 32 RD Ring relay driver pin, open collector output. Diode protected internally. 28 33 TB Test access relay driver pin, open collector output. Diode protected internally. 29 34 TA Test access relay driver pin, open collector output. Diode protected internally. 30 35 RGND Relay driver ground current return pin. This pin must be tied to the AGND and BGND pins. 31 36 V 32 37 NC No connect. 33 38 NC No connect. 34 39 NC No connect.
40 NC No connect. 35 41 TAI TA Relay Driver Control Input. 36 42 TBI TB Relay Driver Control Input. 37 43 RCI RD Relay Driver Control Input. 38 44 PRI Loop Feed Polarity Control Input. 39 1 PDI Loop Feed Control Input. 40 2 NC No connect. 41 3 NC No connect. 42 4 TSDO Thermal Shutdown Indicator Output. 43 5 SHDO Off Hook Detect Indicator Output. 44 6 NC No connect.
4W receive input pin, a ground referenced current sense input.
X
4W transmit output pin, a ground referenced voltage source.
X
Transmit gain setting pin - connecting a resistor between T
X4W
impedance to be ZL. Resistor divider pin for ZO, in conjunction with KZO it defines the 2W impedance.
N
Half battery voltage reference pin.
P
Negative power supply pin, VEE = -5V at 5%.
EE
Power sharing resistor ground side connection pin.
Power sharing resistor Tip side connection pin.
Power sharing resistor Ring side connection pin.
Power sharing resistor battery side connection pin. Battery power supply pin, V
Ring trip amplifier ground side sense input pin.
BH
Ring trip amplifier line side sense input pin.
BL
= -42V to -58V.
BAT
Ring trip capacitor pin.
Positive power supply pin, VCC = +5V at 5%.
CC
and TX establishes the 2W to 4W gain.
16
Page 17
Typical Application Circuit Diagram
R
BH
237K
R
BAL
TIP
RING
TEST
ACCESS
RELAY
RING
RELAY
TO RING
GENERATOR
±5V GND
BATTERY GND
1K
+5V
+5V
-5V
-48V
R
BL
237K
R
TPS
100K
50
R
PT
SURGECTOR
R
PR
50
100K
R
RGS
R
PST
910
910
910 R
PSR
RELAY
RELAY
RELAY
0.1µF
0.1µF
0.1µF
0.1µF
HC5520
R
BH
R
BL
TIPSEN
TIP
RING
RINGSEN
R
PSG
R
PST
R
PSR
R
PSB
TA
TB
RD
RGND
V
CC
AGND
V
EE
BGND
V
BAT
HC5520
R
T
X4W
T
R
K
ZO
C
C
DC
C
RTD
R
DC
SHDO
TSDO
TAI
TBI
RCI
PDI
PRI
R
X
0.47µF
X
100K
V
RX
CVRX
100K
C
R
X
N
4W
R
N
6.49K
R
KZO
VTX
0.47µF
V
TX
15.4K
R
CP
P
200
C
DC
C
1µF
P
-5V
4.7µF C
RTD
1µF
2.15K
R
DC
+5V
GROUND PLANE
EARTH GROUND
NOTE: The HC5520 application circuit is configured to provide a receive gain of 0dB, a transmit gain of 0dB, and a synthesized 2W imped­ance of 593. Note, the value of R
TPS
, R
should always be selected to be 100k.
RGS
17
Page 18
HC5520
External Component List for Application Circuit
NAME VALUE TOLERANCE RATING
RX,R
4W,RTPS
R RPT, R
R C
R
N
R
DC
BH,RBL
PR
R
BAL
R
KZ0
R
CP
PST,RPSR
VRX,CVTX
C
DC
C
P
C
RTD
, R
RGS
100k 1% 1/10W
6.49k 1% 1/10W
2.15k 1% 1/10W 237k 1% 1/10W
50 5% 2.5W or PTC
1000 5% 1W
15.4k 1% 1/10W
200 5% 1/10W 910Ω 5% 2W
0.47µF 20% 10V
4.7µF 10% 10V Tantalum 1µF 10% 35V Tantalum 1µF 10% 10V Tantalum
C DECOUPLING 0.1µF 20% 10V except on Vb
SURGECTOR TISP1072F3SL Texas Instruments
PTC TR250-120u Raychem
18
Page 19
HC5520
Metric Plastic Quad Flatpack Packages (MQFP/PQFP)
E
0.016
E1
-H-
0.40
0o MIN
0o-7
-A-
o
MIN
D
D1
-D-
Q44.10x10 (JEDEC MO-108AA-2 ISSUE A)
44 LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE
INCHES MILLIMETERS
SYMBOL
NOTESMIN MAX MIN MAX
A - 0.093 - 2.35 -
A1 0.004 0.010 0.10 0.25 -
-B-
A2 0.077 0.083 1.95 2.10 -
B 0.012 0.018 0.30 0.45 6
B1 0.012 0.016 0.30 0.40 -
D 0.510 0.530 12.95 13.45 3
D1 0.390 0.398 9.90 10.10 4, 5
E 0.510 0.530 12.95 13.45 3
e
PIN 1
E1 0.390 0.398 9.90 10.10 4, 5
L 0.026 0.037 0.65 0.95 -
N44 447
e 0.032 BSC 0.80 BSC -
SEATING
PLANE
A
0.10
0.004
D
S
B
B1
0.13/0.23
0.005/0.009
-C-
S
o
5o-16
A2
o
L
5o-16
A1
0.20
M
0.008
0.13/0.17
0.005/0.007
BASE METAL
WITH PLATING
A-B
C
NOTES:
1. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
2. All dimensions and tolerances per ANSI Y14.5M-1982.
3. Dimensions D and E to be determined at seating plane .
4. Dimensions D1 and E1 to be determined at datum plane .
5. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm (0.010 inch) per side.
6. Dimension B does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total.
7. “N” is the number of terminal positions.
Rev. 1 1/94
-C-
-H-
19
Page 20
HC5520
Plastic Leaded Chip Carrier Packages (PLCC)
0.042 (1.07)
0.048 (1.22) PIN (1) IDENTIFIER
0.020 (0.51) MAX 3 PLCS
C
L
D1
D
0.026 (0.66)
0.032 (0.81)
0.050 (1.27) TP
0.042 (1.07)
0.056 (1.42)
C
L
E1
E
0.013 (0.33)
0.021 (0.53)
0.004 (0.10) C
0.025 (0.64)
0.045 (1.14)
D2/E2
D2/E2
A1
A
-C-
VIEW “A”
0.020 (0.51) MIN
SEATING PLANE
R
N44.65 (JEDEC MS-018AC ISSUE A)
44 LEAD PLASTIC LEADED CHIP CARRIER PACKAGE
INCHES MILLIMETERS
SYMBOL
A 0.165 0.180 4.20 4.57 -
A1 0.090 0.120 2.29 3.04 -
D 0.685 0.695 17.40 17.65 ­D1 0.650 0.656 16.51 16.66 3 D2 0.291 0.319 7.40 8.10 4, 5
E 0.685 0.695 17.40 17.65 -
E1 0.650 0.656 16.51 16.66 3 E2 0.291 0.319 7.40 8.10 4, 5
N44 446
NOTESMIN MAX MIN MAX
Rev. 1 3/95
0.045 (1.14) MIN
VIEW “A” TYP.
0.025 (0.64) MIN
NOTES:
1. Controlling dimension: INCH. Converted millimeter dimensions are not necessarily exact.
2. Dimensions and tolerancing per ANSI Y14.5M-1982.
3. Dimensions D1 and E1 do not include mold protrusions. Allow­able mold protrusion is 0.010 inch (0.25mm) per side.
4. To be measured at seating plane contact point.
-C-
5. Centerline to be determined where center leads exit plastic body.
6. “N” is the number of terminal positions.
All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Harris Semiconductor products are sold by description only. Harris Semiconductor reser ves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.
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For general information regarding Harris Semiconductor and its products, call 1-800-4-HARRIS
NORTH AMERICA
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EUROPE
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ASIA
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SEMICONDUCTOR
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