Datasheet HC-5509A1 Datasheet (intersil)

查询HC1-5509A1-5供应商

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PRELIMINARY

May 1997

Features

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• DI Monolithic High Voltage Process

• Compatible with Worldwide PBX and CO Performance
Requirements

• Controlled Supply of Battery Feed Current with Programmable
Current Limi t

• Operates with 5V Positive Supply (V

• Internal Ring Relay Driver and a Utility Relay Driver

B+

)

• High Impedance Mode for Subscriber Loop

• High Temper at ure Alarm Ou tput

• Low Power Consumption During Standby Functions

• Switch Hook, Ground Key, and Ring Trip Detection

• Selective Power Denial to Subscr iber

• Voice Path Active During Power Denial

• On Chip Op-Amp for 2 Wire Im pedance Mat c hing

Applications

• Solid State Line I nterface Circuit for PBX or Ce ntral Office
Systems, Digital Loop Carrier Systems

• Hote l/Motel Switching Systems

• Direct Inward Dialing (DID) Trunks

• Voice Messaging PBX’s

• High Voltage 2W/4W, 4W/2W Hybrid

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HC-5509A1

SLIC

Subscriber Line Interface Circuit

Description

The HC-5509A1 telephone Subscriber Line Interface Circuit
integrates most of the BORSCHT functions on a monolithic
IC. The device is manufactured in a Dielectric Isolation (DI)
process and is designed for use as a high voltage interface
between the traditional telephone subscriber pair (Tip and
Ring) and the low voltage filter ing and coding/decoding func­tions of the line card. Together with a secondary protection
diode bridge and “feed” resistors, the device will withstand
1000V lightning induced surges, in plastic packages. The
SLIC also maintains specified transmission performance in
the presence of ex ternally induced longi tudinal currents. The
BORSCHT functions that the SLIC provides are:

• Battery Feed with Subscriber Loop Current Limiting

• Overvoltage Pro tection

• Ring Relay Driver

• Supervisory Signaling Functions

• Hybrid Functions (with External Op-Amp)

• Test (or Batter y R eversal) Relay Driver

Ordering Information

PART NUMBER TEMP. RANGE PACKAGE

HC1-5509A1-5 0
HC1-5509A1-9 -40
HC3-5509A1-5 0
HC3-5509A1-9 -40
HC4P5509A1-5 0
HC4P5509A1-9 -40
HC9P5509A1-5 0

o

to +75oC 28 Lead Ceramic DIP

o

to +85oC 28 Lead Ceramic DIP

o

to +75oC 28 Lead Plastic DIP

o

to +85oC 28 Lead Plastic DIP

o

to +75oC 44 Lead PLC C

o

to +85oC 44 Lead PLC C

o

to +75oC 28 Lead SOIC

Pinouts

HC-5509A1 (PDIP, CDIP, SOIC)

AG

VB+12

C1

F1
F0

RS
SHD
GKD

TST

ALM

ILMT

OUT 1

-IN 1

TIP

3
4
5
6
7
8

9
10
11
12
13
14

TOP VIEW

28

C2

27

VB-

26

RF

25

TF

24

VFB

23

RD

22

BG

21

PR

20

PRI

19

VTX

18

LAO

17

VRX

16

RFS

15

RING

F1 F0 ACTION

0 0 Normal Loop Feed
01RD
1 0 Power Down Latch

1 0 Power on RESET
1 1 Loop Power

TRUTH TABLE

Active

RESET

Denial Active

In addition, the SLIC provides selective denial of power to
subscriber loops, a programmable subscriber loop current
limit from 20 to 60mA, a thermal shutdo wn with an alarm out­put and line fault protection. Switch hook detection, ring trip
detection and ground key detection functions are also incor­porated in the SLIC devic e.

The HC-5509A1 SLIC is ideally suited for line card designs
in PBX and CO systems, replacing traditional transformer
solutions.

HC-5509A1 (PLCC)

TOP VIEW

N/C

RS

SHD
GKD

TST

ALM

N/C
N/C
N/C

N/CC1VB+

7
8

F1

9

F0

10
11
12
13
14
15
16
17

18 19 20 21 22 23 24 25 26 27 28

ILMT

N/C

OUT 1

-IN 1

AGC2VB-

TIP

N/C

N/C

1234564041424344

X

N/C

RING

RF2

RF1

TF1

39

TF2
VFB

38
37

RD

36

BG

35

DG

34

PR

33

PRI

32

VTX

31

LAO

30

N/C

29

N/C

N/C

N/C

RFS

VRX

CAUTION: These devic es are sensitive to electrostatic discharge; foll ow prop er IC Handling Pro cedures.
1-888-INTERSIL or 321-724-7143
Copyright © Intersil Americas Inc. 2002. All Rights Reserved

,

| Intersil (and design) is a registered trademark of Intersil Americas Inc .

8-131

File Number 3567.1

Specifications HC-5509A1

Absolute Maximum Ratings (Note 1) Operating C o ndi t io ns

Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +15V

Maximum Supply Voltages

(V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V

B+

(V

)-(VB-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +75V

B+

Junction Temperature Ceramic . . . . . . . . . . . . . . . . . . . . . . +175

Junction Temperature Plastic. . . . . . . . . . . . . . . . . . . . . . . . +150

Lead Temperature (Soldering 10 Sec.) . . . . . . . . . . . . . . . . +300

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Operating Temperature Range

HC-5509A1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0

HC-5509A1-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40

Storage Temperature Range . . . . . . . . . . . . . . . . . -65

o

Relay Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V to +12V

C

o

Positive Power Supply (V

C

o

Negative Power Supply (V

C

Loop Resistance (R

). . . . . . . . . . . . . . . . . . . . . . . .+5V ±5%

B+

) . . . . . . . . . . . . . . . . . . . . -42V to -58V

B-

) . . . . . . . . . . . . . . . . . 200Ω to 1750Ω (Note 2)

L

o

C to +75oC

o

C to +85oC

o

C to +150oC

Electrical Specifications Unless Otherwise Specified, Typical Parameters are at TA = +25oC, Min-Max Parameters are over

Operating Temperature Range, V
speci fie d at 600Ω 2-Wire terminating impedance.

= -48V, VB+ = +5V, AG = DG = BG = 0V. All A.C. Parameters are

B-

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

A.C. TRANSMISSION PARAMETERS
RX Input Impedance 300Hz to 3.4kHz (Note 3) - 100 - kΩ
TX Output Imped ance 300Hz to 3.4kHz (Note 3) - - 20 Ω
4W Input Overload Level 300Hz to 3.4kHz R

= 1200Ω,

L

+1.5 - - V

PEAK

600Ω Reference

2W Return Loss Matched for 600Ω (Note 3)

SRL LO 26 35 - dB
ERL 30 40 - dB
SRL HI 30 40 - dB

2W Longitudinal to Metallic Balance
Off Hook

4W Longitudinal Balance

Per ANSI/IEEE STD 455-1976 (Note 3)

58 63 - dB

300Hz to 3400Hz
300Hz to 3400Hz (Note 3) 50 55 - dB

Off Hook
Low Frequency Longitudinal Balance R.E.A. Test Circuit - - -67 dBmp

I

= 40mA TA = +25oC (Note 3) - - 23 dBrnC

LINE

Longit ud ina l C urr e nt Ca pa bi lity I

= 40mA TA = +25oC (Note 3) - - 30 mArms

LINE

Insertion Loss 0dBm at 1kHz, Referenced 600Ω

2W/4W - ±0.05 ±0.2 dB
4W/2W - ±0.05 ±0.2 dB
4W/4W --±0.12 dB

Frequency Response 300Hz to 3400Hz (Note 3) Referenced to

- ±0.02 ±0.05 dB
Absolute Leve l at 1kH z, 0dBm Refe ren ced
600Ω

Level Linearity Referenced to -10dBm (Note 3)

2W to 4W and 4W to 2W +3 to -40dBm - - ±0.05 dB

-40 to -50dBm - - ±0.1 dB

-50 to -55dBm - - ±0.3 dB

Absolute Delay (Note 3)

8-132

Specifications HC-5509A1

Electrical Specifications Unless Otherwise Specified, Typical Parameters are at T

Operating Temperature Range, VB- = -48V, VB+ = +5V, AG = DG = BG = 0V. All A.C. Parameters are

= +25oC, Min-Max Parameters are over

A

speci fie d at 600Ω 2-Wire terminating impedance. (Continued)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

2W/4W 300Hz to 3400Hz - - 1 µs
4W/2W 300Hz to 3400Hz - - 1 µs

4W/4W 300Hz to 3400Hz - - 1. 5 µs
Transhybrid Loss, THL (Note 3) See Figure 1 - 40 - dB
Total Harmonic Distortion

2W/4W, 4W/2W, 4W/4W

Refere nc e Le ve l 0dBm at 600 Ω
300Hz to 3400Hz (Note 3)

---52dB

Idle Channel Noise (Note 3)

2W and 4W C-Message - - 5 dBrnC

Psophometric - - -85 dBmp
3kHz Flat - - 15 dBrn

Power Supply Rejection Ratio (Note 3)

V

30Hz to 200Hz, R

to 2W 20 29 - dB

B+

V

to 4W 20 29 - dB

B+

V

to 2W 20 29 - dB

B-

V

to 4W 20 29 - dB

B-

V

to 4W (Note 3)

B+

V

to 2W 30 - - dB

B-

V

to 4W 20 25 - dB

B-

V

to 4W 20 25 - dB

B-

200Hz to 16kHz, R

= 600Ω

L

= 600Ω

L

30 - - dB

Ring Sync Pulse Width 50 - 500 µs
D.C. PARAMETERS
Loop Current Programming

Limit Range 20 40 60 mA

Accuracy 10 - - %
Loop Current During Power Denial R

= 200Ω - ±3 ±5mA

L

Fault Currents

TIP to Ground -30-mA

RING to Ground -60-mA

TIP and RING to Ground - 90 - mA
Switch Hook Detection Threshold - 12 15 mA
Ground Key Detection Threshold 8 12 16 mA
Thermal ALARM

Output Safe Operating Die Temperat ure Exceeded 140 - 160

Ring Trip Comparator Threshold See Typical Applications for more informa-

9.5 13.5 17.5 mA

o

C

tion

Dial Pulse Dist ortion -0.10.5ms

8-133

Specifications HC-5509A1

Electrical Specifications Unless Otherwise Specified, Typical Parameters are at T

Operating Temperature Range, VB- = -48V, VB+ = +5V, AG = DG = BG = 0V. All A.C. Parameters are

= +25oC, Min-Max Parameters are over

A

speci fie d at 600Ω 2-Wire terminating impedance. (Continued)

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

Relay Driver Outputs

On Voltage V

OL

Off Leakage Curr ent V
TTL/CMOS Logic Inputs (F0, F1, RS, TEST

IOL (PR) = 60mA, IOL (RD) = 30mA - 0.2 0.5 V

= 13.2V - ±10 ±100 µA

OH

,

PRI)

Logic ‘0 ’ V

Logic ‘1 ’ V

IL

IH

Input Current (F0, F1, RS, TEST

, PRI) 0V ≤ VIN ≤ 5V - - ±100 µA

--0.8V

2.0 - 5.5 V

Logic O utp uts

Logic ‘0 ’ V

Logic ‘1 ’ V

OL

OH

I

= 800µA-0.10.5V

LOAD

I

= 40µA2.7--V

LOAD

Power Dissipation On Hook Relay Drivers Off - 200 - mW
I

B+

I

B-

VB+ = +5.25V, VB- = -58V, R
VB+ = +5.25V, VB- = -58V, R

= ∞ --6mA

LOOP

= ∞ -6 - - mA

LOOP

UNCOMMITED OP AMP PARAMETERS
Input Offset Voltage - ±5-mV
Input Offset Current - ±10 - nA
Differential Input Resistance (Note 2) - 1 - MΩ
Output Voltag e Swing R

= 10kΩ - ±3-V

L

P-P

Small Signal GBW (Note 2) - 1 - MHz

NOTES:

1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Func­tional operability under any of these conditions is not necessa rily implied.

2. May Be Extended to 1900Ω With Application Circuit.

3. These para mete rs are con trol led by des ign or process param eters and are no t direc tly test ed. These para mete rs are cha racte rized up on
initia l d esi gn rel ea se, upon des ig n ch an ges w hi ch wo ul d aff ec t these cha r acte r isti cs , a nd a t int erv al s t o as sure pr oduc t q ual i ty and spec­ification compliance.

Pin Descriptions

DIP/SOIC PLCC SYMBOL DESCRIPTION

1 2 AG Analog Gr ou nd - T o be co nn ec te d to z er o pot en ti al. S erv es as a ref er enc e f o r t he t rans mi t outp ut

and receive input terminals.
2 3 VB+ Positive Voltage Source - Most Positive Supply.
3 4 C1 Capacitor #C1 - An ex t erna l ca paci to r t o b e conn ect e d b etw een th i s t erm in al and an al og g roun d.

Required for proper operation of the loop current limiting function.
4 8 F1 Function Address #1 - A TTL and CMOS compatible in put used with F0 function address line to

extern al ly s el ect l og ic fu nct i on s. T h e thr ee sel ec t ab le f u nct ion s ar e m ut ua ll y ex clus iv e. Se e T rut h

Table on page1. F1 should be toggled high after power is applied.

8-134

HC-5509A1

Pin Descriptions (Continued)

DIP/SOIC PLCC SYMBOL DESCRIPTION

5 9 F0 Function Address #0 - A TTL and CMOS compatible in put used with F1 function address line to

extern al ly s el ect l og ic fu nct i on s. T h e thr ee sel ec t ab le f u nct ion s ar e m ut ua ll y ex clus iv e. Se e T rut h

Table on page 1.
6 10 RS Ring Syn c hr o ni za tion Inp u t - A T TL - c ompat ib le clock in put. The c lock is a r ranged s uc h tha t a

positive pulse (50 - 500µs) occurs on the zero crossing of the ring voltage source, as it appears

at the RFS terminal. For Tip side injected systems, the RS pulse should occur on the negative

going zero crossing and for Ring injected systems, on the positive going zero crossing. This en-

sures that the r in g delay ac ti va t e s a nd deac ti va t e s w h en the ins tan taneou s ri ng volt ag e i s near

zero. If synchronization is not required, the pin should be tied to +5.
711SHD
812GKD
913TST

10 14 ALM

11 18 ILMT Loop Current Limit - Voltage on this pin sets the sh ort loop current limiting cond itions using a re-

12 19 OUT1 The analog output of the spare operational amplifier.
13 20 -IN1 The inverting analog input of the spare operational amplifier.
14 22 TIP An analog input connected to the T IP (more positive ) side of the subscriber loop through a feed

15 24 RING An analog input con nected to the RING (more negative) side of the subsc riber loop through a

16 25 RFS Ring Feed S ense - S ense s RING side of the loop f or Grou nd K ey Det ection . Dur ing Ri ng i njecte d

Switc h Ho ok Det ec tio n - An ac ti ve l ow LS TTL com pa ti ble lo gi c o utp ut . A li ne su per vi so ry o ut pu t.

Ground Key Detection - An active low LS TTL compatible logic output. A line supervisory output.

A TTL lo gi c inp ut . A lo w on t h is pi n wi ll se t a l at ch and ke ep t he SL IC i n a po wer d own mod e unt i l

the proper F1, F0 state is set and will keep ALM

A LS TTL co mpat ible a ctiv e low o utput which r esp onds to the therma l dete ctor ci rcu it wh en a saf e

operati ng die tem per ature ha s been exce eded . Wh en T ST

signal, ALM

can be t ied directl y to the TST pin to po w er down the part w h en a th er m a l fa ult is de tec te d and

then reset with F0, F1. See Truth Table on page 1. It is possible to ignore transient thermal over-

load conditions in the SLIC by delaying the response to the TST

exercised in attempting this as continued thermal overstress may reduced component life.

sistive voltage divider.

resistor and ring relay contact. Functions with the RING terminal to receive voice signals from

the telephone and for loop monitoring purpose.

feed re si stor . F un ct ions w ith th e TIP ter mi nal t o rece i ve voi ce sign al s f rom t he tele ph on e a nd f or

loop monitoring purposes.

ringing the ring signal at this node is isolated from RF via the ring relay. For Tip injected ringing,

the RF and RFS pins must be shorted.

is latched low until the proper F1, F0 state and TST input is brought high. The ALM

low. See Tru t h Tab le on page 1.

is forced low by an external control

pin fro m t he AL M. Care must be

17 27 VRX R eceive Input, F our Wire Side - A high impedance analo g input. AC signals ap pearing at this in-

18 31 LAO Longitudi nal Amp lifier Out put - A low imp edance ou tput to be co nnecte d to C2 throug h a low pass

19 32 VTX Transmit Output, Four Wire Side - A low impedance analog output which represents the differ-

20 33 PRI A TTL compatible inpu t used to control PR
21 34 PR

NA 35 DG Digital Ground - To be conn ected to zero potential - serves as reference for all digital inputs and

22 36 BG Battery Ground - Tube connected to zero potential. All loop current and some quiescent current

put drive the Tip Feed and Ring Feed a m plifiers differentially.

filter. Output is proportional to the difference in I

ential voltage across TIP and RING. Transhybrid balancing must be performed beyond this out-

put to completely implement two to four wire conversion. This output is referenced to analog

ground . Sinc e the D.C . level of th is ou tput vari es wit h lo op curr ent, capa citive coup ling to the next

stage is nec es sa r y .

An active low open collector output. Can be used to drive a Polarity Reversal Relay.

outputs on the SLIC.

flows into this terminal.

and I

TIP

. PRI active High = PR activ e low.

RING

.

8-135

HC-5509A1

Pin Descriptions (Continued)

DIP/SOIC PLCC SYMBOL DESCRIPTION

23 37 RD Ring Relay D river - An active low open collector output. Used to drive a relay that sw itches r ing-

ing signals onto the 2-Wire line.

24 38 VFB F eedback input to the tip feed amplifier; may be used in conjunction with tran smit output signal

25 39 TF2 Tip Feed - A low im pedance analo g out put conn ecte d to the TI P ter minal throu gh a fe ed resis tor.

NA 40 TF1 Tie directly to TF2 in the PLCC application.

26 41 RF1 Ring Feed - A low im pedance analog ou tput connected to the RING term inal through a feed re-

NA 42 RF2 Tie directly to RF1 in the PLCC application.

27 43 VB- The battery voltage source. The most negative supp ly.
28 44 C2 Capacitor #2 - An external capacitor to be connected between this terminal and ground. It pre-

1, 5, 6, 7,

15, 16,
17, 21,
23, 26,

28, 29, 30

NOTE:

1. All grou nd s (A G, BG, D G) mus t b e ap pl ied bef o re V
to run separate grounds off a line card, the AG must be applied first.

NC No internal connection.

and the spare op-amp to accommodate 2W line impedance matching.

Functions with the RF terminal to provide loop current, and to feed voice signals to the telephone
set and to sink longitudinal currents. Must be tied to TF1.

sistor. Functions with the TF terminal to provide loop current, feed voice signals to the telephone
set, and to sink longitudinal currents. Tie directly to RF2.

vents false ring trip detection from occurring when longitudinal currents are induced onto the sub­scriber loop from power lines and other noise sources. This capacitor should be nonpolarized.

or VB-. Failure to do so may result in premature failure of the part. If a user wishes

B+

8-136

Functional Diagram

B

DIP OR SOIC

HC-5509A1

+

LA

+

TA

25k

25k

R

2R

R/2

2R

2R

2R

90k

VRX OUT 1

17 12

RF1

VB/2

REF

SHD

RTD
GKD

-IN 1
13 24 19

OP AMP

+

VFB

FAULT

DET

GM

VTX

+

THERM

LTD

RF2

V

11

C1

3

18

28

C2LAO ILMT

Die Characteristics

Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224

Diode Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Die Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . 174 x 120

Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . Connected

Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI

Thermal Constants (

o

C/W) θ

JA

θ

JC

Ceramic DIP . . . . . . . . . . . . . . . . . . . . 48 12

Plastic DIP. . . . . . . . . . . . . . . . . . . . . . 51 21

PLCC. . . . . . . . . . . . . . . . . . . . . . . . . . 47 17

SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . 72 22

Overvoltage Protection and Longitudinal
Current Protection

The SLIC device, in conjunction with an external protection
bridge, will withstand high voltage lightning surges and
power line cross es.

High voltage surge conditions are as specified in Table 1.
The SLIC will withstand longitudinal currents up to a maxi-

mum or 30mArms, 15mArms per leg, without any perfor­mance degradation

.

PARAMETER

Longitudinal
Surge

10µs Rise/ ±1000 (Plastic) V
1000µs Fall ±500 (C eramic) V

Metallic Surge 10µs Rise/ ±1000 (Plastic) V

1000µs Fall ±500 (C eramic) V
T/GND 10µs Rise/ ±1000 (Plastic) V
R/GND 1000µs Fall ±500 (Cer a m ic ) V
50/60Hz Current

T/GND 11 Cycles 700 (Plastic) V
R/GND Limited to

10Arms

TABLE 1.

TEST

CONDITION

PERFORMANCE

(MAX) UNITS

350 (Ceramic) V

PEAK
PEAK
PEAK
PEAK
PEAK
PEAK

RMS
RMS

8-137

Functional Diagram (C ontinued)

B

PLCC

HC-5509A1

VRX

R

2R

R/2

2R

2R

TA

+

2R

25k

LA

+

25k

90k

4

C1 C2LAO ILMT

OUT 1

27 19

RF1

VB/2

REF

31

SHD

RTD

GKD

-IN 1

OP AMP

+

44 18

VFB

20 38 32

FAULT

DET

GM

+

VTX

THERM

LTD

RF2

V

8-138

Logic D iagram

THERMAL
SHUT DOWN

HC-5509A1

RELAY

DRIVER

MAL

T

N

H

INJ

A
B

C

KEY

A
B
C

NOTE: PRI is an independent switc h driven by TTL input lev-

8-139

Applications Diagram

HC-5509A1

TIP

RING

PRIMARY

PROTECTION

RS1C

S1

K1A

*SECONDARY

PROTECTION

R

B3

PTC

Z

1

C5

R

KIB

150V

B1

+5V

V

PEAK

K2

RING

(MAX)

+5V

K1

RD
PR

R

B2

R

S2

C

S2

TIP
TF1**
TF2**

VB-

RF2**
RF1**

RFS

RB4

RING

SYSTEM CONTROLLER

PRI RS F1 F0SHD GKD TEST ALARM

SLIC

HC-5509A1

VB- BG C2 DG AG VB+ C1

C3 C4

***

CF2

+5V

RF2

ILIMIT

VRX+

VFB

VTX

-IN1

OUT1

LAO

RL2

RL1

C

AC

KR

F

KZ

0

RF1

CF1

FROM PCM
FILTER/CODER

TO HYBIRD
BALANCE
NETWORK

FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC

TYPICAL COMPONENT VALUES

C1 = 0.5µF, 30V
RF1 = RF2 = 210kΩ, 1%
CF1 = CF2 = 0.22µF, 10%, 20V Nonpolarized
C3 = 0.01µF, 100V, ±20%
C4 = 0.01µF, 100V, ±20%
C5 = 0.01µF, 100V, ±20%

= 0.5µF, 20V

C

AC

= 60kΩ, (Z0 = 600Ω, K = Scaling Factor = 100)

KZ

0

RL1, RL2; Current Limit Setting Resistors:
RL1 + RL2 > 90kΩ → offset

= (0.6) (RL1 + RL2)/(200 x RL2), RL1 typically 100kΩ

I

LIMIT

NOTES:

1. All gro unds (AG, B G, & DG) mus t be applie d bef ore V
to run separate grounds off a line card, the AG must be applied first.

2. Application shows Ring Injected Ringing, a Balanced or Tip injected configuration may be used.

Additional information is contained in Application Note 549, “The HC-550X Telephone SLICs” By Geoff Phillips

+ or VB-. Failure to do so may result in premature failure of the part. If a user wishes

B

KRF = 20kΩ, RF = 2(RB2 + RB4), K = Scaling Factor = 100)

= RB2 = RB3 = RB4 = 50Ω (1% absolute, matching

RB

1

requirements covered in a Tech Brief)
R

= RS2 = 1kΩ typically

S1

CS1 = CS2 = 0.1µF, 200V typically, depending on V
line length.

Z

= 150V to 200V transient protector. PTC used as ring

1

generator bal last.

* Secondary protection diode bridge recommende d is 3A, 200V

type.

**TF1, TF2 and RF1, RF2 are on PLCC only and should be con-

nected together as shown.

***Not Present on DIP or SOIC packages.

Ring

and

8-140