Datasheet H6850NF, H6850P, H6850S Datasheet (HSMC)

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MICROELECTRONICS CORP.

H6850 Series

Novel Low Cost Green-Power PWM Controller With Low EMI Technique

Feature

z Low Cost, PWM&PFM&CRM (Cycle

Reset Mode)

z Low Start-up Current (about 3μA) z Low Operating Current (about 1.2mA) z Current Mode Operation z Under Voltage Lockout (UVLO) z Built-in Synchronized Slope

Compensation

z Built-in Low EMI Technique z Programmable PWM Frequency z Audio Noise Free Operation z Leading edge Blanking on Sense input z Constant output power limiting for

universal AC input Range

z SOT-23-6L 、SOP8 and DIP-8 Pb-Free

Applications

z Switching AC/DC Adaptor z Battery Charger z Open Frame Switching Power Supply

General Description

The H6850 is a highly integrated low cost current mode PWM controller, which is ideal for small power current mode of offline AC-DC fly-back converter applications. Making use of external resistors, the IC changes the operating frequency and automatically enters the PFM/CRM (Cycle Reset Mode) under light-load/zero-load conditions. This can minimize standby power consumption and achieve powersaving functions. With a very low start-up current, the H6850 could use a large value start-up resistor (2MΩ). Built-in synchronized slope compensation enhances the stability of the system and avoids sub-harmonic oscillation. Dynamic peak current limiting circuit minimizes output power change caused by delay time of the system over a universal AC input range.

Packaging

z Good Protection Coverage With Auto

Self-Recovery

z Compatible with SG6848 (6849) /

SG5701/SG5848/LD7535 (7550) / OB2262 (2263)/OB2278（2279）

z Complete Protection with

¾ Soft Clamped GATE output voltage

18.0V

¾ VDD over voltage protect 34.0V ¾ Cycle-by-cycle current limiting ¾ Output SCP (Short circuit Protection) ¾ Output OLP (Over Load Protection) ¾ High-Voltage CMOS Process with ESD

z Standby Power Supplies z Set-Top Box Power Supplies z 384X Replacement

Leading edge blanking circuit on current sense input could remove the signal glitch due to snubber circuit diode reverse recovery and thus greatly reduces the external component count and system cost in the design. Cycle-by-Cycle current limiting ensures safe operation even during short-circuit. Excellent EMI performance is achieved built-in soft driver and low EMI technique. The H6850 offers perfect protection like OVP(Over Voltage Protection)、OLP(Over

Load Protection) 、 SCP(Short circuit protection)、OTP、Sense Fault Protection and OCP(Over current protection). The

H6850’s output driver is soft clamped to maximum 18.0V to protect the power MOSFET. H6850 is offered in SOT-23-6L, SOT-8 and DIP-8 packages.

Spec. No. : IC200912 Issued Date : 2009.07.15 Revised Date : Page No. : 1/13

H6850P, H6850S,H6850NF HSMC Product Specification

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Pin Assignment

Part Number

H6850NF SOT26, Pb-free,in T/R

H6850S SOP-8, Pb-free in T/R H6850P DIP-8, Pb-free in Tube

Pin Descriptions

Package

SOT-26

1234

DIP -8(SOP-8)

Description

Function Description

DIP-8

Pin6: GATE Pin1: GATE Totem-pole output to drive the external power MOSFET

46 5

Pin5: VDD Pin2: VDD

Pin3: NC NC Pin.

31 2

Pin4: SENSE

5678

Pin3: RI Pin5: RI

Pin6: NC NC Pin

Pin2: FB Pin7:FB

Pin1: GND Pin8: GND GND Pin

Pin4: SENSE

Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 2/13

Supply voltage pin.

Current sense pin, a resistor connects to sense the MOSFET current.

This pin is to program the switching frequency. By connecting a resistor to ground to set the switching frequency.

Voltage feedback pin. Output current of this pin could controls the PWM duty cycle、OLP and SCP.

TYPICAL APPLICATION

H6850

H6850P, H6850S,H6850NF HSMC Product Specification

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Block Diagram

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Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 3/13

Simplified Internal Circuit Architecture

Absolute Maximum Ratings

Symbol Parameter Rating Unit

OVP

SEN

STG

Supply voltage Pin Voltage 40 V

VDD OVP maximal enter current 20 mA

Input Voltage to FB Pin -0.3 to 6V V

Input Voltage to SEN Pin -0.3 to 6V V

Power Dissipation 300 mW

ESD Capability, HBM Model 2500 V

ESD Capability, Machine Model 250 V

Lead Temperature (Soldering)

SOT-23-6L (20S) 220

DIP-8 (10S) 260

SOP-8 (10S) 230

Storage Temperature Range -55 to + 150

℃ ℃ ℃ ℃

RECOMMENDED OPERATION CONDITION

Symbol Parameter Min ~ Max Unit

VDD VDD Supply Voltage 10~30 V

RI RI PIN Resistor Value 100 K ohm

TOA Operation Ambient Temperature -20~85

Maximal Output Power 0~80 W

OMAX

PWM

Frequency of PWM 30~150 kHz

℃

H6850P, H6850S,H6850NF HSMC Product Specification

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Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 4/13

Electrical Characteristics (Ta=25°C unless otherwise noted, V

= 16V)

Symbol Parameter Conditions Min. Typ. Max. Unit

Supply Voltage (VDD Pin)

Startup Current 3.0 20.0

VFB=0V 3.0 mA

VDD

OFF

CLAMP

AIS

Operating Current

VFB=3V 1.2 mA

=Open 0.8 mA

Turn-on Threshold Voltage 13.0 14.0 15.0 V

Turn-off Threshold Voltage 7.8 8.8 9.8 V

VDD Clamp Voltage I

Anti Intermission Surge

=10mA 34.0 V

VDD

9.4 V

VDD Voltage

μA

Voltage Feedback (FB Pin)

IFB Short Circuit Current VFB=0V 0.7 mA

VFB Open Loop Voltage VFB=Open 4.8 V

Zero Duty Cycle FB current 0.59 mA

FB_0D

PFM

CRM

PFM

CRM

OLP&SCP

Enter PFM FB current 0.50 mA

Enter CRM FB current 0.55 mA

Enter PFM Threshold V

1.80 V

Enter CRM Threshold VFB 1.40 V

Enter OLP&SCP FB current 170 uA

Enter OLP&SCP FB voltage 3.7 V

OLP&SCP min. delay Time RI=100K 33 35 50 mS

Current Sensing (SEN Pin)

TH_L

SEN Maximum Voltage Level

（Dmin=0%）

RI=100K,

0.80 V

FB=3.3V

SEN Maximum Voltage

TH_H

Level(Dmax=78%)

RI=100K,

1.05 V

FB=3.3V

TPD Delay to Output FB=3.3V 75 ns

H6850P, H6850S,H6850NF HSMC Product Specification

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RCS Input Impedance

Leading edge blanking time

LEB

( LEB )

Oscillator (RI Pin)

Normal Frequency RI=100Kohm 60 65 70 KHz

OSC

PFM Frequency RI=100Kohm 22 KHZ

PFM

ΔF

Maximum Duty Cycle PWM RI=100Kohm 78 %

MAX_W

MAX_F

TEMP

BLANK

JITTER

Maximum Duty Cycle PFM RI=100Kohm 78 %

Frequency Temp. Stability

Leading-Edge Blanking Time 300 nS

Frequency jitter RI=100Kohm -4 4 %

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40 KΩ

RI=100K 300 nS

-30-100

℃

Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 5/13

5 %

GATE Drive Output (GATE Pin)

Output Low Level VDD=16V,

Output High Level VDD=16V,

CLAMP

Rising Time

Falling Time CL=500pF 71 ns

Rising Time

Falling Time CL=1000pF 116 ns

Rising Time

Falling Time CL=1500pF 153 ns

Rising Time

Falling Time CL=2000pF 209 ns

Output Clamp Voltage VDD=20V 18.0 V

Low EMI technique

=20mA

10 V

0.8 V

=20mA

CL=500pF 123 ns

CL=1000pF 248 ns

CL=1500pF 343 ns

CL=2000pF 508 ns

EMI

Low EMI frequency RI=100Kohm 65 KHz

Frequency modulation range

∆f_osc

RI=100Kohm -3 3 %

/Base frequency

H6850P, H6850S,H6850NF HSMC Product Specification

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Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 6/13

OPERATION DESCRIPTION Current Mode

Compared to voltage mode control, current mode control has a current feedback loop. When the voltage of the Sense resistor peak current of the primary winding reaches the internal setting value V resets and the power MOSFET cuts off. So, to detect and modulate the peak current cycle-by-cycle could control the output of the power supply. The current feedback has a good linear modulation rate and a fast input and output dynamic impact, and avoid the pole that the output filter inductance brings and the two-class system descends to the one-class. So it widens the frequency range and optimizes overload protection and short circuit protection.

, the register

Startup Current and Under Voltage Lockout

The startup current of H6850 is set to be very low so that a large value startup resistor can be used to minimize the power loss. For AC to DC adaptor with universal input range design, a 2 MΩ, 1/8 W startup resistor and a 10uF/25V VDD hold capacitor could be used.

The turn-on and turn-off threshold of the H6850 is designed to 14V/8.8V. During startup, the hold-up capacitor must be charge to 14.0V through the startup resistor. The hysteresis is implemented to prevent the shutdown from the voltage dip during startup.

Internal Bias and OSC Operation

A resistor connected between RI pin and GND pin sets the internal constant current source to charge or discharge the internal fixed capacitor. The charge time and discharge time determines the internal clock speed and the switching frequency. Increasing the resistance will reduce the value of the input current and reduce the switching frequency. The relationship between RI and PWM switching frequency follows the below equation within the RI allowed range.

H6850P, H6850S,H6850NF HSMC Product Specification

generate a 20uA constant current and a 65kHz PWM switching frequency. The suggested operating frequency range of H6850 is within 50KHz to 150KHz.

Green Power Operation

mode power supply is very important in zero load or light load condition. The major dissipation results from conduction loss、 switching loss and consume of the control circuit. However, all of them relates to the switching frequency. There are many difference topologies has been implemented in different chip. The basic operation theory of all these approaches intends to reduce the switching frequency under light-load or no-load condition.

adapts PWM、 PFM and CRM combining modulation. When RI resistor is 100kΩ, the PWM frequency is 65kHz in medium or

heavy load operation. Through modifying the pulse width, The H6850 could control output voltage. The current of FB pin increases when the load is in light condition and the internal mode controller enters PFM&PWM when the feedback current is over 0.5mA. The operation frequency of oscillator is to descend gradually. When the feedback current is over 0.55mA, the frequency of oscillator is invariable, namely 22kHz.

OSC

For example, a 100kΩ resistor RI could

The power dissipation of switching

The H6850`s green power function

H6850 Green-Power Function

6500

KRI

)(

kHz

)(

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To decrease the standby consumption of the power supply, Chip-Rail introduces the Cycle Reset Mode technology (CRM). If the feedback current is over 0.59mA, mode controller of the H6850 would reset internal register all the time and cut off the GATE pin. While the output voltage is lower than the set value, the register would be set, the GATE pin operate again. So the frequency of the internal OSC is invariable, the register would reset some pulses so that the practical frequency is decreased at the GATE pin.

Internal Synchronized Slop Compensation

Although there are more advantages of the current mode control than conventional voltage mode control, there are still several drawbacks of peak-sensing current-mode converter, especially the open loop instability when it operates in higher than 50% of the duty-cycle. To solve this problem, the H6850 is introduced an internal slope compensation adding voltage ramp to the current sense input voltage for PWM generation. It improves the close loop stability greatly at CCM, prevents the sub-harmonic oscillation and thus reduces the output ripple voltage.

SLOP

Current Sensing & Dynamic peak limiting

The current flowing by the power

DUTY

Slop Compensation

MAX

DUTY

×=×= 4389.033.0

Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 7/13

MOSFET comes into being a voltage V

SENSE

on the Sense pin cycle-by-cycle, which compares to the internal reference voltage, and controls the reverse of the internal register, limits the peak current IMAX of the primary of the transformer. The transformer

energy is

the R

SENSE

can set the maximal output

. So adjusting

ILE ××=

MAX

power of the power supple. The current flowing by the power MOSFET has an extra

value (

I ×=Δ

) due to the system

delay time that is from detecting the current through the Sense pin to power MOSFET off in the H6850 (Among these, V

is the

primary winding voltage of the transformer and L

is the primary wind inductance). V

ranges from 85VAC to 264VAC. To guarantee the output power is a constant for universal input AC voltage, there is a dynamic peak limit circuit to compensate the system delay T that the system delay brings on.

Vsense

1.10

1.05

1.00

0.95

0.90

0.85

0.80

0.75

0.70

0.65 10%20%30%40%50%60%70%80%90%0%

Duty Cycle

OLP&SCP

To protect the circuit from being damaged under the over load or short circuit condition, a smart OLP&SCP function is implemented in the H6850. When short circuit or over load occurs in the output end, the feedback cycle would enhance the voltage of FB pin, while the voltage is over

3.7V or the current from FB is below 170uA, the internal detective circuit would send a signal to shut down the GATE and pull down the VDD voltage, then the circuit is restart. To avoid the wrong operation when circuit

H6850P, H6850S,H6850NF HSMC Product Specification

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starts, the delay time is set. When the RI resistance is 100Kohm, the delay time T

OLP&SCP

relationship between RI and T follows the below equation.

Anti Intermission Surge

heavy load to light load immediately, there could be tow phenomena caused by system delay. They are output voltage overshot and intermission surge. To avoid it, the anti intermission surge is built in the H6850. If it occurs, the FB current is to increase rapidly, the GATE would be cut off for a while, VDD pin voltage descends gradually. When VDD reaches 9.4V, the GATE pin would operate again, which the frequency is 22KHz.

Leading-edge Blanking (LEB)

switched on, a turn-on spike will inevitably occur at the Sense pin, which would disturb the internal signal from the sampling of the R

SENSE

blanking time built in to avoid the effect of the turn-on spike, and the power MOSFET cannot be switched off during the moment. So that the conventional external RC filtering on sense input is no longer required.

is between 33mS and 50mS. The

OLP&SCP

106

When the power supplies change the

Each time the power MOSFET is

. There is a 300nS leading edge

)(

TmS

SCPOLP

106

)(

H6850

Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 8/13

Over Voltage Protection (OVP)

There is a 34V over-voltage protection circuit in the H6850 to improve the credibility and extend the life of the chip. When the VDD voltage is over 34V, the GATE pin is to shutdown immediately and the VDD voltage is to descend rapidly.

GATE Driver & Soft Clamped

The H6850’ output designs a totem pole to drive a periphery power MOSFET. The dead time is introduced to minimize the transfixion current during the output operating. The novel soft clamp technology is introduced to protect the periphery power MOSFET from breaking down and current saturation of the Zener.

Low EMI technique

The frequency low EMI technique is introduced in the H6850. As following figure, the internal oscillation frequency is modulated by itself. A whole surge cycle includes 128 pulses and the jittering ranges from -4% to +4%. Thus, the function could minimize the electromagnetic interferer from the power supply module.

Frequency(HZ) 70K

65K

60K

Frequency low EMI

Tim

H6850P, H6850S,H6850NF HSMC Product Specification

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CHARACTERIZATION PLOTS

VDD=16V,RI=100Kohm,TA=25℃ condition applies if not otherwise noted.

Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 9/13

H6850P, H6850S,H6850NF HSMC Product Specification

Page 10

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Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 10/13

H6850P, H6850S,H6850NF HSMC Product Specification

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PACKAGE DEMENSIONS DIP-8L

Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 11/13

Dimensions

Symbol

Min. Typ. Max. Min. Typ. Max.

A1 0.381

A2 3.175 3.302 3.429 0.125 0.130 0.135

D 9.017 9.271 10.160 0.355 0.365 0.400

E1 6.223 6.350 6.477 0.245 0.250 0.255

L 2.921 3.302 3.810 0.115 0.130 0.150

eB 8.509 9.017 9.525 0.335 0.355 0.375

θ˚ 0˚ 7˚ 15˚ 0˚ 7˚ 15˚

H6850P, H6850S,H6850NF HSMC Product Specification

Millimeters Inches

1.524

0.457

7.620

2.540

5.334

0.015

0.210

0.060

0.018

0.300

0.100

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SOT-23-6L

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Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 12/13

Symbol

A 0.700 1.000 0.028 0.039

A1 0.000 0.100 0.000 0.004

B 1.397 1.803 0.055 0.071

b 0.300 0.559 0.012 0.022

C 2.591 3.000 0.102 0.118

D 2.692 3.099 0.106 0.122

e 0.838 1.041 0.033 0.041

H 0.080 0.254 0.003 0.010

L 0.300 0.610 0.012 0.024

Dimensions In Millimeters Dimensions In Inches

Min Max Min Max

H6850P, H6850S,H6850NF HSMC Product Specification

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SOP-8L

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Spec. No. : IC200804 Issued Date : 2008.09.19 Revised Date : Page No. : 13/13

Dimensions DISCLAIMERS

Symbol

A 1.346

A1 0.101

D 4.648

E 3.810

e 1.016 1.270 1.524 0.040 0.050 0.060

H 5.791

L 0.406

θ˚

Min. Typ. Max. Min. Typ. Max.

0°

Millimeter Inch

0.406

0.203

0.381X45

1.752 0.053

0.254 0.004

4.978 0.183

3.987 0.150

6.197 0.228

1.270 0.016

8° 0°

0.016

0.008

0.015X45

0.069

0.010

0.196

0.157

0.244

0.050

8°

H6850P, H6850S,H6850NF HSMC Product Specification

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