Datasheet GTLP6C816 Datasheet (PERIC)

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

GTLP6C816

GTLP-to-TTL 1:6 Clock Driver

Features

 Bidirectional interface between GTLP and TTL

logic levels

 Designed with Edge Rate Control Circuit to

reduce output noise on the GTLP port  Power up/down high impedance for live insertion  1:6 fanout clock driver for TTL port  Lower Drive (12mA) on TTL Port to reduce noise  1:2 fanout clock driver for GTLP port  TTL compatible driver and control inputs  Flow -through architecture optimizes PCB layout  Open drain on GTLP to support wired-or connection  Operating Temperature: 40°C to +85°C  Package:

 24-Pin 173 mil wide plastic TSSOP (L24)

Logic Block Diagram

Product Description

Pericom Semiconductors GTLP series of logic circuits are produced using the Companys advanced 0.5 micron CMOS technology, achieving industry leading performance.

The GTLP6C816 is a clock driver that provides TTL to GTLP signal level translation (and vice versa). The device provides a high-speed interface between cards operating at TTL logic levels and a backplane operating at GTLP logic levels. High-speed backplane operation is a direct result of GTLPs reduced output swing (<1V), reduced input threshold levels, and output edge-rate control which minimizes bus settling times.

Pericoms GTLP has internal edge-rate control. Its function is similar to BTL or GTL but with different output levels and receiver threshold. GTLP output low voltage is typically less than 0.5V, the output level HIGH is 1.5V and the receiver threshold is 1.0V.

Pin Configuration

TTLIN

OEA

OA0

OA1

TTL

Ports

OA5

OEB

OB0

OB1

GTLP Ports

GTLPIN

TTLIN

OA0

GNDT

OA1 4

V

CCT

OA2

GNDT

OA3

V

CCT

OA4

GNDT

OA5

1 2 3

5 6 7 8 9 10 11 12

24-Pin

L

24 23

20 19 18 17 16 15

13

GNDT OEB OB022 GNDG21 V

REF

GNDG V

CC

OB1 GNDG GTLPIN OEA14 GNDT

1

PS8426A 03/15/00

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

Functional Description

The GTLP6C816 is a clock driver that provides TTL to GTLP clock translation, and GTLP-to-TTL clock translation. The TTL-to-GTLP direction is a 1:2 clock driver path with a single Enable pin (OEB).

Pin Descriptions

semaNniPnoitpircseD

NIPLTG,NILTT)ylevitcepserPLTGdnaLTT(stupnIkcolC

BEO)sleveLLTT(troPPLTG)WOLevitcA(elbanEtuptuO

AEO)sleveLLTT(troPLTT)WOLevitcA(elbanEtuptuO

GTLP6C816

GTLP-to-TTL 1:6 Clock Driver

For the GTLP -to-TTL direction, the clock receiver path is a 1:6 buffer with a single Enable control (OEA). Data polarity is inverting for both directions.

V

TCC

CC

TDNG,)V5(seilppuStuptuOLTT

GDNGsdnuorGtuptuOPLTGnBO

V

FER

5AO-0AOstuptuOkcolCdereffuBLTT

5BO-0BOstuptuOkcolCdereffuBPLTG

Truth Table

stupnIstuptuO

NILTTBEOnBO

HLL

LLH

XH ZhgiH

VyrtiucriClanretnI

)V5(

CC

tupnIecnerefeRegatloV

NIPLTGAEOnAO

HLL

LLH

XH ZhgiH

2

PS8426A 03/15/00

GTLP6C816

GTLP-to-TTL 1:6 Clock Driver

Absolute Maximum Ratings

(1)

(Above which the useful life may be impaired. For user guidelines, not tested.)

Supply Voltage (VCC) .......................................................... 0.5V to +7.0V

DC Input Voltage (V

) .......................................................... 0.5V to +7.0V

I

DC Output Voltage (VO)

Outputs 3-State .................................................................. 0.5V to +7.0V

Outputs Active

(2)

............................................................... 0.5V to +7.0V

DC Output Sink Current into OA-Port IOL......................................... 32mA

DC Output Source Current into OA-Port I

........................................... 32mA

OH

DC Output Sink Current into OB-Port in the LOW State IOL............. 80mA

DC Input Diode Current (IIK) V

< 0V ............................................................................................ 50mA

I

DC Output Diode Current (IOK) V

< 0V .......................................................................................... 50mA

O

V

> VCC........................................................................................ +50mA

O

ESD Rating ....................................................................................... >2000V

Storage Temperature (T

Recommended Operating Condition

) ............................................. 65°C to +150°C

STG

(3)

Supply Voltage V

............................................................................ 4.75V to 5.25V

CC

Bus Termination Voltage (VTT)

GTLP .................................................................................. 1.47V to 1.53V

V

.......................................................................................................... 0.98V to 1.02V

REF

Input Voltage (VI) on INA-Port and Control Pins ....................0.0V to 5.5V

HIGH Level Output Current (IOH)

OA-Port.......................................................................................... 12mA

LOW Level Output Current (IOL)

OA-Port.......................................................................................... +12mA

OB-Port .......................................................................................... +34mA

Operating Temperature (TA) ............................................... 40°C to +85°C

Notes:

1. Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional opertion under absolute maximum rated conditions is not implied.

2. IO Absolute Maximum Rating must be observed

3. Unused inputs must be held HIGH or LOW.

3

PS8426A 03/15/00

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

DC Electrical Characteristics

(Over the recommended Operating Free-Air Temperature Range, V

lobmySsnoitidnoCtseT.niM.pyT

= 1.0 (Unless otherwise noted)

REF

GTLP6C816

GTLP-to-TTL 1:6 Clock Driver

)4(

.xaMstinU

V

HI

srehtO0.2

NIPLTG0.0V

NIPLTGV

V

LI

)5(

V

FER

)5(

V

TT

V

KI

V

HO

V

LO

V

LO

I

FFO

srehtO 8.0

PLTG 0.1

LTG8.0

PLTG 5.1

LTG2.1

V

CC

V

CC

V57.4=I

V57.4=

troP-nAO

troP-nAOV

troP-nBOV

/NILTT

sniPlortnoC

NIPLTGV

CC

V

CC

NILTTV

V57.4=

V52.5=

0=V

CC

troP-nAO

I

HZO

I

LZO

I

CC

ID

CC

C

NI

C

TUO

troP-nBOV

troP-nAOV

ronAO

stroPnBO

NILTTV

/sniPlortnoC

troP-nAO troP-nBO

V

CC

V

CC

V

V=

I

CC

NILTT/NIPPLTG

V52.5=

V52.5=V

V52.5=

CC

DNGrodelbasiDstuptuO702

V52.5=V

Notes:

4. All typical values are at VCC = 5.0V and TA = 25°C

5. GTLP, V noisy. In addition, V

REF

and V

are specified to 2% tolerance since signal integrity and noise margin can be significantly degraded if these supplies are

TT

and R

can be adjusted to accommodate backplane impedances other than 50W , within the boundaries of not

TERM

exceeding the DC Absolute IOL ratings. Similarly, V

50.0+V

FER

I

HO

I

HO

I

HO

I

LO

I

LO

I

LO

I

LO

V

Am81=2.1

001=

m

AVCC2.0

Am8=4.2

Am21=2.2

001=

m

A2.0

Am8=4.0

LO

Am21=5.0

Aµ001=2.0

Am43=56.0

V52.5=

I

V

V0=

I

V=

I

TT

VIV0=

Vro

I

O

V

O

V52.5otV0=001

V52.5=5

V5.1=5

0=5

HGIHstuptuO781

WOLstuptuO702

V=

I

V

I

V

I

V

I

can be adjusted to compensate for changes in VTT.

REF

1.26

CC

V=

0ro5.3

CC

V=

0ro7

CC

V=

0ro7

CC

TT

50.0

FER

V

5

5

5

5

m

A

Am

Fp

4

PS8426A 03/15/00

AC Operating Requirements

(Over recommended ranges of supply voltage and operating free-air temperature, V CL = 30pF for OBn-Port and CL = 50pF for OAn-Port.

GTLP-to-TTL 1:6 Clock Driver

= 1.0 (Unless otherwise noted)

REF

GTLP6C816

lobmyS)tupnI(morF)tuptuO(oT.niM.pyT

t

HLP

t

LHP

t

HLP

t

LHP

t

ESIR

t

LLAF

t

ESIR

t

LLAF

t

,HZP

LZP

t

,ZLP

ZHP

t

HLP

t

LHP

t

,LHSO

)7(

t

HLSO

NILTTnBO5.0

5.0

BEOnBO5.1

5.1

)%08ot%02(stuptuOBO.emiTnoitisnarT3.2

)%09ot%01(stuptuOAO.emiTnoitisnarT0.2

AEOnAO5.0

5.0

NIPLTGnAO5.1

5.1

wekSegdEnommoC51.052.0

( )6

8.3

8.2

4.6

2.3

6.3

8.3

0.3

.xaMstinU

5.4

5.3

5.6

0.5

5.6

5.5

sn

Notes:

6. All typical values are at VCC = 5.0V and TA = 25°C

7 Skew specs are given for specific worst case VCC Temp. Skew values between the OBn outputs could vary on the

backplance owing to loading and impedance seen by the device.

5

PS8426A 03/15/00

12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012

Test Circuits and Timing Waveforms

GTLP6C816

GTLP-to-TTL 1:6 Clock Driver

Test Circuit for A Outputs

From

Output

Under

Test

CL = 50pF

(Note A)

Test S

t

PLH/tPHLOpen

t

PLZ/tPZH 6V

t

PHZ/tPZHGND

Note A: CL includes probes and jig capacitance

Voltage Waveforms Enable

and Disable Times A-Port

t

PZL

1.5V

t

PZH

1.5V

500

Ω

1.5V1.5V

V

OL

VOH-0.3V

Ω

+0.3V

3.0V

V

OH

V

OL

V

OH

V

OL

6V

Gnd

Open

Input

Test Circuit for B Outputs

1.5V (GTLP)

1.2V (GTL)

25

Ω

From Output Under Test

30pF

(NotesA&B)

Notes: A. CL includes probes and jig capacitance. B. For B-Port outputs, CL= 30pF is used for

worst case.

Voltage Waveforms Propagation Delay

(V

= 1.5V for A-Port and 1.0 for B-Port)

m

VmV

t

PHL

t

PHL

Output

VmV

3.0V (1.5V for B-Port GTLP)

0V

V

OH

(1.5V for B-Port GTLP)

V

OL

24-Pin 173 Mil Wide Plastic TSSOP Package

24

.169

4.3

.177

4.5

1

.303 .311

7.7

7.9

.047

1.20

Max

SEATING PLANE

.002

0.05

.006

.007 .012

0.19

0.30

DENOTES CONTROLLING DIMENSIONS IN MILLIMETERS

X.XX X.XX

.0256

BSC

0.65

0.15

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com

0.45

0.75

.252 BSC

6.4

Pericom Semiconductor Corporation

.018 .030

.004 .008

6

0.09

0.20

PS8426A 03/15/00

Datasheet GTLP6C816 Datasheet (PERIC)

Specifications and Main Features

Frequently Asked Questions

User Manual