• typically greater than 350 m of high quality cable at
270 Mb/s
• typically 300 m of high quality cable at 360 Mb/s
• improved jitter response vs cable length
• drop in replacement for GS9004B
• capability to drive 50
Ω loads (to V
TT
)
• fully compatible with SMPTE 259M and operational to
400 Mb/s
• signal strength indicator
• output 'eye' monitor
• 14 pin SOIC packaging
• single +5 or -5 volt power supply operation
APPLICATIONS
• Front-end cable equalization for digital video systems
• Input equalization for serial digital distribution amplifiers,
routers, production switchers and other receiving
equipment
ORDERING INFORMATION
DEVICE DESCRIPTION
The Gennum GS9004C is an improved monolithic automatic
cable equalizer developed for SMPTE/EBU scrambled
NRZI Serial Digital Video signals.
While there are no plans to discontinue the GS9004C,
Gennum has developed a successor product with improved
features and performance called the GS9024. The GS9024
is recommended for new designs.
This device features DC restoration to pass the Pathological
Test Signals and fully automatic equalization in order to
meet the SMPTE 259M Serial Interface Standard. The
DATA and DATA outputs typically deliver 800 mV (p-p)
equalized signals into 50 Ω loads (to V
). These signals
TT
can be used to feed cable driver circuits for Serial Distribution
Amplifier applications.
This device also incorporates an analog signal strength
indicator (SSI) which provides a 0.5 V to 0 V output relative
, indicating the amount of equalization being applied
to V
CC
to the signal.
The GS9004C features an OUTPUT 'EYE' MONITOR
(OEM), which allows verification of signal integrity after
equalization, prior to reslicing. Operating with a single +5
or -5 volt supply, the GS9004C typically draws 52 mA of
current.
Part Number Package Type Temperature Range
GS9004CCKB 14 pin SOIC 0oC to 70oC
GS9004CCTB 14 pin SOIC Tape 0oC to 70oC
The GS9004C Cable Equalizer is a bipolar integrated circuit
used to equalize SMPTE 259M signals from a co-axial cable.
The device is implemented as a fourteen pin SOIC, powered
from a single five volt supply. With an operating frequency up
to 400 Mb/s, the equalizer consumes about 285 mW of
power.
The Serial Digital signal is connected to the input (pins 8, 9)
either differentially or single ended with the unused input
being decoupled. The equalized signal is generated by
passing the cable signal through a voltage variable filter
having a characteristic which closely matches the inverse
cable loss characteristic. Additionally, the variation of the filter
characteristic with control voltage is designed to imitate the
variation of the inverse cable loss characteristic as the cable
length is varied.
The amplitude of the equalized signal is monitored by a peak
detector circuit which produces an output current with a
polarity corresponding to the difference between the desired peak
signal level and the actual peak signal level.
+5V
GND
This output is integrated by an external AGC filter capacitor
(AGC CAP pin 7), providing a steady control voltage for the
voltage variable filter.
A separate signal strength indicator output, (SSI pin 6),
proportional to the amount of AGC, is also provided. As the
filter characteristic is varied automatically by the application of
negative feedback, the amplitude of the equalized signal is
kept at a constant level which is representative of the original
amplitude at the transmitter.
The equalized signal is then DC restored, effectively restoring
the logic threshold of the equalized signal to its correct level
irrespective of shifts due to AC coupling.
As the final stage of signal conditioning, a comparator converts
the analog output of the DC restorer to a regenerated digital
output signal having pseudo-ECL voltage levels. These outputs,
DATA and DATA, are available from pins 13 and 14 respectively.
An OUTPUT 'EYE' MONITOR (pin 3) allows verification of
signal integrity after equalization, prior to reslicing.
V
CC
+
10µ
150
68
1.0
1.8p
68
SDO4
100
100n
100n
V
V
CC
50
100n
OEM
V
CC
SSI
V
CC
100n
V
100n
CC
+
10
CC
100n
1
V
2
V
3
OEM
4
V
5
N/C
6
SSI
7
AGC
CC
CC
CC
GS9004C
DATA
DATA
GND1
GND
GND
IN -
IN+
14
13
12
11
10
9
8
47p
75
SDI
100
680
680
113
75
OEM
47p
18n
GND
5
SI
6
SO1
SI
7
VCC
8
100n
GS9007
V
CC
All resistors in ohms, all capacitors in microfarads,
all inductors in henries unless otherwise stated.
SO2
SO1
3
2
1
4
SO2
150
150
150
1.8p
1.0
68
1.8p
1.0
68
1.0
1.8p
SDO3
SDO2
SDO1
Fig. 1 Test Circuit
8281 CABLE
ANRITSU
ME522A
OR
TEKTRONIX
TSG422
CABLE
DRIVER
DATA
CLOCK
D.U.T.
CABLE
DRIVER
VERTICAL
IN
OSCILLOSCOPE
Fig. 2 Test Set-up 1
3
TRIGGER
IN
521 - 72 - 00
Page 4
TYPICAL PERFORMANCE CURVES (unless otherwise shown V
= 5V, T
S
= 25°C)
A
80
75
70
VS = 5.25 V
VS = 5.0 V
CURRENT (mA)
65
60
0 10 20 30 40 50 60 70
VS = 4.75 V
TEMPERATURE
Fig. 3 Supply Current vs Temperature
5.0
4.9
4.8
4.7
4.6
SSI VOLTAGE (V)
4.5
40
35
30
25
20
GAIN (dB)
15
10
5
0
0.1 1 10 100 500
FREQUENCY (MHz)
Fig. 4 Equalizer Gain vs Frequency
900
850
800
750
700
SERIAL OUTPUT (mV)
650
VS = 5.25 V
V
VS = 4.75 V
= 5.0 V
S
4.4
0 50 100 150 200 250 300 350
CABLE LENGTH (m) (8281)
Fig. 5 Signal Strength Output Voltage
vs Input Cable Length
1000
900
800
700
600
500
400
JITTER p-p (ps)
300
200
100
0
0 50 100 150 200 250 300 350
270 Mb/s 2
23
Signal Source
PRN
INPUT CABLE LENGTH (m) (8281)
Fig. 7 Additive Jitter vs Input Cable Length
at 270 Mb/s
600
0 10 20 30 40 50 60 70
TEMPERATURE (°C)
Fig. 6 Data and Data Output Voltage vs Temperature
521 - 72 - 00
4
Page 5
+5V
GND
10µ
R2
V
CC
+
R3
150
68
J3
C6
C8
1.0
1.8p
R5
68
SDO4
C3
V
100n
CC
V
CC
R1
50
J2
OEM
C4 100n
V
CC
100n
V
CC
TP1
SSI
V
CC
C2
All resistors in ohms, all capacitors
in microfarads unless otherwise stated.
+
10µ
100n
100n
C5
SO2
SO2
SO1
SO1
4
3
2
1
R15
150
R13
150
R6
150
5
GND
6
SI
7
SI
8
VCC
V
CC
C14
100n
GS9007
R12
680
R7
100
R10
100
GS9004C
1
V
CC
2
V
CC
3
OEM
4
V
CC
5
C7
N/C
6
SSI
7
AGC
DATA
DATA
GND1
GND
GND
IN -
IN+
14
13
12
11
10
9
8
C12
47p
J1
SDI
JP1 OEM
R11
113
C15
47p
75
R9
L1
75
18n
680
C10
1.0
C13
1.0
R15
1.0
C11
1.8p
R8
68
C16
1.8p
R14
68
C18
1.8p
J4
SDO4
J5
SDO4
J6
SDO4
Fig. 8 Typical Application Circuit
CAUTION
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT OPEN PACKAGES OR HANDLE
EXCEPT AT A STATIC-FREE WORKSTATION
DOCUMENT IDENTIFICATION: DATA SHEET
The product is in production. Gennum reserves the right to
make changes at any time to improve reliability, function or
REVISION NOTES:
New information added to Device Description
design, in order to provide the best product possible.
Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement.
GENNUM JAPAN CORPORATION
C-101, Miyamae Village, 2-10-42 Miyamae, Suginami-ku, Tokyo 168-0081, Japan
Tel. +81 (3) 3334-7700 Fax: +81 (3) 3247-8839
GENNUM UK LIMITED
Centaur House, Ancells Business Park, Ancells Road, Fleet, Hampshire, UK GU13 8UJ
Tel. +44 (1252) 761 039 Fax +44 (1252) 761 114